LC7851E QPSK Demodulation Audio Signal-Processing Satellite Broad

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LC7851E QPSK Demodulation Audio Signal-Processing Satellite Broad

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Ordering number EN5691
LC7851E
QPSK Demodulation Audio Signal-Processing Satellite Broadcast Reception
Overview
LC7851E demodulates QPSK (quadrature phase shift keying) modulated audio data broadcast Japanese broadcast satellites converts that data analog audio signal. This integrates single chip audio system signal processing required receivers from QPSK demodulation analog audio reproduction. main functions provided LC7851E include QPSK demodulation, differential decoding conversion, descrambling, deinterleaving, error correction. also generates audio signal. audio signal converted analog audio signal on-chip digital filters converters.
Features
QPSK demodulator, decoder, digital filters, converters, operational amplifiers integrated single chip. number required external components been reduced adjustment-free operation achieved QPSK demodulator implementing that block digital circuit single chip. interface using Interface circuits CORTEC SkyPort descramblers
expansion audio data during mode broadcasts. Data protection using majority control upper bits audio data during mode broadcasts Full complement muting functions Audio suppression provided (bit postmajority decision control bits) Non-audio signal suppression (bits postmajority decision control bits) Forced muting Muting when synchronized Muting when large numbers errors detected (modifiable conditions) Channel switching Charged (pay-per-view) program flag muting Mute detection output provided. General-purpose ports input ports output ports) EIAJ digital audio interface output oversampling digital filters Multi-bit converter (with built-in output operational amplifiers) single-voltage power supply (QIP) package
Package Dimensions
unit: 3195-QFP64E
[LC7851E]
Functions
QPSK demodulation timing clock recovery Differential decoding conversion parallel-to-serial conversion Frame synchronization (forward protection: cycles, back protection: cycles): Frame synchronized/not synchronized detection flag output provided. Tenth-order M-series descrambling Deinterleaving (63, error correction dual error detection: Single error detected flag output provided. Support both interpolation previous data hold when dual error detected. Control majority judgment protection every frames Register data previous value hold when dual errors detected using BCH(7,3)
SANYO: QIP64E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, JAPAN
83097HA(OT) 5691-1/9
Block Diagram
Scramble interface Scramble interface
oversampling digital filters
Differential conversion parallel-to-serial converter Descrambler Deinterleaving bits expansion Upper majority protection Sync detection sync protection Control extraction Error detection correction Range error correction For-fee flag detection Audio switching Data interpolation previous value hold
Digital de-emphasis filter
LC7851E
QPSK demodulator
converter
Digital audio interface output Audio signal buffer amplifier
timing clock recovery interface
General-purpose ports
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LC7851E Assignment
CVDD DVDD CVSS DVSS
PVSS
PVDD
DVSS
VVDD VVSS
AVSS
DVDD
Functions
BSTRI BSTRO CK5M DVDD AVSS QPSKI AVDD AVSS VCADJ VCIN stream input stream output General-purpose output port General-purpose output port General-purpose output port General-purpose output port General-purpose output port General-purpose output port General-purpose output port General-purpose output port Filter adjustment clock output (5.7272 MHz) Digital system power supply Output control state when reset PHCNT (Low: high-impedance, high: duty pulse output) Internal converter ground QPSK modulated signal input Internal converter power supply Internal converter reference (center) output Internal converter ground Internal converter reference (low) output Connection internal adjustment external resistor Internal control input Function
AVDD
AVSS
Continued next page.
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LC7851E
Continued from preceding page.
VVSS VVDD (N.C) PVDD PHCNT PVSS (N.C) DVSS DADO (N.C) (N.C) (N.C) (N.C) (N.C) TEST1 TEST2 DVDD CVSS AOUTL REFL REFH AOUTR CVDD MUTI MUTO LOIN DVSS DSTRI2 DSTRI1 DSTRO DASL CK2M Test Test Digital system power supply Internal converter ground Left channel audio data output Internal converter reference voltage: Internal converter reference voltage: high Right channel audio data output Internal converter power supply Reset input Forced muting input Mute detection output (When muting detected: high) Audio mode detection output mode: low, mode: high) Frame synchronization detection output (When synchronized: low) Error detection output (Error detected: high) Host readout request signal data clock input Digital system ground Data stream input 2/general-purpose port Data stream input 1/general-purpose port Data stream output (post-error correction data) Descrambler interface switching Frame synchronization signal stream clock (2.048 MHz) Oscillator circuit power supply Crystal oscillator (22.909088 MHz) input Crystal oscillator (22.909088 MHz) output Oscillator circuit ground Digital system ground Digital audio interface output Phase comparator power supply Phase comparator output Phase comparator ground Internal ground Internal power supply Function
Caution: pins must left open.
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LC7851E Input Output Circuit Diagrams Output pins (Output pins other than SDA, PHCNT, CK5M, VRM, VRB, REFH, REFL, AOUTR, AOUTL)
Output pins:
These n-channel open drain outputs.
Output pin: CK5M
Output pin: PHCNT
Input pins (Input pins other than QPSKI, SCL, SDA, DSTRI1, DSTRI2, VCIN)
Input pins: SCL, DSTRI1, DSTRI2
pin:
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LC7851E
Specifications
Absolute Maximum Ratings 25°C,
Parameter Supply voltage Input voltage Symbol Output voltage Allowable power dissipation Operating temperature Storage temperature Topr Tstg +75°C Pins other than Conditions Ratings -0.3 +7.0 -0.3 VDD+0.3 -0.3 +5.3 -0.3 +0.3 +125 Unit
Allowable Operating Ranges 25°C
Parameter Supply voltage Input high-level voltage Input low-level voltage QPSKI input voltage Symbol VQPSKI Conditions Ratings 0.75 0.25 Unit
Characteristics +75°C,
Parameter Current drain Symbol CMOS output pins:PHCNT, LOIN, MOD, DSTRO, FRM, ERR, CK2M, BSTRO, MUTO, DADO, REQ, SYCKO VCK5MH CK5M CMOS output pins: PHCNT, LOIN, MOD, DSTRO, FRM, ERR, CK2M, BSTRO, MUTO, DADO, REQ, SYCKO open drain output open drain output VCK5ML CK5M CK5M VDD, Schmitt inputs: TSL, RST, TEST1, TEST2, BSTRI, DSTRI1, DSTRI2, DASL, MUTI, SCL, SDA, VSS, Schmitt inputs: TSL, RST, TEST1, TEST2, BSTRI, DSTRI1, DSTRI2, DASL, MUTI, SCL, SDA, AOUTL AOUTR Conditions Ratings Unit
IOH1 Output high-level current IOH2 IOL1
-350
-100
Output low-level current
IOL2 IOL3 IOL4
Output amplitude level Input high-level current
VCK5M
Input low-level current Output load resistance
Converter Characteristics +75°C,
Parameter Resolution Total harmonic distortion Signal-to-noise ratio Crosstalk Full scale output voltage Symbol THD1 THD2 mode, mode, Conditions Ratings 0.08 0.05 Unit Bits Vp-p
Note: *Values when measured Sanyo evaluation board with QPSK modulated signal sine wave) input.
5691-6/9
LC7851E Interface +75°C,
Parameter frequency release time Start hold time time high time Data hold time Data setup time Rise time Fall time Stop setup time Symbol fSCL TBUF TLOW THIGH 1000 Conditions Ratings Unit
Start condition Stop condition
Descrambler Interface +75°C,
Parameter Clock pulse width BSTRO output delay time DSTRO output delay time BSTRI DSTRI1 two-pin input setup time Symbol TCK2M TBSDL TDSDL TBSST Conditions Ratings Unit
Reset Timing Power +75°C,
Parameter Reset time Symbol TRST Conditions high; LC7851E must used with (pin high. Ratings Unit
LC7851E must reset with following timing when power first applied.
Circuit
Recommended Crystal Oscillator Constants
Supplier Citizen Watch Co., Ltd. Oscillator element CSA-309 (22.909088 MHz) Cin/Cout (Cin Cout)
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LC7851E Application Circuit Diagram
5691-8/9
LC7851E
products described contained herein intended surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment like, failure which directly indirectly cause injury, death property loss. Anyone purchasing products described contained herein above-mentioned shall: Accept full responsibility indemnify defend SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees, jointly severally, against claims litigation damages, cost expenses associated with such use: impose responsibility fault negligence which cited such claim litigation SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees jointly severally. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information August, 1997. Specifications information herein subject change without notice. 5691-9/9

LC7851E QPSK Demodulation Audio Signal-Processing Satellite Broad

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