LC662104A, 662106A, 662108A Four-Bit Single-Chip Microcontrollers
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Ordering number EN5996
LC662104A, 662106A, 662108A
Four-Bit Single-Chip Microcontrollers with On-Chip
Overview
LC662104A, LC662106A, LC662108A 4-bit CMOS microcontrollers that integrate single chip functions required special-purpose telephone controller, including ROM, RAM, ports, serial interface, DTMF generator, timers, interrupt functions. These microcontrollers available 30-pin package.
Features Functions
On-chip capacities kilobytes, on-chip capacity bits. Fully supports LC66000 Series common instruction (128 instructions). (The special-purpose instructions SI/01 disabled.) ports: pins DTMF generator This microcontroller incorporates circuit that generate sine wave outputs, DTMF output. 8-bit serial interface: circuit
Instruction cycle time: 0.95 Powerful timer functions prescalers Time limit timer, event counter, pulse width measurement, square wave output using 12-bit timer. Time base function using 12-bit prescaler. Powerful interrupt system with interrupt factors interrupt vector locations. External interrupts: factors/3 vector locations Internal interrupts: factors/3 vector locations Flexible functions Selectable options include 20-mA drive outputs, pull-up open drain circuits. Optional runaway detection function (watchdog timer) 8-bit functions Power saving functions using halt hold modes. Packages: DIP30SD, MFP30S Evaluation ICs: LC665099 (evaluation chip) EVA86K ECB662500 LC66E2108(on-chip EPROM microcontroller)
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO products described contained herein.
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TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
101698RM (OT) 5966-1/13
LC662104A, 662106A, 662108A
Package Dimensions
unit: 3196-DIP30SD
[LC662104A]
unit: 3216-MFP30S
[LC662106A]
SANYO: DIP30SD
SANYO: MFP30S
Type LC66304A/306A/308A LC66404A/406A/408A LC66506B/508B/512B/516B LC66354A/356A/358A LC66354S/356S/358S LC66556A/558A/562A/566A LC66354B/356B/358B LC66556B/558B/562B/566B LC66354C/356C/358C LC662104A/06A/08A LC662304A/06A/08A/12A/16A LC662508A/12A/16A LC665304A/06A/08A/12A/16A LC66E308 LC66P308 LC66E408 LC66P408 LC66E516 LC66P516 LC66E2108 LC66E2316 LC66E2516 LC66E5316 LC66P2108 LC66P2316 LC66P2516 LC66P5316
pins 52/48
capacity K/12 K/16 K/12 K/16 K/12 K/16
capacity DIP64S DIP42S DIP64S DIP42S DIP30SD DIP42S DIP64S DIP48S DIP42S DIP42S DIP64S DIP42S
Package QFP48E QFP48E QFP64A QFP48E QFP44M QFP64E QFP48E QFP64E QFP48E MFP30S QFP48E QFP64E QFP48E QFC48 with window QFP48E QFC48 with window QFP48E QFC64 with window QFP64E
Features
Normal versions V/0.92
Low-voltage versions V/3.92 Low-voltage high-speed versions V/0.92 V/0.92 On-chip DTMF generator versions V/0.95 Dual oscillator support V/0.95
K/12 K/16 K/12 K/16
K/12 K/16 EPROM OTPROM EPROM OTPROM EPROM OTPROM EPROM EPROM EPROM EPROM OTPROM OTPROM OTPROM OTPROM
DIC42S with window DIP42S DIC42S with window DIP42S DIC64S with window DIP64S
Window evaluation versions V/0.92
DIC42S with window DIC64S with window DIC52S with window DIP30SD DIP42S DIP64S DIP48S
QFC48 with window QFC64 with window QFC48 with window MFP30S QFP48E QFP64E QFP48E
Window evaluation versions V/0.95
V/0.95
5996-2/13
LC662104A, 662106A, 662108A
recommend reflow-soldering techniques solder-mount packages. Please consult with your Sanyo representative details process conditions package itself directly immersed dip-soldering bath (dip-soldering techniques).
5996-3/13
LC662104A, 662106A, 662108A System Block Diagram
Differences between LC663XX Series LC6621XX Series
Item System differences Hardware wait time (number cycles) when hold mode cleared LC6630X Series (Including LC66599 evaluation chip) 65536 cycles About (Tcyc LC6635XB Series 16384 cycles About (Tcyc LC6621XX Series 16384 cycles About (Tcyc
Value timer after reset (Including value after hold mode FF0. cleared) DTMF generator Inverter array SIO1 Three-value inputs/comparator inputs Three-state output from Using clear halt mode External extended interrupts None (Tools handled with external devices.) None (Tools handled with external devices.) None 4-bit groups None INT3, INT4, INT5. (Tools handled with external devices.) Shared with INT2 (Tools handled with external devices.) LC66304A/306A/308A V/0.92 LC66E308/P308 V/0.92 about handling Normal voltage handling
FFC.
FFC.
None None None 4-bit groups None INT3, INT4, INT5.
None None None specified each bit. INT3, INT4, INT5 used with internal functions.
Other functions
Shared with INT2 V/0.92 LC6635XA V/3.92 V/1.96
Shared with INT2
Differences main characteristics Operating power-supply voltage operating speed (cycle time) Pull-up resistors Port voltage handling
V/0.95
about about handling Normal voltage handling P51, P53: voltage handling Others: normal voltage handling
5996-4/13
LC662104A, 662106A, 662108A Function Overview
Overview Output driver type Options State after reset
ports Input output 4-bit 1-bit units support halt mode control function (This function specified units.)
Pch: Pull-up type Nch: Intermediate sink current type
Pull-up output Output level reset
High (option)
ports Input output 4-bit 1-bit units
Pch: Pull-up type Nch: Intermediate sink current type
Pull-up output Output level reset
High (option)
P20/SI0 P21/SO0 P22/SCK0 P23/INT0
ports Input output 4-bit 1-bit units also used serial input pin. also used serial output pin. also used serial clock SCK0 pin. also used INT0 interrupt request pin, also timer event counting pulse width measurement input.
Pch: CMOS type Nch: Intermediate sink current type Nch: +15V handling when option selected
CMOS output
P30/INT1 P31/POUT0
ports Input output 3-bit 1-bit units also used INT1 interrupt request. also used square wave output from timer also support 3-state outputs.
Pch: CMOS type Nch: Intermediate sink current type Nch: +15V handling when option selected
CMOS output
P33/HOLD
Hold mode control input Hold mode HOLD instruction when HOLD low. hold mode, restarted setting HOLD high level. This used input port along with P32. When P33/HOLD level, will reset level pin. Therefore, applications must P33/HOLD when power first applied.
ports Input output 4-bit 1-bit units Input output 8-bit units when used conjunction with P53. used output 8-bit data when used conjunction with P53.
Pch: Pull-up type Nch: Intermediate sink current type Nch: +15V handkling when option selected
Pull-up output Output level reset
High (option)
Continued next page.
5996-5/13
LC662104A, 662106A, 662108A
Continued from preceding page.
Overview Output driver type Options Pull-up output Output level reset Output level after reset external pull-up resistor must supplied when used output.) State after reset
P51/DP P52/DT P53/INT2
ports Input output 4-bit 1-bit units also used dial pulse output also used DTMF output also used INT2 interrupt request.
Pch: Pull-up type Nch: Intermediate sink current type Nch: +15-V handling when option selected (P51 only)
High (option)
OSC1 OSC2
System clock oscillator connections When external clock used, leave OSC2 open connect clock signal OSC1. System reset input When P33/HOLD high level, level input will initialize CPU. test This must connected during normal operation. Power supply pins
Ceramic oscillator external clock selection
Option selection
TEST
Note: Pull-up type: output circuit includes transistor that pulls VDD. CMOS output: Complementary output. output: Open-drain output.
5996-6/13
LC662104A, 662106A, 662108A User Options Port output level options reset output levels reset ports independent 4-bit groups, selected from following options.
Option Output high reset Output reset Conditions notes four bits ports group four bits ports group
Oscillator circuit options Main clock
Option Circuit Conditions notes
External clock
OSC1
input Schmitt characteristics
Ceramic oscillator Ceramic oscillator
OSC1
OSC2
Note: There oscillator option.
Watchdog timer option runaway detection function (watchdog timer) selected option. Port output type options output type each (pin) ports (except P33/HOLD pin), selected individually from following options.
Option Circuit Output data Open-drain output Input data port inputs have Schmitt characteristics. Conditions notes
Output data Output with built-in pull-up resistor
port inputs have Schmitt characteristics. CMOS outputs (ports pull-up outputs (P0, distinguished drive capacity pchannel transistor.
Input data
5996-7/13
LC662104A, 662106A, 662108A LC662108 Series Option Data Area Definitions
area 2000H 2001H 2002H 2003H 2004H 200CH 200DH 200EH Reserved. Must predefined values. This data generated assmbler (0x). assembler used, this data Reserved. Must predefined values. This data generated assmbler (21). assembler used, this data Unused This must Location 2008H must Unused Oscillator option Unused Output level reset Option specified Output level reset Option/data relationship high level, level This must oscillator) external clock, ceramic oscillator This must level, high level none,
Watchdog timer option Unused Output type Output type Output type Output type Output type Output type
This must
Continued next page. 5996-8/13
LC662104A, 662106A, 662108A
Continued from preceding page.
area 200FH Reserved. Must predefined values. This data generated assmbler (00). assembler used, this data (00). Option specified Option/data relationship
Specifications
Absolute Maximum Ratings 25°C,
Parameter Maximum supply voltage Input voltage Symbol VIN1 VIN2 Output voltage VOUT1 VOUT2 ION1 Output current -IOP1 -IOP2 ION1 Total current ION2 IOP1 IOP2 Allowable power dissipation Operating temperature Storage temperature Topr Tstg (except P33/HOLD pin), P51, other inputs (except P33/HOLD pin) other inputs (except P33/HOLD pin), (except P33/HOLD pin) (except P33/HOLD pin) (except P33/HOLD pin) +70°C: DIP30S (MFP30S) Conditions Ratings -0.3 +7.0 -0.3 +15.0 -0.3 -0.3 +15.0 -0.3 (200) +125 Unit Note
Note: Applies pins with open-drain output specifications. pins with other than open-drain output specifications, ratings column that apply. oscillator input output pins, levels free-running oscillation level allowed. Sink current Source current recommend reflow soldering techniques solder mount packages. Please consult with your Sanyo representative details process conditions package itself directly immersed dip-soldering bath (dip-soldering techniques).
5996-9/13
LC662104A, 662106A, 662108A Allowable Operating Ranges +70°C, unless otherwise specified.
Parameter Operating supply voltage Memory retention supply voltage Symbol VDDH VIH1 Input high-level voltage VIH2 VIH3 VIL1 Input low-level voltage VIL2 VIL3 Operating frequency (instruction cycle time) [External clock input conditions] (Tcyc) VDD: During hold mode (except P33/HOLD pin), P51, P53: N-channel output transistor P33/HOLD, RES, OSC1: N-channel output transistor P50, P52: N-channel output transistor (except P33/HOLD pin), RES, OSC1: N-channel output transistor P33/HOLD: TEST: N-channel output transistor Conditions (10) Ratings 13.5 4.20 (0.95) Unit (µs) Note
Frequency
fext
4.20
Pulse width
textH, textL
OSC1: Defined Figure Input clock signal OSC1 leave OSC2 open. (External clock input must selected oscillator circuit option.)
Rise fall times
textR, textF
Note: Applies pins with open-drain specifications. However, VIH2 applied P33/HOLD pin. When ports have CMOS output specifications they cannot used input pins. Applies pins with open-drain specifications.
5996-10/13
LC662104A, 662106A, 662108A Electrical Characteristics +70°C, unless otherwise specified.
Parameter Symbol Conditions (except P33/HOLD pin), P51, P53: 13.5 with output transistor P50, P52, OSC1, RES, P33/HOLD: VDD, with output transistor VSS, with output transistor (except P33/HOLD pin) (except P33/HOLD pin): (except P33/HOLD pin): P51, P53: 13.5 Does apply P51, P53: OSC1, OSC2: Figure Figure 10.0 -0.1 -1.0 Ratings Unit Note
IIH1 Input high-level current IIH2 Input low-level current Output high-level voltage Value output pull-up resistor IIL1 VOH1 VOL1 Output low-level voltage VOL2 IOFF1 Output leakage current [Schmitt characteristics] Hysteresis voltage High-level threshold voltage Low-level threshold voltage [Ceramic oscillator] Oscillator frequency Oscillator stabilization time [Serial clock] Cycle time Input Output tCKCY tCKL tCKH tCKR, tCKF fCFS VHYS IOFF2
SCK0: With timing Figure test load Figure
Tcyc Tcyc
Low-level high-level Input pulse widths Output Rise fall times [Serial input] Data setup time Data hold time [Serial output] Output delay time [Pulse conditions] Output
tICK tCKI
SI0: With timing Figure Stipulated with respect rising edge SCK0.
tCKO
SO0: With timing Figure test load Figure Stipulated with respect falling edge SCK0.
INT0 high low-level
tIOH, tIOL
INT0: Figure conditions under which INT0 interrupt accepted, conditions under which timer event counter pulse width measurement input accepted INT1, INT2: Figure conditions under which corresponding interrupt accepted RES: Figure conditions under which reset applied.
Tcyc
High low-level pulse widths interrupt inputs other than INT0 high low-level pulse widths
tIIH, tIIL tRSH, tRSL
Tcyc Tcyc
Operating current drain
IDDHALT IDDHOLD
VDD: 4-MHz ceramic oscillator VDD: 4-MHz external clock VDD: 4-MHz ceramic oscillator VDD: 4-MHz external clock VDD:
0.01
Halt mode current drain Hold mode current drain
Note: With output transistor shared ports with open-drain output specifications. These pins cannot used input pins CMOS output specifications selected. With output transistor shared ports with open-drain output specifications. rating pull-up output specification pins stipulated terms output pull-up current IPO. These pins cannot used input pins CMOS output specifications selected. With output transistor CMOS output specification pins. With output transistor pull-up output specification pins. With output transistor open-drain output specification pins. Reset state
5996-11/13
LC662104A, 662106A, 662108A Tone (DTMF) Output Characteristics Characteristics +70°C,
Parameter Tone output voltage Row/column tone output voltage ratio Symbol DBCR1 Conditions Single tone, Dual tones, Ratings Unit Vp-p
Note*:
Figure
External clock
OSC1
(OSC2) Open textF textL textR 1/fext textH
Figure External Clock Input Waveform
OSC1
OSC2
Oscillator unstable period tCFS
Operating lower limit
Ceramic oscillator
Stable oscillation
Figure Ceramic Oscillator Circuit Table Recomended Ceramic Oscillator Constants
External capacitor type (Murata Mfg. Co., Ltd.) CSA4.00MG (Kyocera Corporation) KBR4.0MSB
Figure Oscillator Stabilization Period
Built-in capacitor type (Murata Mfg. Co., Ltd.) CST4.00MG (Kyocera Corporation) KBR4.0MKC
tCKCY tCKL SCK0 (input) (output) tCKR tCKH tCKF (input) (output) tICK tCKI tCK0
Figure Serial Timing Timing Load
Figure
5996-12/13
LC662104A, 662106A, 662108A
tI0H tI1H tRSH tI0L tI1L tPINL tRSL
Figure Input Timing INT0, INT1, INT2, pins
Figure Tone Output Load
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products (including technical data, services) described contained herein controlled under applicable local export control laws regulations, such products must exported without obtaining export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties.
This catalog provides information October, 1998. Specifications information herein subject change without notice. 5996-13/13
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