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NMOS LM7001J, 7001JM Direct Frequency Synthesizers Electroni


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Ordering number EN5262
NMOS
LM7001J, 7001JM
Direct Frequency Synthesizers Electronic Tuning
Features
LM7001J LM7001JM frequency synthesizer LSIs tuners, making possible make high-performance AM/FM tuners easily. These LSIs software compatible with LM7000, include calculation circuit. circuit includes high-speed programmable divider that divide directly. Seven reference frequencies: Band-switching outputs bits) Controller clock output (400 kHz) Clock time base output Serial input circuit data input (using DATA pins)
Package Dimensions
unit: 3006B-DIP16
[LM7001J]
SANYO: DIP16
unit: 3036B-MFP20
[LM7001JM]
SANYO: MFP20
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D3095HA (OT) 5262-1/8
LM7001J, 7001JM Assignments
Specifications
Absolute Maximum Ratings 25°C,
Parameter Maximum supply voltage Maximum input voltage Symbol VIN1 VIN2 VDD1, VDD2 DATA Input pins other than VIN1 Conditions Ratings -0.3 +7.0 -0.3 +7.0 -0.3 -0.3 +7.0 -0.3 -0.3 +125 Unit
VOUT1 Maximum output voltage VOUT2 VOUT3 Output pins other than VOUT1 VOUT2 Maximum output current Allowable power dissipation Operating temperature Storage temperature IOUT Topr Tstg 85°C: LM7001J (DIP16) 85°C: LM7001JM (MFP20)
Allowable Operating Ranges +85°C,
Parameter Supply voltage Input high-level voltage Input low-level voltage Output voltage Output current Symbol VDD1 VDD2 VOUT1 VOUT2 IOUT fIN1 Input frequency fIN2 fIN3 fIN4 Crystal element guaranteed oscillation Xtal VIN1 Input amplitude VIN2 VIN3 Note: fref fref Reference frequencies other than those refers control serial data. Conditions VDD1, circuit operating VDD2, crystal oscillator time base DATA DATA BO3, XIN, sine wave, capacitor coupled FMIN, sine wave, capacitor coupled*1, FMIN, sine wave, capacitor coupled*2, AMIN, sine wave, capacitor coupled, XOUT, XIN, sine wave, capacitor coupled FMIN, sine wave, capacitor coupled AMIN, sine wave, capacitor coupled Ratings Unit Vrms Vrms Vrms
5262-2/8
LM7001J, 7001JM Electrical Characteristics Allowable Operating Ranges
Parameter Symbol Built-in feedback resistance Input high-level current Input low-level current VOL1 Output low-level voltage VOL2 VOL3 VOL4 Output leakage current Output high-level voltage High-level 3-state leakage current Low-level 3-state leakage current Current drain Input capacitance IOFF1 IOFF2 IOFFH IOFFL IDD1 IDD2 FMIN AMIN DATA: DATA: FMIN, AMIN: IOUT SYC: IOUT BO3: IOUT PD1, PD2: IOUT SYC: VOUT BO3: VOUT PD1, PD2: IOUT -0.1 PD1, PD2: VOUT PD1, PD2: VOUT VDD1 VDD2: VDD2: block stopped FMIN 0.01 0.01 10.0 10.0 0.02 Conditions Unit
Note: With crystal connected between XOUT, fIN2 MHz, VIN2 mVrms, other input pins VSS, output pins open.
Oscillator Circuit Example
Kinseki, Ltd. HC43/U: 2114-84521 (1): HC43/U: 2114-84521 (2): Nihon Denpa Kogyou, Ltd. NR-18: LM-X-0701: Since circuit constants crystal oscillator circuit depend crystal element used printed circuit board pattern, recommend consulting with manufacturer crystal element concerning this circuit.
5262-3/8
LM7001J, 7001JM Equivalent Circuit Block Diagram
Functions
Symbol XIN, XOUT FMIN, AMIN DATA VDD1, VDD2, PD1, Controller clock (400 kHz) Crystal oscillator (7.2 MHz) Local oscillator signal input Data input Band data output. used time base output Hz). Power supply (Apply power both VDD1 VDD2 when circuit operating. VDD2 crystal oscillator time base power supply. Internal data cannot maintained VDD2 only.) Charge pump output Description
5262-4/8
LM7001J, 7001JM Data Input Timing Xtal 5.00 7.20 (typ) 8.00 Data acquisition: rising edge Note: Data transfers must started only after crystal oscillator operating normally, i.e., after proper input signal been supplied XIN.
Parameter Enable setup time Enable hold time Data setup time Data hold time Clock low-level time Clock high-level time Rise time Fall time
Symbol
Xtal: 7.20 least least least least least least
Xtal: frequencies other than least least least least least least Xtal Xtal Xtal Xtal Xtal Xtal 1.35 1.35 1.35 1.35 1.35 1.35
Example: 2.048 least 5.27 least 5.27 least 5.27 least 5.27 least 5.27 least 5.27
5262-5/8
LM7001J, 7001JM Data Input
(LSB) (MSB): Divisor data FMIN uses AMIN uses D13.
Sample calculation steps (fref kHz) 100.7 90.0 MHz, 10.7 MHz) Divisor 100.7 VCO) (fref) 1007 3EF(HEX) steps (fref kHz) 1450 1000 kHz, kHz) Divisor 1450 VCO) (fref) 91(HEX) test bits both should Band data Time base data
Note: Determined item next page. Input Don't care Output
5262-6/8
LM7001J, 7001JM Reference frequency data
fref [kHz]
Note: values listed BO1, BO2, case when data zeros.
Divider selection data FMIN, AMIN Notes Usage printed circuit board patterns
Power supply pins capacitor must inserted between power supply pins noise exclusion. This capacitor must located close possible these pins. FMIN AMIN pins coupling capacitors must located close possible these pins. pins, low-pass filter Since those high-impedance pins, they susceptible noise. Therefore, pattern should kept short possible area around this circuit should covered ground pattern. Initial states output ports (BO1 BO3) initial states output ports after power applied undefined until data been transferred. particular, possible pins output internal clock, data must transferred soon possible. However, note that cannot accept data until crystal oscillator operating normally.
5262-7/8
LM7001J, 7001JM circuit designed that does stop oscillating even control voltage (Vtune) becomes (This because circuit could become deadlocked stopped.)
products described contained herein intended surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment like, failure which directly indirectly cause injury, death property loss. Anyone purchasing products described contained herein above-mentioned shall: Accept full responsibility indemnify defend SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees, jointly severally, against claims litigation damages, cost expenses associated with such use: impose responsibility fault negligence which cited such claim litigation SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees jointly severally. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information February, 1997. Specifications information herein subject change without notice. 5262-8/8

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