LC78601E Compact Disc Player with Built-in Microcontroller O

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LC78601E Compact Disc Player with Built-in Microcontroller O

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Ordering number EN6020
LC78601E
Compact Disc Player with Built-in Microcontroller
Overview
LC78601E CMOS implements compact disc player signal processing, servo control, display, input acquisition, remote controller processing without requiring control separate microcontroller. basic functions provided include demodulation signal from optical pickup, deinterleaving, error detection correction, oversampling digital filters, converter (with built-in analog low-pass filter), driver, remote controller processing, acquisition, control processing. Thus this provide excellent cost/performance characteristics when implementing low-end player.
Functions
Implements play/pause, disc stop, track selection, fast forward, reverse, repeat mode playback track whole disc, programmed play (setup, play, clear) tracks, random repeat play under control input remote controller input. <Signal-Processing Block> Slices input high-frequency signal accurate level, converts signal, generates clock with average frequency 4.3218 using circuit that performs phase comparison with internal VCO. Accurately generates only reference clock also necessary internal timings using external 16.9344MHz crystal. Controls disc motor speed using frame difference signal created based reproduced clock signal reference clock. Performs detection, protection, interpolation frame synchronizing signal assure stable data readout. Demodulates signal, converting 8-bit symbol data.
Separates subcode data from signal outputs that data internal control processing block. After applying check subcode signal, outputs that signal internal control processing block. Buffers demodulated signal data internal compensates frames jitter disc speed fluctuations. Performs unscrambling deinterleaving reordering demodulated signal data stipulated order. Performs error detection correction flag processing (C1: dual errors, dual errors) flags based flags result processing, signal interpolated previous value hold applied based flags. Dual interpolation adopted interpolation circuit. Previous value hold applied more consecutive errors indicated flags. Performs track jump, focus start, disc motor start/stop, muting on/off, track count, other operations under control internal control processing block. Provides digital outputs. Generates converter input signals with continuity improved oversampling digital filters. Includes on-chip third-order noise shaper delta-sigma converters with built-in analog low-pass filter. Digital deemphasis circuit Adopts zero-cross muting. <Display Block> On-chip drivers 2-digit display plus play, program, repeat, random indicators On-chip bias voltage generator <Control Processing Block> matrix circuit with inputs outputs 8-key matrix Supports remote controller input.
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO products described contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D1898RM (OT) 6020-1/11
LC78601E
Features
Package: 64-pin single-voltage power supply
Package Dimensions
unit: 3159-QFP64E
[LC78601E]
SANYO: QFP64E(QIP64E)
Equivalent Circuit Block Diagram
Slice level control
clock oscillator Clock control
address generator Interpolation muting Bilingual support circuit error detection correction Flag processing Digital attenuator oversampling digital filters Digital output circuit
Synchronization detection demodulation digital servo Subcode separator QCRC
Servo commander
Crystal oscillator circuit Timing generator
System control
driver
6020-2/11
LC78601E Assignment
view
Specifications
Absolute Maximum Ratings 25°C,
Parameter Maximum supply voltage Input voltage Output voltage Allowable power dissipation Operating temperature Storage temperature Symbol VOUT Topr Tstg Conditions Ratings +125 Unit
Allowable Operating Ranges +75°C,
Parameter Supply voltage Symbol VIH1 High-level input voltage VIH2 VIH3 VIH4 VIL1 Low-level input voltage VIL2 VIL3 VIL4 Input level Operating frequency range Crystal oscillator frequency Input voltage VIN1 VIN2 VLCD1 Conditions VDD, XVDD, L/RVDD, VVDD Normal speed playback DEFI, V/*5 TMOD, *RES, HFL, *KEYI1 EFMIN PUIN, RMTSL1 REMOTE, CLOSE, DEFI, V/*5 TMOD, *RES, HFL, *KEYI1 EFMIN PUIN, RMTSL1 REMOTE, CLOSE, EFMIN: Slice level control XIN: Capacitor coupled input EFMIN XIN, XOUT 16.9344 Ratings Unit Vp-p Vp-p
6020-3/11
LC78601E Electrical Characteristics +75°C,
Parameter Current drain Symbol IIH1 IIH2 IIL1 IIL2 Applicable pins VDD, XVDD, L/RVDD, VVDD DEFI, V/*5 EFMIN, TMOD, HFL, TES, PUIN, *KEYI1 RMTSL1 REMOTE, CLOSE, *RES, LASER, FSTA, EFBAL, DEFI, V/*5 EFMIN, TMOD, HFL, TES, RMTSL2 REMOTE, *RES, PUIN, *KEYI1 RMTSL1, CLOSE EFMO, CLV, TOFF, TGL, LASER, FSTA, EFBAL, SP8, FSEQ, PCK, SLOF, SLED+, SLED-, EFLG, FSX, *AMUTE COM1 DOUT EFMO, CLV, TOFF, TGL, FSEQ, PCK, SLOF, SLED+, SLED-, *KEYO1 EFLG, FSX, RMTSL2 *AMUTE *RANDOM COM1 DOUT PDO, CLV, *KEY01 *RANDOM PDO, CLV, *KEY01 *RANDOM PUIN, *KEYI1 RMTSL1, CLOSE, *RES LASER, FSTA, EFBAL, RISET RISET -100 Conditions Ratings 1000 Unit
High-level input current
Low-level input current
VOH1 High-level output voltage VOH2 VOH3 VOH4
-0.02
VOL1 Low-level output voltage VOL2 VOL3 VOL4 VOL5 IOFFH Output leakage current IOFFL Pull-up resistance Pull-down resistance Charge pump output current IPDOH IPDOL
0.02 VOUT VOUT
1-Bit Converter Analog Characteristics 25°C, L/RVDD L/RVSS
Parameter Total harmonic distortion Dynamic range Signal-to-noise ratio Crosstalk Symbol THD+N Applicable pins LCHO, RCHO LCHO, RCHO LCHO, RCHO LCHO, RCHO Conditions kHz: data input 20kHz low-pass filter used (built-in AD725D) kHz: -60dB data input 20kHz low-pass filter filter used (built-in AD725D) kHz: data input 20kHz low-pass filter filter used (built-in AD725D) kHz: data input 20kHz low-pass filter used (built-in AD725D) Ratings 0.02 0.035 Unit
Note: Measure normal speed playback mode with Sanyo 1-bit converter block reference circuit.
6020-4/11
LC78601E 1-Bit Converter Output Block Reference Circuit
Analog output Left channel (right channel)
AD725D (Manufactured Shibasoku Ltd.)
Oscillator element
Oscillator element: 16.9344 following oscillator elements recommended CSA-309 (Citizen Watch Co., Ltd.) CSA16.93MXZ040 (Murata Mfg. Co., Ltd.) CSA16.93MXZ0C3 (built-in capacitor) (Murata Mfg. Co., Ltd.)
6020-5/11
LC78601E Functions
DEFI V/*5 VVSS ISET VVDD EFMO EFMIN TMOD TOFF LASER FSTA EFBAL FSEQ circuit pins Function Defect detection signal (DEF) input. (Must connected unused.) Supply voltage selection input. (High: operation, low: operation) Internal control phase comparator output Internal ground. This must connected output current adjustment resistor connection Internal power supply frequency range adjustment Digital system ground. This must connected Slice level control pins signal output signal input state during reset Undefined Undefined Hi-Z High output Undefined Hi-Z Pulled down Pulled down Pulled down Pulled down Undefined
Test input. This must connected Disc motor control output. This 3-value output. Track detection signal input. This Schmitt input. Tracking error signal input. This Schmitt input. Tracking output Tracking gain switching output. level output raises gain. Track jump control output. This 3-value output. Laser control. pull-down resistor built FSTA control. pull-down resistor built EFBAL control. pull-down resistor built control. pull-down resistor built Digital system power supply Synchronizing signal detection output. Outputs high level synchronizing signal detected from signal internally generated synchronizing signal match. data playback clock monitor. 4.3218 when phase locked. (Note that this output only provided test mode. This outputs level during normal mode operation.) Sled control output Sled feed output Limit switch detection input Digital output (EIAJ format) Segment output Segment output Segment output Segment output Segment output Segment output Common driver output Common driver output Common driver output Digital system ground. This must connected drive bias monitor matrix input (4). pull-up resistor built matrix input (3). pull-up resistor built matrix input (2). pull-up resistor built matrix input (1). pull-up resistor built matrix common output (1). This open-drain output. matrix common output (2). This open-drain output. Random mode indicator output (Low: random mode, high: modes other than random mode.) Remote controller identifier input (3). This functions output level during resets (when *RES low) milliseconds after *RES switches high level. Therefore, applications that will this high must connect external pull-up resistor this pin.
SLOF SLED+ SLED- PUIN DOUT COM3 COM2 COM1 VLCD1 *KEYI4 *KEYI3 *KEYI2 *KEYI1 *KEYO1 *KEYO2 *RANDOM
output High output output output Undefined output output output output output output output output output Hi-Z Hi-Z Hi-Z
RMTSL3
output
Continued next page.
6020-6/11
LC78601E
Continued from preceding page.
EFLG Function Monitor single, double error corrections. (Note that this output only provided test mode. This outputs level during normal mode operation.) Outputs 7.35 synchronizing signal that generated dividing crystal oscillator output. (Note that this output only provided test mode. This outputs level during normal mode operation.) Audio mute output signal Remote controller signal input Remote controller identifier input (2). This functions output level during resets (when *RES low) milliseconds after *RES switches high level. Therefore, applications that will this high must connect external pull-up resistor this pin. Left channel converter output converter power supply converter ground. This must connected Right channel converter output Close switch detection input. pull-up resistor built Remote controller identifier input (1). pull-up resistor built Connections 16.9344 crystal element Crystal oscillator circuit power supply reset input. Applications must this temporarily when power first applied. input. (Connected when LA9250M used.) state during reset output
*AMUTE REMOTE
output output
RMTSL2
output
LCHO L/RVDD L/RVSS RCHO CLOSE RMTSL1 XOUT XVDD *RES
Undefined Undefined Clock output
Note: same potential must connected power supply pins (VDD, VVDD, L/RVDD, XVDD).
6020-7/11
Sample Application Circuit
LC78601E
6020-8/11
Note: This circuit example typical connections used with LC78601E, complete circuit, i.e. certain peripheral components circuits have been omitted. Contact your Sanyo representative detailed information this circuit.
LC78601E Notes Application Design goes without saying that applications must strictly observe absolute maximum ratings allowable operating ranges (and recommended operating conditions) stipulated this achieve reliability system. However, also strongly recommend that designers carefully consider both mounting conditions actual usage environment, including ambient temperatures static electricity, when designing applications. This section provides additional notes concerning design, mounting, certain other points that require care during application design. Handling Unused Pins unused pins this left open state, certain internal states become undefined. Unused pins which handling specified documentation must handled specified. Also sure that output pins contact power supply ground lines other output pin. Latch-up Prevention internal structure this same potential must applied power supply pins. Also provide same potential servo system ASP. Since slice level control circuit shared with this same power supply potential must applied. Also sure apply same potential power supply pins. products which power supply pins completely isolated within special allowances apply, sure follow detailed instructions documentation. latch timing discrepancies appear between rise times different power supply pins. Design applications that discrepancies appear. raise voltage input output above level, lower voltage below VSS. This point requires special care when power first applied. allow overvoltages abnormal signal noise levels applied this general, latch-up prevented tying unused input pins VSS. However, directions unused handling documentation this must followed. short outputs. Interface When different devices connected, incorrect operation result input output levels match. Insert level shifters that destroyed connected device that uses different power-supply voltage, such dual power supply system applications. Load Capacitance Output Current load with large capacitance connected, wiring fuse since such load result equivalent output short extended period. Also, excessive charge discharge currents cause noise degrade application performance lead incorrect operation. loads recommended capacitance. Excessive output sink source currents lead problems similar those described above. this within recommended current levels while taking maximum allowable power dissipation into consideration well. Notes Power Application Reset There cases where care required power during reset, when reset state cleared. Refer specifications sheet product observe notes concerning power reset. output states, direction settings, contents registers guaranteed when power first applied this Items that defined reset operation when mode guaranteed after that operation. Applications must first apply reset this after power applied. Since states register contents that defined reset operation change over time from states early versions long term variations across lots, applications should depend these values.
6020-9/11
LC78601E Notes Thermal Design failure rate semiconductor devices accelerated higher ambient temperatures power dissipation levels. strongly recommend taking changes ambient conditions into account providing large margin possible thermal design assure high reliability. Notes Printed Circuit Board Pattern Design Ideally, influence shared impedances should minimized separating ground lines each system. Design ground lines short wide possible, have lowest high-frequency impedance possible. Ideally, decoupling capacitors (0.01 should inserted each VDD/ground pair. These capacitor should placed close corresponding possible. also appropriate insert capacitors about between each ground low-frequency filters. However, careful values that large these capacitors, since that result latch-up. servo system, reference voltage line (VREF) driver ground lines handled same way. driver ground line should made especially wide. possible, recommended driver pattern, which, being directly under device, also designed provide heat dissipation effect well. current output pickup used, locate optical pickup element connector input close together possible. Even voltage output type pickup used, conversion resistor located input should located near input. signal line should made short possible, should either located away from adjacent lines should shielded from adjacent lines shield lines. Since slice level control output (EFMO) easily disrupt signal line, resistor connected output should located close possible. Note that reducing value this resistor increases influence spurious radiation cares must taken output level when value increases. Cover area around crystal with ground pattern. Other Notes have questions during application design phase, hesitate contact your Sanyo sales representative nearest Sanyo semiconductor sales office. This specifically designed players, such specifications differ from those generalpurpose product standard logic ICs. recommend system debugging using product system itself adopting failsafe system design required application.
6020-10/11
LC78601E
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products (including technical data, services) described contained herein controlled under applicable local export control laws regulations, such products must exported without obtaining export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties.
This catalog provides information December, 1998. Specifications information herein subject change without notice. 6020-11/11

LC78601E Compact Disc Player with Built-in Microcontroller O

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