HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC CONFIGU
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MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
CONFIGURATION (TOP VIEW)
DESCRIPTION
MH4M365CXJ/CNXJ 4194304-word 36-bits dynamic RAM. This consists eight industry standard dynamic RAMs four industry dyanmic RAMs SOJ. mounting single in-line package provides application where high densities large quantities memory required. This socket-type memory module,suitable easy interchange addition modules.
[Double side]
1.Vss 2.DQ0 3.DQ16 4.DQ1 5.DQ17 6.DQ2
37.MP1 38.MP3 39.Vss 40.CAS0 41.CAS2 42.CAS3 43.CAS1 44.RAS0 45.NC 46.NC 47.W 48.NC 49.DQ8 50.DQ24 51.DQ9 52.DQ25 53.DQ10 54.DQ26 55.DQ11
FEATURES
Type name MH4M365CXJ/CNXJ-5 MH4M365CXJ/CNXJ-6 MH4M365CXJ/CNXJ-7 access access time time (max.ns) (max.ns) Address Cycle Power access dissipatime time tion (max.ns) (min.ns) (typ.mW)
7.DQ18 8.DQ3 11.NC 10.Vcc 11.NC 12.A0 13.A1 14.A2 15.A3
7240 5920 5200
72pin single in-line package Single 5.0V supply stand-by power dissipation 44mW (Max) operating power dissipation MH4M365CXJ/CNXJ- MH4M365CXJ/CNXJ- MH4M365CXJ/CNXJ-
16.A4 17.A5
CMOS lnput level 9.15W (Max) 7.48W (Max) 6.51W (Max)
18.A6 19.A10 20.DQ4 21.DQ20 22.DQ5
Hyper-page mode RAS-only refresh before refresh, Hidden refresh capabilities inputs output directly compatible 2048 refresh cycles every 32ms A10) MH4M365CXJ MH4M365CNXJ Gold plating Nickel+solder plating
23.DQ21 24.DQ6 25.DQ22 26.DQ7 27.DQ23 28.A7 29.NC
APPLICATION
Main memory unit computers, Microcomputer memory, Refresh memory
30.Vcc 31.A8 32.A9 33.NC 34.RAS2 35.MP2 36.MP0
56.DQ27 57.DQ12 58.DQ28 59.Vcc 60.DQ29 61.DQ13 62.DQ30 63.DQ14 64.DQ31 65.DQ15 66.NC 67.PD1 68.PD2 69.PD3 70.PD4 71.NC 72.Vss
Outline 72N9D-C
CONNECTION
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC FUNCTION
addition normal read, write, number other functions, e.g., hyper page mode, only refresh, input conditions each shown Table
Table Input conditions each mode
Inputs Operation Read Early write RAS-only refresh Hidden refresh before refresh Standby address Column address Input/Output Input Output
Note active, nonactive, don' care, valid, Invalid,APD applied, open
BLOCK DIAGRAM
DQ11 DQ13 DQ15 DQ10 DQ12 DQ14
DQ17 DQ19 DQ21 DQ23 DQ25 DQ27 DQ29 DQ31 DQ16 DQ18 DQ20 DQ22 DQ24 DQ26 DQ28 DQ30
417405CJ
417405CJ
417405CJ
417405CJ
44105CJ
44105CJ
44105CJ
44105CJ
417405CJ
417405CJ
417405CJ
417405CJ
CAS0 RAS0
CAS1
CAS2
CAS3 RAS2
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC ABSOLUTE MAXIMUM RATINGS
Symbol Topr Tstg Supply voltage Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Ta=25 With respect Parameter Conditions Ratings Unit
RECOMMENDED OPERATING CONDITIONS
Symbol Supply voltage Supply voltage High-level input voltage, inputs Low-level input voltage, inputs Parameter
(Ta=0 unless otherwise noted) (Note Limits Unit
Note voltage values with respect
ELECTRICAL CHARACTERISTICS
Symbol Parameter High-level output voltage Low-level output voltage Off-state output current Input current Average supply current from operating (Note 3,4,5) ICC2
(Ta=0 70°C, Vcc=5.0V 10%, Vss=0V, unless otherwise noted) (Note Test conditions IOH=-5.0mA IOL=4.2mA floating VOUT 5.5V Other inputs pins=0V Limits -120 1660 1360 1180 RAS= =VIH, output open RAS= cycling, CAS= tRC=min. output open 1660 1360 1180 1620 1320 1060 1580 1300 1140 Unit
MH4M365C MH4M365C MH4M365C
ICC1 (AV)
RAS, cycling tRC=tWC=min. output open
Supply current from stand-by (Note Average supply current from refreshing (Note 3,5) Average supply current from Hyper-Page-Mode (Note 3,4,5) Average supply current from before refresh mode (Note MH4M365C MH4M365C MH4M365C MH4M365C MH4M365C MH4M365C MH4M365C MH4M365C MH4M365C
ICC3 (AV)
ICC4(AV)
RAS=VIL, cycling tPC=min. output open
ICC6(AV)
before refresh cycling tRC=min. output open
Note Current flowing into positive, negative. Icc1 (AV), Icc3 (AV) Icc4 (AV) dependent cycle rate. Maximum current measured fastest cycle rate. Icc1 (AV) Icc4 (AV) dependent output loading. Specified values obtained with output open. Column Address changed once less while RAS=VIL CAS=VIH
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
CAPACITANCE (Ta=0 Vcc=5.0V 10%, Vss=0V, unless
Symbol (RAS) (CAS) Parameter Input capacitance,address inputs Input capacitance, write control input Input capacitance, input Input capacitance, input Input/Output capacitance, data ports VI=Vss
otherwise noted) Test conditions Limits Unit
f=1MHZ Vi=25mVrms
SWITCHING CHARACTERISTICS
Symbol
(Ta=0 10%, Vss=0V, unless otherwise noted notes 6,14,15) Limits
Parameter Access time from Access time from Column address access time Access time from precharge Output hold time from (Note Output hold time from Output impedance time from (Note (Note Output disable time after high Output disable time after high Output disable time after high (Note 12,13) (Note 12,13) (Note 7,8) (Note 7,9) (Note 7,10) (Note 7,11)
MH4M365C
MH4M365C
MH4M365C
Unit
tCAC tRAC tCPA tOHC tOHR tCLZ tWEZ tOFF tREZ
Note initial pause 500µs required after power-up followed minimum eight initialization cycles (any combination cycles containing clock such RAS-Only refresh). Note cycled during initial pause RAS/CAS cycles required after prolonged periods (greater than inactivity before proper device operation achieved. Measured with load circuit equivalent VOH=2.4V(IOH=-5mA) VOL=0.4V(IOL=-4.2mA) load 100pF. reference levels measuring output signal 2.0V(VOH) 0.8V(VOL). Assumes that tRCD tRCD(max) tASC tASC(max) CP(max). Assumes that tRCD tRCD(max) tRAD tRAD(max). tRCD tRAD greater than maximum recommended value shown this table, tRAC will increase amount that tRCD exceeds value shown. Assumes that tRAD tRAD(max) tASC tASC(max). Assumes that tCP(max) tASC tASC(max). tWEZ(max) ,tOFF(max) tREZ(max)defines time which output achieves high impedance state reference VOH(min) VOL(max). Output disabled after both high. IOUT
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC TIMING REQUIREMENTS (For Read, Write, Refresh, Hyper-Page Mode Cycles)
(Ta=0 70°C, 10%, Vss=0V, unless otherwise noted notes 14,15) Limits MH4M365C
Symbol
Parameter Refresh cycle time high pulse width Delay time, Delay time, high Delay time, high high pulse width
Column address delay time from
MH4M365C (Note16) (Note17) (Note18) (Note19)
MH4M365C
Unit
tREF tRCD tCRP tRPC tCPN tRAD tASR tASC tRAH tCAH
address setup time before
Column address setup time before
address hold time after Column address hold time after Transition time
Note timing requirements assumed =3ns. VIH(min) VIL(max) reference levels measuring timing input signals. tRCD(max) specified reference point only. tRCD less than tRCD(max), access time tRAC. tRCD greater than tRCD(max), access time controlled exclusively tCAC tAA. tRAD(max) specified reference point only. tRAD tRAD(max) tASC tASC(max), access time controlled exclusively tAA. tASC(max) specified reference point only. tRCD tRCD(max) tASC tASC(max), access time controlled exclusively tCAC. measured between VIH(min) VIL(max).
Read Refresh Cycles
Symbol Parameter Read cycle time pulse width pulse width hold time after hold time after Read Setup time before Read hold time after high Read hold time after high Column address hold time Column address hold time (Note (Note MH4M365C 10000 10000 Limits MH4M365C 10000 10000 MH4M365C 10000 10000 Unit
tRAS tCAS tCSH tRSH tRCS tRCH tRRH tRAL tCAL
Note Either tRCH tRRH must satisfied read cycle.
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC Write Cycle (Early Write)
MH4M365C Limits MH4M365C 10000 10000 10000 10000 MH1M365C
Symbol
Parameter Write cycle time pulse width pulse width hold time after hold time after Write setup time before Write hold time after Write pulse width Data setup time before Data hold time after
Unit
10000 10000
tRAS tCAS tCSH tRSH tWCS tWCH
Hyper page Mode Cycle (Read, Early Write, Hi-Z control
(Note
Symbol
Parameter Hyper page mode read/write cycle time Output hold time from pulse width read write cycle high pulse width hold time after precharge Pulse Width (Hi-Z control) (Note22) (Note23)
MH4M365C
Limits MH4M365C
MH4M365C
Unit
tHPC tDOH tRAS tCPRH tWPE
100000
100000
100000
Note previously specified timing requirements switching characteristics applicable their respective Hyper page mode cycle. tRAS(min) specified cycles input performed. tCP(max) specified reference point only.
before Refresh Cycle
Symbol tCSR tCHR Parameter
(Note Limits MH1M365C
MH1M365C
MH1M365C
Unit
setup time before hold time after
Note Eight more before cycles instead eight cycles necessary proper operation before refresh mode.
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Timing Diagrams Read Cycle
(Note
tRAS tCSH tCRP tRAD tASR A0~A10 tRAH tASC tCAH
ADDRESS
tRCD
tRSH tCAS
tCRP
tRAL tCAL
tASR
ADDRESS
COLUMN ADDRESS
tRCS tDZC
DQ(INPUTS)
tRRH tRCH
tCDD tRDD Hi-Z
tCAC tCLZ
DQ(OUTPUTS)
tREZ tOHR
DATA VALID
tWEZ tOFF tOHC
Hi-Z tRAC
Hi-Z
Note
Indicates don't care input. VIH(min) VIH(max) VIL(min) VIL(max) Indicates invalid output.
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Early Write Cycle
tRAS tCSH tCRP tASR A0~A10 tASR tRAH tASC tCAH
COLUMN ADDRESS ADDRESS
tRCD
tRSH tCAS
tCRP
ADDRESS
tWCS
DQ(INPUTS)
tWCH
DATA VALID
DQ(OUTPUTS)
Hi-Z
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Hyper Page Mode Read Cycle
tRAS tCSH tCRP tRAD tASR A0~A10 tRAH tASC tCAH tASC tCAH tASC tCPRH tCAH tRCD tCAS tHPC tCAS tRSH tCAS
tASR
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
ADDRESS
tRCS tCAL tDZC tCAL tCAL
tRRH tRCH
tWEZ tRDD tCDD tCAC tCLZ Hi-Z tCAC tDOH
DATA VALID-1 DATA VALID-2
DQ(INPUTS)
tCAC tDOH
tREZ tOHR tOFF tOHC
DATA VALID-3
DQ(OUTPUTS)
Hi-Z tRAC
tCPA
tCPA
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Hyper Page Mode Early Write Cycle
tRAS tCSH tCRP tCAL tASR A0~A10 tRAH tASC tCAH tASC tCAH tASC tCAL tCAH tRCD tCAS tHPC tCAS tRSH tCAS
tCRP
tASR
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
ADDRESS
tWCS
tWCH
tWCS
tWCH
tWCS
tWCH
DQ(INPUTS)
DATA VALID-1
DATA VALID-2
DATA VALID-3
DQ(OUTPUTS)
Hi-Z
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Hyper Page Mode Read Cycle Hi-Z control
tRAS tCSH tCRP tRAD tASR A0~A10 tRAH tASC tCAH tASC tCAH tASC tCPRH tCAH tRCD tCAS tHPC tCAS tRSH tCAS
tCRP
tASR
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
ADDRESS
tRAL tRCS tDZC tWPE tRCH tRCS
tRRH tRCH
tRDD tCDD tCAC
DQ(INPUTS)
tCAC tCLZ
tCAC tDOH
DATA VALID-1
Hi-Z
tWEZ
DATA VALID-2
tCLZ Hi-Z
tREZ tOHR tOFF tOHC
DATA VALID-3
DQ(OUTPUTS)
Hi-Z tRAC
tCPA
tCPA
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
(11/
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
RAS-only Refresh Cycle
tRAS tRPC tCRP tASR tRAH tASR tCRP
A0~A10
ADDRESS
ADDRESS
DQ(INPUT)
DQ(OUTPUT)
Hi-Z
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
before Refresh Cycle
tRPC tCSR tCPN tCHR tRAS tRAS
tRPC
tCSR
tCHR
tRPC
tCRP
tASR A0~A10 tRRH tRCH tRCS
ADDRESS COLUMN ADDRESS
DQ(INPOUT)
DQ(OUTPUT)
tREZ tOHR tOFF tOHC Hi-Z
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
Hidden Refresh Cycle (Read)
(Note
tRAS tCRP tRAD tASR A0~A10 tRAH
ADDRESS
tRAS
tRCD
tRSH
tCHR
tASC
tCAH
COLUMN ADDRESS
tASR
ADDRESS
tRCS
tRAL
tRRH tRCH
tDZC tCDD tRDD
DQ(INOUT)
Hi-Z tCAC tCLZ
tREZ tOHR tOFF tOHC
DQ(OUTPUT)
Hi-Z tRAC
DATA VALID
Hi-Z
Note Early write, delayed write, read write read modify write cycle applicable instead read cycle. Timing requirements output state same that each cycle shown above.
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
MH4M365CXJ/CNXJ-5,-6,-7
HYPER PAGE MODE 150994944-BIT 4194304-WORD 36-BIT DYNAMIC
72pin DRAM Module Outline
107.95 8.6MAX 3.38 101.19
25.4 10.16
6.35
R1.57
2.03
R1.57
1.27
1.27
6.35
35x1.27=44.45
6.35
35x1.27=44.45
MIT-DS-0086-1.1
MITSUBISHI ELECTRIC
Nov.8.96
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