FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC MH4M36CJD word 36-bit
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MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
MH4M36CJD word 36-bit dynamic module consists industry standard dynamic RAMs TSOP industry standard dynamic RAMs TSOP. mounted both sides small ceracom boards form convenient 64-pin WDIP package.
CONFIGURATION VIEW
FEATURES
Type name access access time time (max.ns) (max.ns) Address Cycle Power access access dissipatime time time tion (max.ns) (max.ns) (min.ns) (typ.mW)
MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7
7240 5920 5200
Utilizes industry standard DRAMs TSOP package DRAMs TSOP package Single 10%supply stand-by power dissipation 66mW (Max) CMOS lnput level operating power dissipation MH4M36CJD 9.15W (Max) MH4M36CJD 7.48W (Max) MH4M36CJD 6.51W (Max) inputs, output compatible capacitance 2048 refresh cycles every 32ms A10) Includes 0.22uF decoupling capacitors
APPLICATION
Main memory unit computers, Microcomputer memory, Refresh memory
DQP0 /CAS0 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQP1 /CAS1
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQP2 /CAS2 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQP3 /CAS3 /RAS0
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
FUNCTION
MH4M36CJD provide, addition normal read write number other functions, e.g., fast page mode, RAS-only refresh. input conditions each shown Table
Table Input conditions each mode
Inputs Operation Read Write (Early write) RAS-only refresh Hidden refresh before refresh Standby address Column address Input/Output Refresh Input Output Fast page mode identical Remark
Note active, nonactive, don' care, valid, Invalid,APD applied, open
BLOCK DIAGRAM
/RAS0 /CAS0
/CAS2
M5M417400CTP
M5M417400CTP
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
M5M417400CTP
M5M417400CTP
M5M44100CTP
DQP0
M5M44100CTP
DQP2
/CAS1
/CAS3
M5M417400CTP
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
M5M417400CTP
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
M5M417400CTP
M5M417400CTP
M5M44100CTP
DQP1
M5M44100CTP
DQP3
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
ABSOLUTE MAXIMUM RATINGS
Symbol Topr Tstg Supply voltage Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Ta=25 With respect Parameter Conditions Ratings (Ta=0 unless otherwise noted) (Note Limits -1.0 Unit Unit
RECOMMENDED OPERATING CONDITIONS
Symbol Supply voltage Supply voltage High-level input voltage, inputs Low-level input voltage, inputs Parameter
Note voltage values with respect
ELECTRICAL CHARACTERISTICS
Symbol Parameter High-level output voltage Low-level output voltage Off-state output current Input current Average supply current from operating (Note 3,4) ICC2
(Ta=0 Vcc=5V 10%, Vss=0V, unless otherwise noted) (Note Test conditions IOH=-5mA IOL=4.2mA floating VOUT 5.5V 6.0V, Other inputs pins=0V Limits -120 1660 1360 1180 RAS= =VIH, output open RAS= -0.5 cycling, CAS= tRC=min. output open 1660 1360 1180 1060 1580 before refresh cycling tRC=min. output open 1300 1140 Unit
MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7
ICC1 (AV)
RAS, cycling tRC=tWC=min. output open
Supply current from stand-by Average supply current from refreshing (Note Average supply current from Fast-Page-Mode (Note 3,4) Average supply current from before refresh (Note mode MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7 MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7 MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7
ICC3 (AV)
ICC4(AV)
RAS=VIL, cycling tPC=min. output open
ICC6(AV)
Note Current flowing into positive, negative. Icc1 (AV), Icc3 (AV) Icc4 (AV) Icc6 (AV) dependent cycle rate. Maximum current measured fastest cycle rate. Icc1 (AV) Icc4 (AV) dependent output loading. Specified values obtained with output open.
CAPACITANCE
Symbol (RAS) (CAS)
(Ta=0 Vcc=5V 10%, Vss=0V, unless otherwise noted) Limits
Parameter Input capacitance, address inputs Input capacitance, write control input Input capacitance, input Input capacitance, input Input/Output capacitance, data ports VI=Vss
Test conditions
Unit
f=1MHZ Vi=25mVrms
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
SWITCHING CHARACTERISTICS
(Ta=0 Vcc=5V 10%, Vss=0V, unless otherwise noted notes 5,12,13)
Limits Symbol tCAC tRAC tCPA tCLZ tOFF Parameter Access time from Access time from Columu address access time Access time from precharge Output disable time after high (Note 6,7) (Note 6,8) (Note 6,9) (Note 6,10) (Note MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7 Unit
Output impedance time from (Note
Note initial pause 500us required after power-up followed minimum eight initialization cycles (any combination cycles containing clock such RAS-Only refresh). Note cycled during initial pause RAS/CAS cycles required after prolonged periods (greater than inactivity before proper device operation achieved. Measured with load circuit equivalent 2TTL loads 100pF. Assumes that tRCD tRCD(max) tASC tASC(max). Assumes that tRCD tRCD(max) tRAD tRAD(max). tRCD tRAD greater than maximum recommended value shown this table, tRAC will increase amount that tRCD exceeds value shown. Assumes that tRAD tRAD(max) tASC tASC(max). Assumes that tCP(max) tASC tASC(max). tOFF(max) tOEZ (max) defines time which output achieves high impedance state IOUT reference VOH(min) VOL(max).
TIMING REQUIREMENTS (For Read, Write,Refresh, Fast-Page Mode Cycles)
(Ta=0 Vcc=5V 10%, Vss=0V, unless otherwise noted notes 12,13) Limits Symbol tREF tRCD tCRP tRPC tCPN tRAD tASR tASC tRAH tCAH tDZC tCDD Refresh cycle time high pulse width Delay time, Delay time, high Delay time, high high pulse width
Column address delay time from
Parameter
MH4M36CJD-5 (Note14) (Note15) (Note16) (Note17) (Note18) (Note19)
MH4M36CJD-6
MH4M36CJD-7
Unit
address setup time before
Column address setup time before
address hold time after Column address hold time after Delay time, data Delay time, high data Transition time
Note timing requirements assumed =5ns. VIH(min) VIL(max) reference levels measuring timing input signals. tRCD(max) specified reference point only. tRCD less than tRCD(max), access time tRAC. tRCD greater than tRCD(max), access time controlled exclusively tCAC tAA. tRCD(min) specified tRCD(min) =tRAH(min) +2tH+tASC(min). tRAD(max) specified reference point only. tRAD tRAD(max) tASC tASC(max), access time controlled exclusively tAA. tASC(max) specified reference point only. tRCD tRCD(max) tASC tASC(max), access time controlled exclusively tCAC. Either tDZC tDZO must satisfied. Either tCDD tODD must satisfied. measured between VIH(min) VIL(max).
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
Read Refresh Cycles
Limits Symbol tRAS tCAS tCSH tRSH tRCS tRCH tRRH tRAL Read cycle time pulse width pulse width hold time after hold time after Read Setup time after high Read hold time after Read hold time after Column address hold time (Note (Note Parameter MH4M36CJD-5 10000 10000 MH4M36CJD-6 10000 10000 MH4M36CJD-7 10000 10000 Unit
Note Either tRCH tRRH must satisfied read cycle.
Write Cycle
Limits Symbol tRAS tCAS tCSH tRSH tWCS tWCH tCWL tRWL Write cycle time pulse width pulse width hold time after hold time after Write setup time before Write hold time after hold time after hold time after Write pulse width Data setup time before Data hold time after Parameter MH4M36CJD-5 10000 10000 MH4M36CJD-6 10000 10000 MH4M36CJD-7 10000 10000 Unit
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
Fast-Page Mode Cycle (Read, Early Write Cycle)
Symbol tRAS tCPRH tCPWD Parameter Fast page mode read/write cycle time pulse width read write cycle (Note22) high pulse width hold time after precharge Delay time, precharge (Note23) (Note Limits MH4M36CJD-5 125000 MH4M36CJD-6 125000 MH4M36CJD-7 125000 Unit
Note previously specified timing requirements switching characteristics applicable their respective fast page mode cycle. tRAS(min) specified cycles input performed. tCP(max) specified reference point only.
before Refresh Cycle
Symbol tCSR tCHR tRSR tRHR Parameter
(Note Limits MH4M36CJD-5 MH4M36CJD-6 MH4M36CJD-7 Unit
setup time before hold time after Read setup time before Read hold time after
Note Eight more before cycles instead eight cycles necessary proper operation before refresh mode.
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC Timing Diagrams Read Cycle
(Note
tRAS tCSH tCRP tASR tRAD tRAH tASC tCAH tRAL tCPN
ADDRESS
tRCD
tRSH tCAS
tRPC
tCRP
tASR
ADDRESS
COLUMN ADDRESS
tRRH tRCS tRCH
tCAC tCLZ (OUTPUTS) Hi-Z tRAC
tOFF
DATA VALID
Hi-Z
Note
Indicates don't care input. VIH(min)VINVIH(max) VIL(min)VINVIL(max) Indicates invalid output.
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC Write Cycle (Early write)
tRAS tCSH tCRP tASR tASR tRAH
ADDRESS
tRCD
tRSH tCAS
tRPC
tCRP
tASC
tCAH
COLUMN ADDRESS ADDRESS
tWCS
tWCH
(INPUTS)
DATA VALID
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC RAS-only Refresh Cycle
tRAS tRPC tCRP tASR tRAH tASR tCRP
ADDRESS
ADDRESS
(INPUTS)
(OUTPUTS)
Hi-Z
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
before Refresh Cycle
tCSR tRAS tRAS
tRPC
tCHR
tRPC
tCSR
tCHR
tRPC
tCRP
tCPN tASR tRCH tRSR tRHR tRSR tRHR
ADDRESS COLUMN ADDRESS
tRCS
(INPUTS)
tOFF
(OUTPUTS)
Hi-Z
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC Hidden Refresh Cycle (Read)
(Note
tRAS tCRP tRAD tASR tRAH
ADDRESS
tRAS
tRCD
tRSH
tCHR
tASC
tCAH
COLUMN ADDRESS
tASR
ADDRESS
tRCS tRAL tDZC tCDD tRRH
(INPUTS)
Hi-Z tCAC tCLZ tOFF
(OUTPUTS)
Hi-Z tRAC
DATA VALID
Hi-Z
Note Early write cycle applicable instead read cycle. Timing requirements output state same that each cycle shown above.
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
Fast Page Mode Read Cycle
tRAS tCSH tCRP tRAD tASR tRAH tASC tCAH tASC tCAH tCPRH tASC tCAH tRCD tCAS tCAS tRSH tCAS
tASR
ADDRESS
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
tRAL tRCS tDZC tDZC tDZC tRCH tRCS tRCH tRCS
tRRH tRCH
tCDD
(INPUTS)
Hi-Z tCAC tCLZ tOFF
DATA VALID-1
Hi-Z tCAC tCLZ tOFF
DATA VALID-2
tCAC tCLZ tOFF
DATA VALID-3
(OUTPUTS)
Hi-Z tRAC
tCPA
tCPA
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC Fast Page Mode Write Cycle (Early Write)
tRAS tCSH tCRP tASR tRAH tASC tCAH tASC tCAH tASC tCAH tRCD tCAS tCAS tRSH tCAS
tASR
ADDRESS
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
tWCS (INPUTS)
tWCH
tWCS
tWCH
tWCS
tWCH
DATA VALID-1
DATA VALID-3
DATA VALID-2
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
Jun/17/1996
MH4M36CJD-5,-6,-7
FAST PAGE MODE 4194304-WORD 36-BIT DYNAMIC
4.3MAX 15.25 0.25 23.39
99.96±0.2
31X2.54=78.74
10.61±0.2
MIT-DS-0035-0.0
MITSUBISHI ELECTRIC
10.61±0.2
2.54
3.1±0.2
3.1±0.2 Jun/17/1996
23MAX
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