MH16V72TJ MH16V72TJ 16777216-word 72-bit dynamic module. This con
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MH16V72TJ
MH16V72TJ 16777216-word 72-bit dynamic module. This consist eighteen industry standard dynamic RAMs TSOP industry standard input buffer TSSOP. mounting TSOP card edge dual in-line package provides application where high densities large quantities memory required. This socket-type memory module ,suitable easy interchange addition module.
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
CONFIGURATION
85pin 94pin
1pin 10pin 11pin
FEATURES
Type name
MH16V72TJ-6 MH16V72TJ-7
/RAS /CAS Address access access access access time time time time Cycle time Power dissipation
(typ.W) (max.ns) (max.ns) (max.ns) (max.ns) (min.ns)
95pin
Utilizes industry standard RAMs TSOP industry standard input buffer TSSOP 168-pin (84-pin dual in-line package) Single +3.3V(±0.3V) supply operation stand-by power dissipation 68.4mW(Max) operation power dissipation MH16V72TJ 6.52W(Max) MH16V72TJ 5.54W(Max) input directly compatible output three-state directory LVTTL compatible Includes(0.22uF decoupling capacitors 4096 refresh cycle every 64ms Fast page mode JEDEC standard configuration Buffered Buffered input except /RAS Gold plating contact pads
124pin BACK SIDE 125pin
40pin FRONT SIDE 41pin
APPLICATION
Main memory unit computers Microcomputer memory 168pin 84pin
PD&ID TABLE
drive drive buffered. When /PDE low, information read non-buffered
MITSUBISHI ELECTRIC
MH16V72TJ
CONFIGURATION
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Name DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 Reserved Reserved /WE0 /CAS0 Reserved /RAS0 /OE0
Name /OE2 /RAS2 /CAS4 Reserved /WE2 Reserved Reserved DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35
Name DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 Reserved Reserved Reserved Reserved Reserved Reserved
Name Reserved Reserved Reserved /PDE Reserved Reserved DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQ64 DQ65 DQ66 DQ67 DQ68 DQ69 DQ70 DQ71
Reserved: Reserved RFU: Reserved future
MITSUBISHI ELECTRIC
MH16V72TJ
BLOCK DIAGRAM
/RAS0 /CAS0 /WE0 /OE0
/CAS /RAS ~DQ4
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
/RAS2 /CAS4 /WE2 /OE2
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35
NAME /RAS0, /RAS2 /CAS0, /CAS2 /WE0, /WE2 /OE0, /OE2 A0~A12, DQ0~DQ71 /CAS /RAS ~DQ4
DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQ64 DQ65 DQ66 DQ67 DQ68 DQ69 DQ70 DQ71
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
/CAS
M5M467400
/CAS
/RAS ~DQ4
/RAS ~DQ4
M5M467400
M5M467400
A1~A12
D1~D9 D10~D18 D1~D18
C1.~C20
D1~D18 INPUT BUFFER
FUNCTION ADDRESS STROBE INPUT COLUMN ADDRESS STROBE INPUT WRITE CONTROL INPUT OUTPUT ENABLE INPUT ADDRESS INPUT DATA POWER SUPPLY GROUND
MITSUBISHI ELECTRIC
MH16V72TJ
FUNCTION
MH16V72TJ provide, addition normal read, write, read-modify-write operations, number other functions, e.g., Fast page mode, /RASonly refresh, delayed-write. input conditions each shown Table
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Table Input conditions each mode
Inputs Operation /RAS Read Write (Early write) Write (Delayed write) Read-modify-write /RAS-only refresh Hidden refresh /CAS before /RAS refresh Standby /CAS address Column address Input/Output Refresh Input Output Hyper page mode identical Remark
Note active, nonactive, don' care, valid, Invalid, applied, open
MITSUBISHI ELECTRIC
MH16V72TJ
ABSOLUTE MAXIMUM RATINGS
Symbol Topr Tstg Parameter Supply voltage Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Conditions With respect Ratings -0.5~4.6 -0.5~Vcc+0.5 -0.5~Vcc+0.5 0~70 -40~100
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Unit
Ta=25°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Supply voltage Supply voltage High-level input voltage, inputs Low-level input voltage -0.3
(Ta=0~ 70°C, unless otherwise noted) (Note
Limits
Vcc+0.3
Unit
Note voltage values with respect
ELECTRICAL CHARACTERISTICS
Symbol (RAS) ICC1 (AV) Parameter High-level output voltage Low-level output voltage Off-state output current Input current (except /RAS) Input current (/RAS) Average supply current from operating
(Ta=0~ 70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted) (Note
Test conditions IOH=-2mA IOL=2mA floating 0VVOUTVcc
0VVINVcc+0.3, Other input pins=0V 0VVINVcc+0.3, Other input pins=0V
Limits
1810
Unit
(Note 3,4,5)
/RAS, /CAS cycling tRC=tWC=min. output open /RAS=/CAS =VIH, output open /RAS=/CASVcc -0.2, output open /RAS=VIL,/CAS cycling tPC=min. output open /CAS before /RAS refresh cycling tRC=min. output open
1540 1720 1450 1980 1620
ICC2
Supply current from stand-by Average supply current from Fast-Page-Mode
(Note 3,4,5)
ICC4(AV)
ICC6(AV)
Average supply current from /CAS before /RAS refresh mode
(Note 3,5)
Note Current flowing into positive, negative. Icc1 (AV), Icc3 (AV), Icc4 (AV) Icc6 (AV) dependent cycle rate. Maximum current measured fastest cycle rate. Icc1 (AV) Icc4 (AV) dependent output loading. Specified values obtained with output open. Under condition colmun address being changed once less while /RAS=VIL /CAS=VOH
CAPACITANCE
Symbol
unless otherwise noted)
Parameter
Test conditions VI=Vss f=1MHZ Vi=25mVrms
Limits
(/RAS) Input capacitance, /RAS input Input capacitance, except /RAS input C(DQ) Input/Output capacitance,DATA
Unit
MITSUBISHI ELECTRIC
MH16V72TJ
SWITCHING CHARACTERISTICS
Symbol tCAC tRAC tCPA tOEA tCLZ tOFF tOEZ
(Ta=0~70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted notes 6,14,15)
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Limits Parameter Access time from /CAS Access time from /RAS Columu address access time Access time from /CAS precharge Access time from Output impedance time from /CAS Output disable time after /CAS high Output disable time after high
(Note 7,8) (Note 7,9) (Note 7,10) (Note 7,11) (Note (Note (Note (Note
Unit
Note initial pause 500us required after power-up followed minimum eight initialization cycles (any combination cycles containing /RAS clock such /RAS-Only refresh). Note /RAS cycled during initial pause /RAS /RAS /CAS cycles required after prolonged periods (greater than /RAS inactivity before proper device operation achieved. Measured with load circuit equivalent 1TTL loads 50pF. reference levels measuring output signals 2.0(VOH)and 0.8(VOL). Assumes that tRCDtRCD(max), tASCASC(max). Assumes that tRCDtRCD(max) tRADtRAD(max). tRCD tRAD greater than maximum recommended value shown this table, tRAC will increase amount that tRCD exceeds value shown. Assumes that tRADtRAD(max) tASCtASC(max). Assumes that tCPtCP(max) tASCtASC(max). tOEZ (max) tOFF(max) defines time which output achieves high impedance state (IOUT I±10uAI) reference VOH(min) VOL(max).
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write ,Refresh, Fast-Page Mode Cycles)
(Ta=0~70°C, Vcc=3.3V±0.3V, Vss=0V, unless otherwise noted ,see notes 14,15)
Limits Symbol tREF tRCD tCRP tRPC tCPN tRAD tASR tASC tRAH tCAH tDZC tDZO tCDD tODD Parameter Refresh cycle time /RAS high pulse width Delay time, /RAS /CAS Delay time, /CAS high /RAS Delay time, /RAS high /CAS /CAS high pulse width Column address delay time from /RAS address setup time before /RAS Column address setup time before /CAS address hold time after /RAS Column address hold time after /CAS Delay time, data /CAS Delay time, data Delay time, /CAS high data Delay time, high data Transition time Unit
(Note15)
(Note16) (Note17)
(Note18) (Note18) (Note19) (Note19) (Note20)
Note timing requirements assumed =5ns. VIH(min) VIL(max) reference levels measuring timing input signals. tRCD(max) specified reference point only. tRCD less than tRCD(max), access time tRAC. tRCD greater than tRCD(max), access time controlled exclusively tCAC tAA. tRAD(max) specified reference point only. tRADtRAD(max) tASCtASC(max), access time controlled exclusively tAA. tASC(max) specified reference point only. tRCDtRCD(max) tASCtASC(max), access time controlled exclusively tCAC. Either tDZC tDZO must satisfied. Either tRDD tCDD tODD must satisfied. measured between VIH(min) VIL(max).
MITSUBISHI ELECTRIC
MH16V72TJ
Read Refresh Cycles
Limits Symbol tRAS tCAS tCSH tRSH tRCS tRCH tRRH tRAL tORH tOCH Parameter Read cycle time /RAS pulse width /CAS pulse width /CAS hold time after /RAS /RAS hold time after /CAS Read Setup time after /CAS high Read hold time after /CAS Read hold time after /RAS Column address /RAS hold time /RAS hold time after /CAS hold time after 10000 10000 10000 10000
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Unit
(Note (Note
Note Either tRCH tRRH must satisfied read cycle.
Write Cycle (Early Write Delayed Write)
Limits Symbol tRAS tCAS tCSH tRSH tWCS tWCH tCWL tRWL tOEH Parameter Write cycle time /RAS pulse width /CAS pulse width /CAS hold time after /RAS /RAS hold time after /CAS Write setup time before /CAS Write hold time after /CAS /CAS hold time after /RAS hold time after Write pulse width Data setup time before /CAS Data hold time after /CAS hold time after 10000 10000 10000 10000 Unit
(Note
Read-Write Read-Modify-Write Cycles
Limits Symbol tRWC tRAS tCAS tCSH tRSH tRCS tCWD tRWD tAWD tCWL tRWL tOEH Parameter Read write/read modify write cycle time /RAS pulse width /CAS pulse width /CAS hold time after /RAS /RAS hold time after /CAS Read setup time before /CAS Delay time, /CAS Delay time, /RAS Delay time, address /CAS hold time after /RAS hold time after Write pulse width Data setup time before /CAS Data hold time after /CAS hold time after
(Note22)
10000 10000
10000 10000
Unit
(Note23) (Note23) (Note23)
Note tRWC specified 23:tWCS, tCWD,tRWD ,tAWD and,tCPWD specified reference points only. tWCStWCS(min) cycle early write cycle pins will remain high impedance throughout entire cycle. tCWDtCWD(min), tRWDtRWD (min), tAWDtAWD(min) tCPWD tCPWD(min) (for Fast page mode cycle only), cycle read-modify-write cycle will contain data read from selected address. neither above condition (delayed write) access time until /CAS goes back VIH) indeteminate.
MITSUBISHI ELECTRIC
MH16V72TJ
Fast Page Mode Cycle (Read, Early Write, Read -Write, Read-Modify-Write Cycle) (Note
Limits Symbol tPRWC tRAS tCPRH tCPWD Parameter Fast page mode read/write cycle time
Fast page mode read write/read modify write cycle time
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Unit
/RAS pulse width read write cycle /CAS high pulse width /RAS hold time after /CAS precharge Delay time, /CAS precharge
(Note25) (Note26) (Note23)
100000
100000
Note previously specified timing requirements switching characteristics applicable their respective Fast page mode cycle. tRAS(min) specified cycles /CAS input performed. tCP(max) specified reference point only.
/CAS before /RAS Refresh Cycle (Note
Limits Symbol tCSR tCHR tRSR tRHR Parameter /CAS setup time before /RAS /CAS hold time after /RAS Read setup time before /RAS Read hold time after /RAS Unit
Note Eight more /CAS before /RAS cycles instead eight /RAS cycles necessary proper operation /CAS before /RAS refresh mode.
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Timing Diagrams Read Cycle
(Note
tRAS tCSH tCRP tASR
A0/B0-A12
tRCD
tRSH tCAS
tRPC
tCRP
tRAD tRAH tASC tCAH
COLUMN ADDRESS A0-A11
tRAL tCPN
tASR
ADDRESS A0-A11
ADDRESS
tRRH tRCS tDZC Hi-Z tCAC tCLZ
(OUTPUTS)
tRCH
tCDD
(INPUTS)
tOFF
Hi-Z tRAC tDZO
tORH DATA VALID
Hi-Z
tOEZ tOEA tOCH tODD
Note
Indicates don't care input. Indicates invalid output.
MITSUBISHI ELECTRIC
MH16V72TJ
Write Cycle (Early write)
tRAS tCSH tCRP tASR
A0/B0-A12
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
tRCD
tRSH tCAS
tRPC
tCRP
tASR tRAH tASC tCAH
COLUMN ADDRESS A0/B0-A10 ADDRESS
ADDRESS A0/B0-A10
tWCS
tWCH
(INPUTS)
DATA VALID
(OUTPUTS)
Hi-Z
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Write Cycle (Delayed write)
tRAS tCSH tCRP tASR tRAH tASC tCAH tASR
ADDRESS
tRCD
tRSH tCAS
tRPC
tCRP
A0/B0-A12
ADDRESS
COLUMN ADDRESS
tCWL tRCS tWCH tDZC
(INPUTS)
tRWL
Hi-Z tCLZ
DATA VALID
(OUTPUTS)
Hi-Z tDZO tOEZ tODD tOEH Hi-Z
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Read-Write, Read-Modify-Write Cycle
tRWC tRAS tCSH tCRP tASR tRAH tRAD tASC tCAH tASR tRCD tRSH tCAS tRPC tCRP
A0/B0-A12
ADDRESS A0/B0-A10
tRCS
COLUMN ADDRESS A0/B0-A10 tAWD tCWD tRWD
ADDRESS
tCWL tRWL
tDZC
(INPUTS)
tCAC tCLZ
Hi-Z
DATA VALID
(OUTPUTS)
Hi-Z tRAC tDZO tOEA
DATA VALID
Hi-Z tODD tOEZ tOEH
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
RAS-only Refresh Cycle
tRAS tRPC tCRP tASR tRAH tASR tCRP
A0/B0-A12
ADDRESS
ADDRESS
(INPUTS)
(OUTPUTS)
Hi-Z
MITSUBISHI ELECTRIC
MH16V72TJ
before Refresh Cycle
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
tCSR tRAS tRAS
tRPC
tCHR
tRPC
tCSR
tCHR
tRPC
tCRP
tCPN tASR
A0/B0-A12 ADDRESS COLUMN ADDRESS
tRCH tRSR tRHR tRSR tRHR
tRCS
(INPUTS)
tOFF
(OUTPUTS)
tOEZ
Hi-Z
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Hidden Refresh Cycle (Read)
(Note
tRAS tCRP tRAD tASR
A0/B0-A12
tRAS
tRCD
tRSH
tCHR
tRAH
ADDRESS
tASC
tCAH
COLUMN ADDRESS
tASR
ADDRESS
tRCS tRAL tDZC tCDD tRRH
(INPUTS)
Hi-Z tCAC tCLZ
tOFF
(OUTPUTS)
Hi-Z tRAC tDZO tOEA tORH tOEZ tODD
DATA VALID
Hi-Z
Note Early write, delayed write, read write read modify write cycle applicable instead read cycle. Timing requirements output state same that each cycle shown above.
MITSUBISHI ELECTRIC
MH16V72TJ
Fast Page Mode Read Cycle
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
tRAS tCSH tCRP tRAD tASR
A0/B0-A12
tCAS tCAS
tRCD
tRSH tCAS
tCPRH tASC tCAH
COLUMN-1
tRAH
tASC
tCAH
tASC
tCAH
tASR
ADDRESS
ADDRESS
COLUMN-2
COLUMN-3
tRAL tRCS tDZC tDZC tDZC tRCH tRCS tRCH tRCS tRRH
tRCH
tCDD
(INPUTS)
Hi-Z tCAC tCLZ tOFF tCLZ
DATA VALID-1 DATA VALID-2
Hi-Z tCAC tOFF tCAC tCLZ
DATA VALID-3
tOFF
(OUTPUTS)
Hi-Z tRAC tDZO
tCPA tOEA tOCH tOEZ tOEA tOCH
tCPA tOEZ tOEA tOCH tOEZ
tDZO tODD tODD tDZO tORH tODD
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Fast Page Mode Write Cycle (Early Write)
tRAS tCSH tCRP tASR tRAH tASC tCAH tASC tCAH tASC tCAH tRCD tCAS tCAS tRSH tCAS
tASR
ADDRESS
A0/B0-A12
ADDRESS
COLUMN-1
COLUMN-2
COLUMN-3
tWCS
(INPUTS)
tWCH
tWCS
tWCH
tWCS
tWCH
DATA VALID-1
DATA VALID-3
DATA VALID-2
(OUTPUTS)
Hi-Z
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Fast-Page Mode Write Cycle (Delayed Write)
tRAS tCSH tCRP tASR tRAH tASC tCAH tASC tCAH tRWL tCWL tRCD tCAS tRSH tCAS
tASR
ADDRESS
A0/B0-A12
ADDRESS
COLUMN-1
COLUMN-2
tRCS tWCH tDZC Hi-Z
tCWL
tPCS
tWCH
DATA VALID-1
tDZC Hi-Z
DATA VALID-2
(INPUTS)
tCLZ
(OUTPUTS)
tCLZ Hi-Z tOEZ tODD tDZO tOEZ tODD tOEH Hi-Z
Hi-Z tDZO
MITSUBISHI ELECTRIC
MH16V72TJ
Rev.3 '96.6.19
FAST PAGE MODE 1207959552 16777216 WORD DYNAMIC
Fast Page Mode Read-Write,Read-Modify-Write Cycle
tRAS tCSH tCRP tASR tRAD tRAH tASC tCAH tASC tCAH tCWL tRCD tCAS tPRWC tCAS
tRWL
tASR
ADDRESS
A0/B0-A12
ADDRESS
COLUMN-1
COLUMN-2
tAWD tRCS tRWD tDZC
(INPUTS)
tAWD tCWL tRCS tCWD
tCWD
tCPWD
DATA VALID-1
tDZC Hi-Z tCAC tCLZ
DATA VALID-2
Hi-Z tCAC tCLZ
(OUTPUTS)
Hi-Z tRAC tDZO tOEA
DATA VALID-1
Hi-Z tODD tOEZ tDZO tOEA tCPA
DATA VALID-1
Hi-Z tODD tOEZ tOEH
MITSUBISHI ELECTRIC
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