LC4101C Matrix Segment Driver Displays Overview LC4101C
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Ordering number EN5280A
LC4101C
Matrix Segment Driver Displays
Overview
LC4101C segment driver large-scale matrix panels. latches bits display data sent from controller over 4-bit 8-bit parallel connection generates drive signals. LC4100C LC4101C form large-screen panel driver chip set.
Features
Fabricated CMOS (P-sub) high-voltage process. drive voltage: Logic system power-supply voltage: max: (VDD (VDD outputs Parallel input switchable between bits DISPOFF function that locks drive voltages output fixed levels. Display duty: 1/160 1/480
Specifications
Absolute Maximum Ratings 25°C 2°C, standard VSS, VEEn VEE1 VEE2, VSSn VSS1 VSS2
Parameter Symbol Supply voltage VEEn VSSn Input voltage Operating temperature Storage temperature Topr Tstg LOAD, L/R, TEST, DISP, EIO1, EIO2 Conditions Ratings -0.3 -0.3 -0.3 +0.3 -0.3 VEEn VEEn -0.3 VSSn -0.3 +0.3 +125 Unit
Note: voltages must obey relationships VEEn VSSn. (Unit:
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, JAPAN
O3096HA (OT)/43096HA (OT) 5280-1/9
LC4101C Allowable Operating Ranges +75°C, standard VSS, VEEn VEE1 VEE2, VSSn VSS1 VSS2
Parameter Symbol Supply voltage VEEn VSSn Input high-level voltage Input voltage clock frequency High-level load pulse width High-level clock pulse width Low-level clock pulse width Load clock frequency LOAD/CP setup time LOAD/CP hold time DATA/CP setup time DATA/CP hold time input setup time Clock rise time Clock fall time clock frequency High-level load pulse width High-level clock pulse width Low-level clock pulse width Load clock frequency LOAD/CP setup time LOAD/CP hold time DATA/CP setup time DATA/CP hold time input setup time Clock rise time Clock fall time (ldh) (cph) (cpl) fload (ld) (ld) (cp) (cp) (ei) (ldh) (cph) (cpl) fload (ld) (ld) (cp) (cp) (ei) L/R, TEST, DISP, EIO1, EIO2, LOAD L/R, TEST, DISP, EIO1, EIO2, LOAD LOAD LOAD LOAD, LOAD, EIO1, EIO2 LOAD, LOAD, LOAD LOAD LOAD, LOAD, EIO1, EIO2 LOAD, LOAD, VEEn Conditions VEEn VSSn Unit
Input low-level voltage
Note: voltages must obey relationships VEEn VSSn. (Unit: When turning power supplies, first turn logic system power supply then turn high-voltage system power supply; alternatively, turn both same time. When turning power supplies, first turn high-voltage system power supply then turn logic system power supply; alternatively, turn both same time.
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LC4101C Electrical Characteristics +75°C, standard VSS,
Parameter Input high-level current Input low-level current Output high-level voltage Output low-level voltage Output resistance Current drain Operating current drain Static current Symbol ROUT Istb Conditions VDD: L/R, TEST, DISP, EIO1, EIO2, LOAD VSS: L/R, TEST, DISP, EIO1, EIO2, LOAD -0.4 EIO1, EIO2 EIO1, EIO2 OUT1 OUT240 VEEn 10%, VEEn Unit
Note: With LOAD kHz, MHz, with output load. Input voltages must VSS, respectively. standby current drain rating assumes that EIOn (input) VDD.
Block Diagram
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LC4101C Switching Characteristics 10%, +75°C
Parameter output delay time LD/EIO output delay time LOAD-OUTn delay time DF-OUTn delay time Symbol (eo) (leo) (ldo) (dfo) capacitive load capacitive load capacitive load capacitive load Conditions Unit
+75°C
Parameter output delay time LD/EIO output delay time LOAD-OUTn delay time DF-OUTn delay time Symbol (eo) (leo) (ldo) (dfo) capacitive load capacitive load capacitive load capacitive load Conditions Unit
Note: Since this detects inputs rising edge signal, inputs must before first data input. result, tho(ld) clock stop period required directly after rise LOAD signal clock frequency relatively high.
Note: this used with 4-bit width data input, number data clocks between LOAD next LOAD must doubled.
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LC4101C Functions
Symbol drive outputs OUT1 OUT240 Data DISP OUTn Function
Note: don't care VEE1/VEE2 VSS1/VSS2 DISP
level drive voltage input level drive voltage input level drive voltage input level drive voltage input
pins with same name must same potential.
High-voltage block power supply. VEE1 VEE2 must have same potential. High-voltage block ground. VSS1 VSS2 must have same potential. outputs will held fixed level when this low. Alternation input Enable inputs outputs EIO1 EIO2
EIO1 EIO2
Enable inputs: first stage enable input VSS, then connect enable input each following stage enable output preceding stage. Enable outputs: When connecting multiple chips cascade, connect enable output enable input next stage. LOAD Data acquisition clock (falling edge) Data load clock (falling edge) 4-bit/8-bit switching signal; high: bits, low: bits Data latch high)
Note: numbers table indicate output numbers.
Continued next page.
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LC4101C
Continued from preceding page.
Symbol Data latch low)
Function
Note: numbers table indicate output numbers. Test input. This must connected externally. Parallel data inputs. used when 4-bit input used. that case, must connected VSS. Logic system power supply Logic system ground
TEST
Assignment
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LC4101C Coordinates
Signal OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 OUT15 OUT16 OUT17 OUT18 OUT19 OUT20 OUT21 OUT22 OUT23 OUT24 OUT25 OUT26 OUT27 OUT28 OUT29 OUT30 OUT31 OUT32 OUT33 OUT34 OUT35 OUT36 OUT37 OUT38 OUT39 OUT40 OUT41 OUT42 OUT43 OUT44 OUT45 OUT46 OUT47 OUT48 OUT49 OUT50 coordinate -8365 -8295 -8225 -8155 -8085 -8015 -7945 -7875 -7805 -7735 -7665 -7595 -7525 -7455 -7385 -7315 -7245 -7175 -7105 -7035 -6965 -6895 -6825 -6755 -6685 -6615 -6545 -6475 -6405 -6335 -6265 -6195 -6125 -6055 -5985 -5915 -5845 -5775 -5705 -5635 -5565 -5495 -5425 -5355 -5285 -5215 -5145 -5075 -5005 -4935 coordinate Signal OUT51 OUT52 OUT53 OUT54 OUT55 OUT56 OUT57 OUT58 OUT59 OUT60 OUT61 OUT62 OUT63 OUT64 OUT65 OUT66 OUT67 OUT68 OUT69 OUT70 OUT71 OUT72 OUT73 OUT74 OUT75 OUT76 OUT77 OUT78 OUT79 OUT80 OUT81 OUT82 OUT83 OUT84 OUT85 OUT86 OUT87 OUT88 OUT89 OUT90 OUT91 OUT92 OUT93 OUT94 OUT95 OUT96 OUT97 OUT98 OUT99 OUT100 coordinate -4865 -4795 -4725 -4655 -4585 -4515 -4445 -4375 -4305 -4235 -4165 -4095 -4025 -3955 -3885 -3815 -3745 -3675 -3605 -3535 -3465 -3395 -3325 -3255 -3185 -3115 -3045 -2975 -2905 -2835 -2765 -2695 -2625 -2555 -2485 -2415 -2345 -2275 -2205 -2135 -2065 -1995 -1925 -1855 -1785 -1715 -1645 -1575 -1505 -1435 coordinate
Continued next page.
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LC4101C
Continued from preceding page.
Signal OUT101 OUT102 OUT103 OUT104 OUT105 OUT106 OUT107 OUT108 OUT109 OUT110 OUT111 OUT112 OUT113 OUT114 OUT115 OUT116 OUT117 OUT118 OUT119 OUT120 OUT121 OUT122 OUT123 OUT124 OUT125 OUT126 OUT127 OUT128 OUT129 OUT130 OUT131 OUT132 OUT133 OUT134 OUT135 OUT136 OUT137 OUT138 OUT139 OUT140 OUT141 OUT142 OUT143 OUT144 OUT145 OUT146 OUT147 OUT148 OUT149 OUT150 coordinate -1365 -1295 -1225 -1155 -1085 -1015 -945 -875 -805 -735 -665 -595 -525 -455 -385 -315 -245 -175 -105 1015 1085 1155 1225 1295 1365 1435 1505 1575 1645 1715 1785 1855 1925 1995 2065 coordinate Signal OUT151 OUT152 OUT153 OUT154 OUT155 OUT156 OUT157 OUT158 OUT159 OUT160 OUT161 OUT162 OUT163 OUT164 OUT165 OUT166 OUT167 OUT168 OUT169 OUT170 OUT171 OUT172 OUT173 OUT174 OUT175 OUT176 OUT177 OUT178 OUT179 OUT180 OUT181 OUT182 OUT183 OUT184 OUT185 OUT186 OUT187 OUT188 OUT189 OUT190 OUT191 OUT192 OUT193 OUT194 OUT195 OUT196 OUT197 OUT198 OUT199 OUT200 coordinate 2135 2205 2275 2345 2415 2485 2555 2625 2695 2765 2835 2905 2975 3045 3115 3185 3255 3325 3395 3465 3535 3605 3675 3745 3815 3885 3955 4025 4095 4165 4235 4305 4375 4445 4515 4585 4655 4725 4795 4865 4935 5005 5075 5145 5215 5285 5355 5425 5495 5565 coordinate
Continued next page.
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LC4101C
Continued from preceding page.
Signal OUT201 OUT202 OUT203 OUT204 OUT205 OUT206 OUT207 OUT208 OUT209 OUT210 OUT211 OUT212 OUT213 OUT214 OUT215 OUT216 OUT217 OUT218 OUT219 OUT220 OUT221 OUT222 OUT223 OUT224 OUT225 OUT226 OUT227 OUT228 OUT229 OUT230 OUT231 OUT232 OUT233 OUT234 OUT235 OUT236 coordinate 5635 5705 5775 5845 5915 5985 6055 6125 6195 6265 6335 6405 6475 6545 6615 6685 6755 6825 6895 6965 7035 7105 7175 7245 7315 7385 7455 7525 7595 7665 7735 7805 7875 7945 8015 8085 coordinate Signal OUT237 OUT238 OUT239 OUT240 VEE1 VSS1 EIO2 EIO1 LOAD DISP TEST VSS2 VEE2 coordinate 8155 8225 8295 8365 8295 7895 7495 7095 6695 6295 5055 4855 4655 4455 4255 4055 3855 3655 3335 -1295 -1895 -3095 -3495 -3695 -3895 -4095 -4495 -4695 -5095 -6295 -6695 -7095 -7495 -7895 -8295 coordinate -895 -885 -885 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -895 -885 -885 -885 -885 -885 -895
products described contained herein intended surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment like, failure which directly indirectly cause injury, death property loss. Anyone purchasing products described contained herein above-mentioned shall: Accept full responsibility indemnify defend SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees, jointly severally, against claims litigation damages, cost expenses associated with such use: impose responsibility fault negligence which cited such claim litigation SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees jointly severally. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information October, 1996. Specifications information herein subject change without notice.
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