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LC75394NE Single-Chip Electronic Volume Control System Overv
Top Searches for this datasheetOrdering number EN5466 LC75394NE Single-Chip Electronic Volume Control System Overview LC75394NE electronic volume control system providing control over volume, balance, 5-band equalizer, input switching based serial inputs. Package Dimensions unit: 3159-QFP64E [LC75394NE] Functions Volume control: chip provides levels volume attenuation: steps between 3-dB steps between 4-dB steps between 4.5-dB steps between Independent control over left right channels provides balance control. Equalizer: chip provides control 2-dB steps over range between Four five bands have peaking equalization; remaining one, shelving equalization. Selector: left right channels each offer choice four inputs. external constant determines amplification input signal. SANYO: QFP64E Features Built-in buffer amplifiers reduce number external parts necessary. Silicon gate CMOS reduces switching noise. Serial data input -Supports CCB* format communication with system controller. built-in reference voltage circuit divides supply voltage (VDD) half. trademark SANYO ELECTRIC CO., LTD. SANYO's original format addresses controlled SANYO. Specifications Absolute Maximum Ratings 25°C, Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol Topr Tstg LTIN, RTIN, LVRIN, RVRIN 85°C Conditions Ratings +125 Unit SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, JAPAN 91096HA (OT)/81095HA (OT) 5466-1/17 LC75394NE Allowable Operating Ranges 25°C, Parameter Supply voltage Input high level voltage Input level voltage Input voltage amplitude Input pulse width Setup time Hold time Operating frequency Symbol tSETUP tHOLD fopg LTIN, RTIN, LVRIN, RVRIN Conditions 11.0 Unit Vp-p Electrical Characteristics 25°C, Parameter [Input block] Input resistance Clipping level Output load resistance [Volume control block] Input resistance [Equalizer control block] Control range Step resolution Internal feedback resistance [Overall characteristics] Total harmonic distortion Crosstalk Output maximum attenuation Output noise voltage Current drain Input high level current Input level current Vrms, kHz, with controls flat overall Vrms, kHz, with controls flat overall Vrms, kHz, with controls flat overall, Vrms, kHz, main volume With controls flat overall (IHF-A), With controls flat overall (DIN-AUDIO), 0.0033 0.012 Estep Rfeed Max, boost/cut LVRIN, RVRIN LSELO, RSELO: 1.0% LSELO, RSELO 2.65 Vrms Symbol Conditions Unit Input Amplifier Characteristics 25°C, Parameter Input offset voltage Input offset current Open-loop voltage gain Width band Allowable load resistance Symbol Conditions Unit 5466-2/17 LC75394NE Equivalent Block Diagram Sample Application Circuit 5466-3/17 LC75394NE Test Circuits Total Harmonic Distortion 5466-4/17 LC75394NE Output Noise Voltage 5466-5/17 LC75394NE Crosstalk 5466-6/17 LC75394NE Assignment 5466-7/17 LC75394NE Functions Symbol LF1C1 LF1C2 LF1C3 RF1C1 RF1C2 RF1C3 LF2C1 LF2C2 LF2C3 RF2C1 RF2C2 RF2C3 LF3C1 LF3C2 LF3C3 RF3C1 RF3C2 RF3C3 LF4C1 LF4C2 LF4C3 RF4C1 RF4C2 RF4C3 band control block right channel. Connect external capacitors. band control block left channel. Connect external capacitors. band control block right channel. Connect external capacitors. band control block left channel. Connect external capacitors. band control block right channel. Connect external capacitors. band control block left channel. Connect external capacitors. band control block right channel. Connect external capacitors. band control block left channel. Connect external capacitors. Function Note LTIN RTIN Tone control inputs. Must driven with low-impedance circuits. LSELO RSELO Input selector outputs band control block. Connect external capacitors. AVSS Power supply connection Grounds internal logic Ground internal operational amplifier Signal inputs Continued next page. 5466-8/17 LC75394NE Continued from preceding page. Symbol Function Note Vref VDD/2 voltage generator block. Connect capacitors between Vref minimize effects power supply ripple. LVref RVref Pins common volume control, tone control, input selection blocks. Select capacitors between these pins carefully they contribute residual resistance when volume turned down. voltage must never exceed VDD. LINVIN1 RINVIN1 Operational amplifier inverted input specifying input gain. LINVIN2 RINVIN2 Operational amplifier inverted input specifying graphic equalization. Connecting capacitor across INVIN2 TOUT permits removal unwanted bands reduces risk oscillation. LTOUT RTOUT Tone control output LVRIN RVRIN Volume control input. Must driven with low-impedance circuits. LVROUT RVROUT Volume control output Chip enable pin. chip uses falling edge timing write data internal latch shift analog switches. high level enables data transfer. Serial data clock input used control Leave unconnected 5466-9/17 LC75394NE Input Block Internal Equivalent Circuit Diagram Volume Control Block Internal Equivalent Diagram 5466-10/17 LC75394NE Equalizer Control Block Internal Equivalent Circuit (Bands Calculating Size External Capacitors LC75394NE supports four bands with peaking characteristics band with shelving characteristics Peaking Characteristics (bands external capacitor functions structural element simulated inductor. equivalent circuit calculations required achieve desired center frequency shown below. Equivalent circuit simulated inductor 5466-11/17 LC75394NE Calculation example Specifications: Central frequency, factor maximum boost, Q+10 Calculate sharpness simulated inductance itself. R4)/R1 Q+10dB Note: from separately issued internal block diagram. 4.270 Calculate 1/2FOR1QO 0.536 (µF) Calculate QO/2FOR2 0.021 (µF) Sample results Central frequency (Hz) 1070 3400 0.536 0.169 0.054 0.017 0.021 6663 2117 Shelving characteristics (Band Achieving desired control 2-dB steps over range between requires choosing capacitor, with impedance 5466-12/17 LC75394NE Control System Timing Data Formats LC75394NE receives control sequences serial interface comprised pins Each sequence consists bits: 8-bit address followed bits data. 5466-13/17 LC75394NE 5466-14/17 LC75394NE 5466-15/17 LC75394NE Usage Notes When power first applied, internal analog switches indeterminate states. chip therefore requires muting other external measures until received proper data. Provide grounding patterns shielding lines pins prevent their high-frequency data signals from interfering with operation nearby analog circuits. 5466-16/17 LC75394NE products described contained herein intended surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment like, failure which directly indirectly cause injury, death property loss. Anyone purchasing products described contained herein above-mentioned shall: Accept full responsibility indemnify defend SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees, jointly severally, against claims litigation damages, cost expenses associated with such use: impose responsibility fault negligence which cited such claim litigation SANYO ELECTRIC CO., LTD., affiliates, subsidiaries distributors their officers employees jointly severally. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information September, 1996. Specifications information herein subject change without notice. 5466-17/17 Other recent searchesWH109-S - WH109-S WH109-S Datasheet UDA1328T - UDA1328T UDA1328T Datasheet SLLS067F - SLLS067F SLLS067F Datasheet MPC8533EEC - MPC8533EEC MPC8533EEC Datasheet MC68181P - MC68181P MC68181P Datasheet LQFP128-P-1420-0 - LQFP128-P-1420-0 LQFP128-P-1420-0 Datasheet LM510X - LM510X LM510X Datasheet HS-82C08RH - HS-82C08RH HS-82C08RH Datasheet FJP1943 - FJP1943 FJP1943 Datasheet
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