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SAA55xx microcontrollers with Closed Captioning (CC) On-Screen Display
Top Searches for this datasheetSAA55xx microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Preliminary specification Supersedes data 1999 File under Integrated Circuits, IC02 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) CONTENTS 10.1 10.2 10.3 10.4 11.1 11.2 11.3 11.4 13.1 14.1 14.2 14.3 14.4 FEATURES GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning description MICROCONTROLLER Microcontroller features MEMORY ORGANIZATION bank switching organisation Data memory memory Character feature bits External (auxiliary) memory REDUCED POWER MODES Idle mode Power-down mode Standby mode FACILITY ports Port type Port alternative functions support INTERRUPT SYSTEM Interrupt enable structure Interrupt enable priority Interrupt vector address Level/edge interrupt TIMER/COUNTER WATCHDOG TIMER Watchdog Timer operation PULSE WIDTH MODULATORS control Tuning Pulse Width Modulator (TPWM) TPWM control Software (SAD) I2C-BUS SERIAL 15.1 16.1 16.2 16.3 16.4 17.1 18.1 18.2 18.3 18.4 18.5 18.6 18.7 18.8 18.9 18.10 18.11 18.12 18.13 18.14 18.15 26.1 26.2 26.3 26.4 I2C-bus port selection MEMORY INTERFACE Memory structure Memory mapping Addressing memory Page clearing DATA CAPTURE Data Capture features DISPLAY SAA55xx Display features Display modes Display feature descriptions Character attribute coding Screen global controls Text display controls Display positioning Character addressing Redefinable characters Display synchronization Video/Data switch (Fast Blanking) polarity Video/data switch adjustment brightness control Contrast reduction MEMORY MAPPED REGISTERS (MMR) LIMITING VALUES CHARACTERISTICS QUALITY RELIABILITY APPLICATION INFORMATION ELECTROMAGNETIC COMPATIBILITY (EMC) GUIDELINES PACKAGE OUTLINES SOLDERING Introduction soldering through-hole mount packages Soldering dipping solder wave Manual soldering Suitability through-hole mount packages dipping wave soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE PHILIPS COMPONENTS 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) FEATURES SAA55xx Single-chip microcontroller with integrated On-Screen Display (OSD) Time Programmable (OTP) memory both Program character sets Single power supply: tolerant digital inputs port individual addressable controls Programmable push-pull, open-drain quasi-bidirectional port lines with sink <0.4 capability, direct drive Light Emitting Diode (LED) Single crystal oscillator microcontroller, data capture Power reduction modes: Standby, Idle Power-down Byte level I2C-bus with dual port (Slave mode kHz) Dynamically Redefinable Characters OSDs Special graphic characters allowing four colours character Selectable character height lines compatibility throughout family Operating temperature: +70°C. GENERAL DESCRIPTION SAA55xx only family devices derivative Philips industry standard 80C51 microcontroller intended central control mechanism television receiver. They provide control functions television system, On-Screen Display (OSD) some versions include integrated data capture function. main differences between only family SAA55xx Text/CC family baseline devices are: Program size: 64-kbyte Display size: 1.25-kbyte page Text CC/OSD) Auxiliary size: 0.75-kbyte teletext data capture (Closed Caption only) Additional power saving mode (Standby). 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) QUICK REFERENCE DATA SYMBOL Supply VDDX IDDP IDDC IDDC(id) IDDC(pd) IDDC(stb) IDDA IDDA(id) IDDA(pd) IDDA(stb) fxtal Tamb Tstg Note Peripheral supply current dependent external components voltage levels I/Os. ORDERING INFORMATION TYPE NUMBER(1) NAME SAA5540PS/nnnn SAA5541PS/nnnn SAA5542PS/nnnn SAA5543PS/nnnn SAA5547PS/nnnn Notes `nnnn' four digit number uniquely referencing microcontroller program mask. details LQFP100 package, please contact your local regional sales office availability. SDIP52 PACKAGE(2) DESCRIPTION plastic shrink dual in-line package; leads (600 mil) VERSION SOT247-1 16-kbyte 32-kbyte 48-kbyte 64-kbyte 24-kbyte supply voltage (VDD VSS) periphery supply current; note core supply current Idle mode core supply current Power-down mode core supply current Standby mode core supply current analog supply current Idle mode analog supply current Power-down mode analog supply current Standby mode analog supply current Fundamental mode nominal frequency operating ambient temperature storage temperature +125 PARAMETER MIN. TYP. SAA55xx MAX. UNIT 256-byte 512-byte 750-byte 750-byte 750-byte 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) BLOCK DIAGRAM SAA55xx handbook, full pagewidth I2C-bus, general CONTROL INTERFACE 64-KBYTE) MICROPROCESSOR (80C51) SRAM (256-BYTE) DRAM 2-KBYTE) MEMORY INTERFACE CVBS DATA CAPTURE DISPLAY CVBS DATA CAPTURE TIMING DISPLAY TIMING GSA005 VSYNC HSYNC Fig.1 Block diagram (top level architecture). 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) PINNING INFORMATION Pinning SAA55xx handbook, halfpage P2.0/TPWM P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 P3.0/ADC0 P1.5/SDA1 P1.4/SCL1 P1.7/SDA0 P1.6/SCL0 P1.3/T1 P1.2/INT0 P1.1/T0 P1.0/INT1 VDDP RESET XTALOUT XTALIN OSCGND P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 VSSC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 VSSA CVBS0 CVBS1 SYNC_FILTER IREF MBK951 SAA55xx VDDC VSSP VSYNC HSYNC VDDA P3.4/PWM7 FRAME Fig.2 SDIP52 configuration. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx P2.0/TPWM P2.6/PWM5 P2.5/PWM4 P2.4/PWM3 P2.3/PWM2 P2.2/PWM1 P2.1/PWM0 P1.5/SDA1 P1.7/SDA0 P1.4/SCL1 P1.6/SCL0 P1.2/INT0 handbook, full pagewidth P2.7/PWM6 P3.0/ADC0 n.c. P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 n.c. n.c. n.c. P1.0/INT1 VDDP n.c. RESET n.c. XTALOUT XTALIN OSCGND n.c. n.c. n.c. n.c. n.c. VDDC VPE_2 n.c. VSSP P3.6 n.c. n.c. n.c. VSYNC P3.5 HSYNC n.c. n.c. GSA001 P1.3/T1 P1.1/T0 n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. VSSC VSSP P0.5 n.c. n.c. P0.0 P0.1 P0.2 n.c. n.c. n.c. P0.3 n.c. P0.4 P3.7 n.c. n.c. P0.6 P0.7 VSSA CVBS0 CVBS1 n.c. SYNC_FILTER IREF n.c. n.c. n.c. n.c. n.c. FRAME P3.4/PWM7 VDDA n.c. SAA55xx Fig.3 LQFP100 configuration. 2000 n.c. Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) description SDIP52 LQFP100 packages SYMBOL SDIP52 P2.0/TPWM P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 P3.0/ADC0 P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 P3.4/PWM7 P3.5 P3.6 P3.7 VSSC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 VSSA CVBS0 CVBS1 SYNC_FILTER IREF FRAME LQFP100 analog ground core ground TYPE DESCRIPTION SAA55xx Table Port 8-bit programmable bidirectional port with alternative functions. P2.0/TPWM output 14-bit high precision PWM. P2.1/PWM0 P2.7/PWM6 outputs 6-bit PWMs Port 8-bit programmable bidirectional port with alternative functions. P3.0/ADC0 P3.3/ADC3 inputs software facility. P3.4/PWM7 output 6-bit PWM7. P3.5 P3.7 have alternative functions only available with LQFP100 package. Port 8-bit programmable bidirectional port. P0.5 P0.6 have current sinking capability direct drive LEDs. Composite Video Baseband Signal (CVBS) input. positive-going (peak-to-peak) input required. Connected capacitor. CVBS sync filter input. This should connected VSSA capacitor. Reference current input analog circuits, connected VSSA resistor. De-interlace output synchronised with VSYNC pulse produce non-interlaced display adjustment vertical deflection circuits. programming voltage 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SYMBOL SDIP52 LQFP100 TYPE DESCRIPTION SAA55xx Open-drain, active output which allows selective contrast reduction picture enhance mixed mode display. +3.3 analog power supply Pixel rate output BLUE colour information. Pixel rate output GREEN colour information. Pixel rate output colour information. Video/data switch push-pull output rate fast blanking. Schmitt triggered input version horizontal sync pulse. polarity this pulse programmable register TXT1.H POLARITY. Schmitt triggered input version vertical sync pulse. polarity this pulse programmable register TXT1.V POLARITY. periphery ground +3.3 core power supply crystal oscillator ground crystal oscillator input crystal oscillator output reset input HIGH least machine cycles oscillator periods) while oscillator running, device reset. This should connected VDDP capacitor. +3.3 periphery power supply Port 8-bit programmable bidirectional port with alternative functions. P1.0/INT1 external interrupt which triggered rising falling edge pulse. P1.1/T0 Counter/Timer P1.2/INT0 external interrupt P1.3/T1 Counter/Timer P1.6/SCL0 serial clock input I2C-bus P1.7/SDA0 serial data port I2C-bus. P1.4/SCL1 serial clock input I2C-bus P1.5/SDA1 serial data port I2C-bus. programming voltage connected VDDA HSYNC VSYNC VSSP VDDC OSCGND XTALIN XTALOUT RESET VDDP P1.0/INT1 P1.1/T0 P1.2/INT0 P1.3/T1 P1.6/SCL0 P1.7/SDA0 P1.4/SCL1 P1.5/SDA1 VPE_2 n.c. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) MICROCONTROLLER MEMORY ORGANIZATION SAA55xx functionality microcontroller used this device described here with reference industry standard 80C51 microcontroller. full description functionality found "Handbook IC20, 80C51-Based 8-bit Microcontrollers". Microcontroller features device capability maximum 64-kbyte Program 2-kbyte Data internally. bank switching Program does exceed kbytes only variants, bank switching required. memory security bits structured shown Fig.4. only security bits shown Fig.5 production programmed devices. only security bits shown Fig.6 production blank devices. organisation 80C51 microcontroller core standard instruction timing machine cycle Maximum 8-bit program 8-bit auxiliary RAM, maximum 1.25 kbytes required display Interrupt controller individual enable/disable with level priority 16-bit timer/counter registers Watchdog Timer Auxiliary page pointer 16-bit data pointer Standby, Idle Power-down modes general lines Eight 6-bit Pulse Width Modulator (PWM) outputs control analog signals 14-bit Voltage Synthesis Tuner (VST) control 8-bit Analog-to-Digital Converter (ADC) with four multiplexed inputs high current outputs directly driving LEDs I2C-bus byte level interface with dual ports. Internal Data organized into areas, Data memory Special Function Registers (SFRs). Data memory Data memory 8-bit, occupies address range when using indirect addressing when using direct addressing. SFRs occupy address range accessible using direct addressing only. lower bytes Data memory mapped shown Fig.8. lowest bytes grouped into banks registers, next bytes above register banks form block addressable memory space. upper bytes allocated special area functions. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth MEMORY SECURITY BITS INTERACTION USER PROGRAMMING (ENABLE/DISABLE) VERIFY (ENABLE/DISABLE) PROGRAM USER (64K 8-BIT) CHARACTER USER PROGRAMMING (ENABLE/DISABLE) VERIFY (ENABLE/DISABLE) USER 12-BIT) GSA006 Fig.4 Memory security structures. handbook, full pagewidth MEMORY SECURITY BITS USER PROGRAMMING (ENABLE/DISABLE) VERIFY (ENABLE/DISABLE) ENABLED PROGRAM DISABLED CHARACTER DISABLED ENABLED GSA007 Fig.5 Security bits production devices. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth MEMORY SECURITY BITS USER PROGRAMMING (ENABLE/DISABLE) VERIFY (ENABLE/DISABLE) ENABLED PROGRAM ENABLED CHARACTER ENABLED ENABLED GSA008 Fig.6 Security bits production blank devices. handbook, halfpage DATA MEMORY SPECIAL FUNCTION REGISTERS upper bytes lower bytes accessible direct indirect addressing MBK956 accessible indirect addressing only accessible direct addressing only Fig.7 Internal data memory. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, halfpage bit-addressable space (bit addresses 7FH) banks registers MGM677 Fig.8 Lower bytes internal RAM. 2000 This text here white force landscape pages rotated correctly when browsing through Acrobat reader.This text here _white force landscape pages rotated correctly when browsing through Acrobat reader.This text here inThis text here white force landscape pages rotated correctly when browsing through Acrobat reader. white force landscape pages memory 2000 Philips Semiconductors microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Special Function Register (SFR) space used port latches, timer, peripheral control, acquisition control, display control, etc. These registers only accessed direct addressing. Sixteen addresses space both byte addressable. addressable SFRs those whose address ends summary address order shown Table description each bits shown Table which presents SFRs alphabetical order. Table memory NAME PCON TCON TMOD P0CFGA P0CFGB SADB P1CFGA P1CFGB P2CFGA P2CFGB TXT18 TXT19 TXT20 DPL7 DPH7 GATE TL07 TL17 TH07 TH17 P0CFGA7 P0CFGB7 P1CFGA7 P1CFGB7 P2CFGA7 P2CFGB7 NOT3 DRCS ENABLE DPL6 DPH6 TL06 TL16 TH06 TH16 P0CFGA6 P0CFGB6 P1CFGA6 P1CFGB6 P2CFGA6 P2CFGB6 EBUSY NOT2 PLANES DPL5 DPH5 TL05 TL15 TH05 TH15 P0CFGA5 P0CFGB5 P1CFGA5 P1CFGB5 P2CFGA5 P2CFGB5 NOT1 DPL4 DPH4 TL04 TL14 TH04 TH14 P0CFGA4 P0CFGB4 DC_COMP P1CFGA4 P1CFGB4 P2CFGA4 P2CFGB4 NOT0 DPL3 DPH3 GATE TL03 TL13 TH03 TH13 P0CFGA3 P0CFGB3 SAD3 P1CFGA3 P1CFGB3 P2CFGA3 P2CFGB3 LANG ENABLE DPL2 DPH2 TL02 TL12 TH02 TH12 P0CFGA2 P0CFGB2 SAD2 P1CFGA2 P1CFGB2 P2CFGA2 P2CFGB2 LAN2 DPL1 DPH1 TL01 TL11 TH01 TH11 P0CFGA1 P0CFGB1 SAD1 P1CFGA1 P1CFGB1 P2CFGA1 P2CFGB1 LAN1 DPL0 DPH0 TL00 TL10 TH00 TH10 P0CFGA0 P0CFGB0 SAD0 P1CFGA0 P1CFGB0 P2CFGA0 P2CFGB0 LAN0 RESET Preliminary specification SAA55xx This text here white force landscape pages rotated correctly when browsing through Acrobat reader.This text here _white force landscape pages rotated correctly when browsing through Acrobat reader.This text here inThis text here white force landscape pages rotated correctly when browsing through Acrobat reader. white force landscape pages 2000 Philips Semiconductors NAME TXT21 TXT22 CCLIN TXT17 P3CFGA P3CFGB TXT0 TXT1 TXT4 DISP LINES1 GPF7 P3CFGA7 P3CFGB7 (reserved) (reserved) BANK ENABLE BKGND BKGND (reserved) (reserved) CURSOR FREEZE 525/625 SYNC TPWE DISP LINES0 GPF6 PBUSY FORCE ACQ1 P3CFGA6 P3CFGB6 (reserved) (reserved) QUAD WIDTH ENABLE BKGND BKGND CURSOR FLICKER STOP CLEAR MEMORY VER4 CHAR SIZE1 GPF5 PES2 FORCE ACQ0 P3CFGA5 P3CFGB5 AUTO FRAME (reserved) EAST/WEST CHAR SIZE0 GPF4 FORCE DISP1 P3CFGA4 P3CFGB4 (reserved) (reserved) DISABLE DOUBLE HEIGHT (reserved)0 DISABLE SPANISH PORT GPF2 SCREEN COL2 P3CFGA2 P3CFGB2 DISABLE FRAME FIELD POLARITY MESH ENABLE TEXT TEXT RECEIVED PORT CC/TXT GPF0 SCREEN COL0 P3CFGA0 P3CFGB0 (reserved) POLARITY SHADOW ENABLE PICTURE PICTURE CVBS1/ CVBS0 VIDEO SIGNAL QUALITY RESET microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) GPF3 FORCE DISP0 P3CFGA3 P3CFGB3 (reserved) (reserved) MESH ENABLE TEXT TEXT DOUBLE HEIGHT RECEIVED GPF1 SCREEN COL1 P3CFGA1 P3CFGB1 (reserved) POLARITY TRANS ENABLE PICTURE PICTURE TXT5 TXT6 TXT7 TXT8 TXT9 TXT10 TXT11 TXT12 (reserved) (reserved) (reserved) VER3 XXXX XX1X Preliminary specification VER2 VER1 VER0 SAA55xx TDACL TDACH TD13 TD12 TD11 TD10 This text here white force landscape pages rotated correctly when browsing through Acrobat reader.This text here _white force landscape pages rotated correctly when browsing through Acrobat reader.This text here inThis text here white force landscape pages rotated correctly when browsing through Acrobat reader. white force landscape pages 2000 Philips Semiconductors NAME PWM7 PWM0 PWM1 CCDAT1 S1CON S1STA S1DAT S1ADR PWM3 PWM4 PWM5 PWM6 PWM2 CCDAT2 TXT13 XRAMP ROMBK WDTKEY PW7E PW0E PW1E CCD17 STAT4 DAT7 ADR6 PW3E PW4E PW5E PW6E ACC7 PW2E CCD27 (reserved) XRAMP7 STANDBY WKEY7 WDV7 CCD16 ENSI STAT3 DAT6 ADR5 ACC6 CCD26 PAGE CLEARING XRAMP6 WKEY6 WDV6 PW7V5 PW0V5 PW1V5 CCD15 STAT2 DAT5 ADR4 PW3V5 PW4V5 PW5V5 PW6V5 ACC5 PW2V5 CCD25 DISPLAY XRAMP5 WKEY5 WDV5 PW7V4 PW0V4 PW1V4 CCD14 STAT1 DAT4 ADR3 PW3V4 PW4V4 PW5V4 PW6V4 ACC4 PW2V4 CCD24 (reserved) XRAMP4 WKEY4 WDV4 PW7V3 PW0V3 PW1V3 CCD13 STAT0 DAT3 ADR2 PW3V3 PW4V3 PW5V3 PW6V3 ACC3 PW2V3 CCD23 SAD7 (reserved) XRAMP3 WKEY3 WDV3 PW7V2 PW0V2 PW1V2 CCD12 DAT2 ADR1 PW3V2 PW4V2 PW5V2 PW6V2 ACC2 PW2V2 CCD22 SAD6 (reserved) XRAMP2 WKEY2 WDV2 PW7V1 PW0V1 PW1V1 CCD11 DAT1 ADR0 PW3V1 PW4V1 PW5V1 PW6V1 ACC1 PW2V1 CCD21 SAD5 (reserved) XRAMP1 (reserved) WKEY1 WDV1 PW7V0 PW0V0 PW1V0 CCD10 DAT0 PW3V0 PW4V0 PW5V0 PW6V0 ACC0 PW2V0 CCD20 SAD4 (reserved) XRAMP0 (reserved) WKEY0 WDV0 RESET XXXX XXX0 microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Preliminary specification SAA55xx Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Table description Accumulator (ACC) ACC7 ACC0 Register data byte (CCDAT1) CCD17 CCD10 data byte (CCDAT2) CCD26 CCD20 line (CCLIN) Data Pointer High byte (DPH) DPH7 DPH0 Data pointer byte (DPL) DPL7 DPL0 Interrupt Enable Register (IE) EBUSY Interrupt Priority Register (IP) PBUSY PES2 Port (P0) Port register connected external pins priority EBUSY interrupt priority Interrupt priority interrupt priority Timer interrupt priority external interrupt priority Timer interrupt priority external interrupt closed caption slice line using 525-line number closed caption second data byte closed caption first data byte register value accumulator value FUNCTION SAA55xx data pointer high byte, used with address auxiliary memory data pointer byte, used with address auxiliary memory disable interrupts (logic individual interrupt enable bits (logic enable BUSY interrupt enable I2C-bus interrupt enable closed caption interrupt enable Timer interrupt enable external interrupt enable Timer interrupt enable external interrupt 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Port (P1) Port (P2) Port (P3) Port register connected external pins Port register connected external pins FUNCTION SAA55xx Port register connected external pins; only available with LQFP100 package Port Configuration (P0CFGA) Port Configuration (P0CFGB) P0CFGA<7:0> P0CFGB<7:0> These registers used configure Port pins. example, configuration Port controlled using both P0CFGA P0CFGB. P0CFGB<x>/P0CFGA<x>: P0.x open-drain configuration P0.x quasi-bidirectional configuration P0.x high-impedance configuration P0.x push-pull configuration Port Configuration (P1CFGA) Port Configuration (P1CFGB) P1CFGA<7:0> P1CFGB<7:0> These registers used configure Port pins. example, configuration Port controlled using both P1CFGA P1CFGB. P1CFGB<x>/P1CFGA<x>: P1.x open-drain configuration P1.x quasi-bidirectional configuration P1.x high-impedance configuration P1.x push-pull configuration Port Configuration (P2CFGA) Port Configuration (P2CFGB) P2CFGA<7:0> P2CFGB<7:0> These registers used configure Port pins. example, configuration Port controlled using both P2CFGA P2CFGB. P2CFGB<x>/P2CFGA<x>: P2.x open-drain configuration P2.x quasi-bidirectional configuration P2.x high-impedance configuration P2.x push-pull configuration Port Configuration (P3CFGA) Port Configuration (P3CFGB) P3CFGA<7:0> P3CFGB<7:0> These registers used configure Port pins. example, configuration Port controlled using both P3CFGA P3CFGB. P3CFGB<x>/P3CFGA<x>: P3.x open-drain configuration P3.x quasi-bidirectional configuration P3.x high-impedance configuration P3.x push-pull configuration 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Power Control Register (PCON) Program Status Word (PSW) carry auxiliary carry flag general purpose flag register bank selector bits; RS<1:0>: Bank (00H 07H) Bank (08H 0FH) Bank (10H 17H) Bank (18H 1FH) overflow flag parity FUNCTION SAA55xx auxiliary disable, MOVX instructions access external data memory disable during internal access reduce radio frequency interference Watchdog Timer enable general purpose flag general purpose flag Power-down mode activation Idle mode activation Pulse Width Modulator Control Register (PWM0) PW0E PW0V5 PW0V0 activate this (logic pulse width modulator high time Pulse Width Modulator Control Register (PWM1) PW1E PW1V5 PW1V0 activate this (logic pulse width modulator high time Pulse Width Modulator Control Register (PWM2) PW2E PW2V5 PW2V0 activate this (logic pulse width modulator high time Pulse Width Modulator Control Register (PWM3) PW3E PW3V5 PW3V0 activate this (logic pulse width modulator high time Pulse Width Modulator Control Register (PWM4) PW4E PW4V5 PW4V0 activate this (logic pulse width modulator high time Pulse Width Modulator Control Register (PWM5) PW5E PW5V5 PW5V0 activate this (logic pulse width modulator high time 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Pulse Width Modulator Control Register (PWM6) PW6E PW6V5 PW6V0 activate this (logic pulse width modulator high time FUNCTION SAA55xx Pulse Width Modulator Control Register (PWM7) PW7E PW7V5 PW7V0 Bank (ROMBK) STBY Standby mode enabled (logic activate this (logic pulse width modulator high time I2C-bus Slave Address Register (S1ADR) ADR6 ADR0 I2C-bus Control Register (S1CON) clock rate bits; CR<2:0>: rate 3.75 rate rate rate rate 1.875 rate 37.5 rate rate ENSI enable I2C-bus interface (logic START flag. When this slave mode, hardware checks I2C-bus generates START condition free after becomes free. device operates master mode will generate repeated START condition. STOP flag. this master mode STOP condition generated. STOP condition detected I2C-bus clears this bit. This also slave mode order recover from error condition. this case STOP condition generated I2C-bus, hardware releases lines switches selected receiver mode. STOP flag cleared hardware. I2C-bus slave address which device will respond enable I2C-bus general call address (logic 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) FUNCTION SAA55xx Serial Interrupt flag. This flag interrupt request generated, after following events occur: START condition generated master mode slave address been received during general call address been received while S1ADR.GC data byte been received transmitted master mode (even arbitration lost) data byte been received transmitted selected slave STOP START condition received selected slave receiver transmitter. While flag set, remains serial transfer suspended. must reset software. Assert Acknowledge flag. When this set, acknowledge returned after following conditions: slave address received General call address received (S1ADR.GC data byte received, while device programmed master receiver data byte received, while device selected slave receiver. When reset, acknowledge returned. Consequently, interrupt requested when address general call address received. I2C-bus Data Register (S1DAT) DAT7 DAT0 I2C-bus Status Register (S1STA) STAT4 STAT0 Software Register (SAD) analog input voltage greater than voltage (logic input channel select; CH<1:0>: ADC3 ADC0 ADC1 ADC2 ST(1) SAD7 SAD4 initiate voltage comparison between input channel value MSBs input word I2C-bus interface status I2C-bus data Software Control Register (SADB) DC_COMP SAD3 SAD0 Stack Pointer (SP) stack pointer value enable comparator mode (logic LSBs value 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Timer/Counter Control Register (TCON) FUNCTION SAA55xx Timer overflow flag. hardware timer/counter overflow. Cleared hardware when processor vectors interrupt routine. Timer control bit. Set/cleared software turn timer/counter on/off. Timer overflow flag. hardware timer/counter overflow. Cleared hardware when processor vectors interrupt routine. Timer control bit. Set/cleared software turn timer/counter on/off. Interrupt edge flag (both edges generate flag). hardware when external interrupt edge detected. Cleared hardware when interrupt processed. Interrupt type control bit. Set/cleared software specify edge/LOW level triggered external interrupts. Interrupt edge flag. hardware when external interrupt edge detected. Cleared hardware when interrupt processed. Interrupt type flag. Set/cleared software specify falling edge/LOW level triggered external interrupts. 14-bit Register (TDACH) TPWE TD13 14-bit Register (TDACL) Timer High byte (TH0) TH07 TH00 Timer High byte (TH1) TH17 TH10 Timer byte (TL0) TL07 TL00 Timer byte (TL1) TL17 TL10 Timer byte Timer byte Timer high byte Timer high byte LSBs 14-bit number output 14-bit activate this 14-bit (logic MSBs 14-bit number output 14-bit Timer/Counter Mode Control (TMOD) GATE gating control Timer/Counter Counter/Timer selector mode control bits timer/counter M<1:0>: 8-bit timer 8-bit counter with divide-by-32 prescaler 16-bit time interval event counter 8-bit time interval event counter with automatic reload upon overflow; reload value stored stopped GATE gating control Timer/Counter Counter/Timer selector 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) FUNCTION mode control bits timer/counter M<1:0>: 8-bit timer 8-bit counter with divide-by-32 prescaler 16-bit time interval event counter SAA55xx 8-bit time interval event counter with automatic reload upon overflow; reload value stored 8-bit time interval event counter 8-bit time interval counter Text Register (TXT0) AUTO FRAME DISABLE FRAME Text Register (TXT1) FIELD POLARITY POLARITY POLARITY Text Register (TXT4) BANK ENABLE QUAD WIDTH ENABLE EAST/WEST DISABLE DOUBLE HEIGHT MESH ENABLE MESH ENABLE TRANS ENABLE SHADOW ENABLE Text Register (TXT5) BKGND BKGND TEXT TEXT PICTURE PICTURE Text Register (TXT6) BKGND BKGND TEXT TEXT PICTURE 2000 background colour displayed outside teletext boxes (logic background colour displayed inside teletext boxes (logic active outside teletext boxes (logic active inside teletext boxes (logic text displayed outside teletext boxes (logic text displayed inside teletext boxes (logic video displayed outside teletext boxes (logic background colour displayed outside teletext boxes (logic background colour displayed inside teletext boxes (logic active outside teletext boxes (logic active inside teletext boxes (logic text displayed outside teletext boxes (logic text displayed inside teletext boxes (logic video displayed outside teletext boxes (logic video displayed inside teletext boxes (logic alternate location available graphic attribute, additional location (logic enable display quadruple width characters (logic eastern character selection character codes (logic disable normal decoding double height characters (logic enable meshing black background (logic enable meshing coloured background (logic display black background video (logic display shadow/fringe (default black) (logic VSYNC pulse second half line during even field (logic HSYNC reference edge negative going (logic VSYNC reference edge negative going (logic frame output switched automatically video displayed (logic force frame output (logic Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) PICTURE Text Register (TXT7) CURSOR DOUBLE HEIGHT Text Register (TXT8) FLICKER STOP DISABLE SPANISH RECEIVED(2) RECEIVED(2) CVBS1/CVBS0 Text Register (TXT9) CURSOR FREEZE CLEAR MEMORY(1) R0(2) Text Register (TXT10) C0(3) Text Register (TXT11) Text Register (TXT12) 525/625 SYNC(4) VER4 VER0 VIDEO SIGNAL QUALITY Text Register (TXT13) PAGE CLEARING DISPLAY Text Register (TXT17) FORCE ACQ1 FORCE ACQ0 FORCE ACQ<1:0>: automatic selection force timing, force teletext standard force timing, force teletext standard force timing, force teletext standard software power-on page clear progress (logic 525-line synchronisation display (logic 525-line CVBS signal being received (logic mask programmable identification character acquisition synchronised CVBS (logic current memory column value lock cursor current position (logic clear memory block pointed TXT15 current memory value disable `Flicker Stopper' circuitry (logic display cursor position given TXT9 TXT10 (logic display each character twice normal height (logic enable display teletext boxes memory (logic enable display teletext boxes memory (logic enable display teletext boxes memory (logic FUNCTION video displayed inside teletext boxes (logic SAA55xx disable special treatment Spanish packet characters (logic packet data been processed (logic wide screen signalling data been processed (logic enable acquisition data (logic select CVBS1 source device (logic data value written read from memory location defined TXT9, TXT10 TXT15 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) FORCE DISP1 FORCE DISP0 FORCE DISP<1:0>: automatic selection force display mode lines row) force display mode lines row) valid (default mode) FUNCTION SAA55xx SCREEN COL2 SCREEN COL0 Defines colour displayed instead picture black background; these bits equivalent components. SCREEN COL<2:0>: transparent CLUT entry CLUT entry CLUT entry CLUT entry CLUT entry CLUT entry CLUT entry Text Register (TXT18) NOT3 NOT0 Text Register (TXT19) Text Register (TXT20) DRCS ENABLE PLANES LANG ENABLE LAN2 LAN0 Text Register (TXT21) DISP LINES1 DISP LINES0 number display lines character row; DISP LINES<1:0>: lines character (defaults lines mode) lines character lines character reserved (logic CHAR SIZE1 CHAR SIZE0 character matrix size; CHAR SIZE<1:0>: lines character (matrix lines character (matrix lines character (matrix reserved PORT enable I2C-bus Port selection (P1.5/SDA1 P1.4/SCL1) (logic re-map column DRCS mode (logic character code columns defined double plane characters (logic enable LAN<2:0> define language option display, instead C12, alternative C12, bits with menus enable twist character (logic language control bits (C12, C14) that twisted character twist character selection national option table selection, maximum when used with EAST/WEST basic character selection 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) PORT CC/TXT Text Register (TXT22) GPF7 GPF5 GPF4 GPF3 GPF2 GPF1 GPF0 Watchdog Timer (WDT) WDV7 WDV0 Watchdog Timer (WDTKEY) WKEY7 WKEY0(5) XRAMP XRAMP7 XRAMP0 Notes This flag software reset hardware. Valid range mode Valid range mode Only valid when VIDEO SIGNAL QUALITY set. Must disable Watchdog Timer when active. internal access upper byte address Watchdog Timer value Watchdog Timer period FUNCTION closed caption acquisition (logic SAA55xx enable I2C-bus Port selection (P1.7/SDA0 P1.6/SCL0) (logic display configured mode (logic general purpose register, bits defined mask programmable bits reserved PWM0, PWM1, PWM2 PWM3 output Port Port respectively (logic enable closed caption acquisition (logic reserved 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Character feature bits SAA55xx Features available only devices reflected specific area Character ROM. These sections Character mapped Special Function Registers: TXT22 TXT12. Character address 09FEH mapped TXT22 shown Table Character address 09FFH mapped TXT12 shown Table Table Character TXT22 mapping used; reserved MAPPED ITEMS Character address 09FEH Mapped TXT22 Table Description Character address 09FEH bits DESCRIPTION reserved; normally logic enable acquisition disable acquisition PWM0, PWM1, PWM2 PWM3 output routed Port Port respectively PWM0, PWM1, PWM2 PWM3 output routed Port Port respectively reserved; normally logic Table Character TXT12 mapping used; reserved MAPPED ITEMS Character address 09FFH Mapped TXT12 Table Description Character address 09FFH bits DESCRIPTION reserved; normally logic 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) External (auxiliary) memory 8.6.1 AUXILIARY PAGE SELECTION SAA55xx normal 80C51 external memory area been mapped internally device, this means that MOVX instruction accesses memory internal device. Auxiliary page pointer used select pages within Auxiliary RAM, pages allocated; refer Fig.9 further detail. page consists consecutive bytes. handbook, halfpage 7FFFH FFFFH 8C00H 8BFFH DYNAMICALLY REDEFINABLE CHARACTERS 8800H 87FFH DISPLAY REGISTERS 87F0H 871FH CLUT 2400H 23FFH DISPLAY TEXT 2000H 84FFH ADDITIONAL DATA 8460H 845FH DISPLAY CLOSED CAPTION 8000H GSA009 8700H 02FFH DATA 0000H lower kbytes upper kbytes Display Closed Caption Text shared. Fig.9 Auxiliary allocation. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth MOVX Ri,A MOVX XRAMP MBK958 FFFFH XRAMP FF00H FEFFH XRAMP FE00H MOVX DPTR,A MOVX DPTR 01FFH XRAMP 0100H 00FFH 0000H Fig.10 Indirect addressing Auxiliary RAM. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) REDUCED POWER MODES SAA55xx There three power saving modes: Standby, Idle Power-down, incorporated into only device. When utilizing these modes, power device (VDDP, VDDC VDDA) should maintained, since power saving achieved clock gating section section basis. Idle mode third method terminating Idle mode with external hardware reset. Since oscillator running, hardware reset need only active machine cycles clocks MHz) complete reset operation. Reset defines SFRs Display memory initialized state, maintains other values. Code execution commences with Program Counter `0000'. Power-down mode During Idle mode, Acquisition, Display Central Processing Unit (CPU) sections device disabled. following functions remain active: Memory interface I2C-bus interface Timer/Counters Watchdog Timer Pulse Width Modulators. enter Idle mode PCON register must set. Watchdog Timer must disabled prior entering Idle mode prevent device being reset. Once Idle mode, crystal oscillator continues run, internal clock CPU, Acquisition Display gated out. However, clocks Memory interface, I2C-bus interface, timer/counters, Watchdog Timer Pulse Width Modulators maintained. state frozen along with status SFRs, internal contents maintained, device output values. Since output values Green Blue (RGB) Video Data Switch (VDS) maintained display output must disabled before entering this mode. There three methods recover from Idle mode: Assertion enabled interrupt will cause cleared hardware, thus terminating Idle mode. interrupt serviced, following instruction RETI, next instruction executed will after instruction that device into Idle mode. second method exiting Idle mode interrupt generated Software Analog-to-Digital (SAD) Compare circuit. When device configured this mode, detection analog threshold input used trigger wake-up device i.e. Front Panel Key-press. above, interrupt serviced, following instruction RETI, next instruction executed will following instruction that device into Idle mode. Power-down mode crystal oscillator stopped. contents SFRs Data memory maintained, However, contents Auxiliary/Display memory lost. port pins maintain values defined their associated SFRs. Since output values maintained display output must made inactive before entering Power-down mode. Power-down mode activated setting PCON register. advised disable Watchdog Timer prior entering Power-down. There three methods exiting Power-down mode: external interrupt provides first mechanism waking from Power-down. Since clock stopped, external interrupts need level sensitive prior entering Power-down. interrupt serviced, following instruction RETI, next instruction executed will after instruction that device into Power-down mode. second method exiting power-down interrupt generated Compare circuit. When device configured this mode, detection certain analog threshold input used trigger wake-up device i.e. Front Panel Key-press. above, interrupt serviced, following instruction RETI, next instruction executed will following instruction that device into Power-down. third method terminating Power-down mode with external hardware reset. Reset defines SFRs Display memory, maintains other values. Code execution commences with Program Counter `0000'. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Standby mode 10.2.1 OPEN-DRAIN SAA55xx When Standby mode entered both Acquisition Display sections disabled. following functions remain active: 80C51 core Memory interface I2C-bus interface Timer/Counters Watchdog Timer Software Pulse Width Modulators enter Standby mode, STANDBY control ROMBK (bit must set. used conjunction with either Idle Power-down modes switch between power saving modes. This mode enables 80C51 core decode either remote commands receive I2C-bus commands without device being fully powered. Standby state maintained upon exit from either Idle mode Power-down mode. wake-up from Standby necessary 80C51 core remains operational. Since output values maintained display output must disabled before entering this mode. FACILITY 10.1 ports open-drain configuration used bidirectional operation port. requires external pull-up resistor, pull-up voltage maximum value allow connection device into environment. Note that I2C-bus ports (P1.4, P1.5, P1.6 P1.7) only configured open-drain. 10.2.2 QUASI-BIDIRECTIONAL quasi-bidirectional configuration combination open-drain push-pull. requires external pull-up resistor VDDP (nominally When signal transition from LOW-to-HIGH output from device, into push-pull configuration clock cycle (166 after which goes into open-drain configuration. This configuration used speed edges signal transitions. This default state operation pads after reset. 10.2.3 HIGH-IMPEDANCE high-impedance configuration used input only operation port. When using this configuration output transistors turned off. 10.2.4 PUSH-PULL push-pull configuration used output only. this configuration signal driven either VDDP, which nominally 10.3 Port alternative functions SAA55xx devices have lines, each individually addressable, form parallel 8-bit addressable ports which Port Port Port Port 5-bit parallel I/Os only. 10.2 Port type Ports shared with alternative functions enable control external devices circuitry. alternative functions enabled setting appropriate also writing logic port that function occupies. 10.4 support individual ports programmed function four configurations: open-drain, quasi-bidirectional, high-impedance push-pull. configuration selected using associated Port Configuration Registers: PnCFGA PnCFGB (where port number Table Port pins P0.5 P0.6 have current sinking capability enable LEDs series with current limiting resistors driven directly, without need additional buffering circuitry. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) INTERRUPT SYSTEM device interrupt sources, each which enabled disabled. When enabled each interrupt assigned priority levels. There four interrupts that common 80C51, these external interrupts (EX0 EX1) other timer interrupts (ET0 ET1). addition conventional 80C51, application specific interrupt incorporated internal device which following functionality: Display Busy interrupt (EBUSY). interrupt generated when display enters either Horizontal Vertical Blanking Period. i.e. indicates when microcontroller update display without causing undesired effects screen. This interrupt configured modes using Configuration (address 87FFH, TXT/V): Text Display Busy. interrupt generated each active horizontal display line when Horizontal Blanking Period entered Vertical Display Busy. interrupt generated each vertical display field when Vertical Blanking period entered. 11.1 Interrupt enable structure 11.3 SAA55xx requests same priority level received simultaneously, internal polling sequence determines which request serviced. Thus, within each priority level there second priority structure determined polling sequence defined Table Table Interrupt priority (within same level) PRIORITY WITHIN LEVEL highest lowest INTERRUPT VECTOR 0003H 000BH 0013H 001BH 002BH 0033H SOURCE EBUSY Interrupt vector address processor acknowledges interrupt request executing hardware generated LCALL appropriate servicing routine. interrupt vector addresses each source shown Table 11.4 Level/edge interrupt Each individual interrupts enabled disabled setting clearing relevant Interrupt Enable Register (IE). interrupt sources also globally disabled clearing (IE.7). 11.2 Interrupt enable priority external interrupt programmed either level-activated transition-activated setting clearing IT0/IT1 bits Timer Control (TCON). Table External interrupt activation LEVEL active INT0 negative edge INT1 positive negative edge EDGE Each interrupt source assigned priority levels. interrupt priorities defined Interrupt Priority Register (IP). priority interrupt interrupted high priority interrupt, another priority interrupt. high priority interrupt interrupted other interrupt source. requests different priority level received simultaneously, request with highest priority level serviced. external interrupt INT1 differs from standard 80C51 interrupt that activated both edges when edge sensitive mode. This allow software pulse width measurement handling remote control inputs. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth source enable IE<0:6> global enable IE.7 priority control IP<0:6> highest priority level highest priority level EBUSY lowest priority level lowest priority level GSA033 interrupt source Fig.11 Interrupt structure. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) TIMER/COUNTER 16-bit timers/counters incorporated Timer Timer Both configured operate either timers event counters. Timer mode, register incremented every machine cycle. therefore counting machine cycles. Since machine cycle consists twelve oscillator periods, count rate 1/12fosc MHz. Counter mode, register incremented response negative transition corresponding external Since pins sampled once machine cycle, takes machine cycles recognise transition, this gives maximum count rate MHz. There Special Function Registers used control timers/counters. These are: TCON, TMOD, TL0, TH0, TH1. timer/counter function selected control bits Timer Mode (TMOD). These Timer/Counters have four operating modes, which selected bit-pairs TMOD. Detail modes operation given "Handbook IC20, 80C51-Based 8-bit Microcontrollers". actual Timer/Counter registers Timer byte high byte. actual Timer/Counter registers Timer byte high byte. WATCHDOG TIMER Watchdog Timer counter that once overflow state forces microcontroller into reset condition. purpose Watchdog Timer reset microcontroller enters erroneous processor state (possibly caused electrical noise RFI) within reasonable period time. When enabled, Watchdog circuitry will generate system reset user program fails reload Watchdog Timer within specified length time known Watchdog Interval (WI). Watchdog Timer consists 8-bit counter with 11-bit prescaler. prescaler with signal whose frequency 1/12fosc oscillator). SAA55xx 8-bit timer incremented every seconds where: 2048 2048 2.048 13.1 Watchdog Timer operation Watchdog operation activated when Power Control (PCON) set. Watchdog disabled software loading value into Watchdog Timer (WDTKEY). This must performed before entering Idle Power-down mode prevent exiting mode prematurely. Once activated Watchdog Timer (WDT) must reloaded before timer overflows. must enable loading SFR, once loaded reset hardware, this prevent erroneous software from loading SFR. value loaded into defines Watchdog Interval (WI). 2.048 range intervals from which gives which gives 2.048 PULSE WIDTH MODULATORS device eight 6-bit Pulse Width Modulated (PWM) outputs analog control e.g. volume, balance, bass, treble, brightness, contrast, saturation. outputs generate pulse patterns with repetition rate 21.33 with high time equal value multiplied 0.33 analog value determined ratio high time repetition time, D.C. voltage proportional setting obtained means external integration network (low-pass filter). 14.1 control relevant enabled setting enable PWxE PWMx Control Register (where high time defined value PWxV<5:0>. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 14.2 Tuning Pulse Width Modulator (TPWM) 3.3/ SAA55xx device single 14-bit that used Voltage Synthesis Tuning. method operation similar normal except that repetition period 42.66 14.3 TPWM control SFRs used control TPWM, they TDACL TDACH. TPWM enabled setting TPWE TDACH SFR. most significant bits TD<13:7> alter high period between 42.33 seven least significant bits TD<6:0> extend certain pulses further 0.33 e.g. TD<6:0> then periods will extended 0.33 TD<6:0> then periods will extended. TPWM will start output value until TDACH been written Therefore, value changed, TDACL should written before TDACH. 14.4 Software (SAD) resolution voltage with nominal value external analog voltage lower value equivalent VSSA upper value equivalent VDDP Vtn, where threshold voltage type Metal Oxide Semiconductor transistor. reason this that input pins analog signals (P3.0 P3.3) tolerant normal port operations, i.e. when used analog input. protect analog multiplexer comparator circuitry from series transistor used limit voltage. This limiting introduces voltage drop equivalent (0.6 input voltage. maximum value 0.75 therefore worst case calculations, maximum input should calculated VDD(min) 0.75 Therefore, input voltage range VDDP VDDP returns same comparison value. 14.4.3 COMPARATOR MODE Four successive approximation Analog-to-Digital Converters implemented software making on-board 8-bit Digital-to-Analog Converter Analog Comparator. 14.4.1 CONTROL module incorporates Comparator mode which selected using DC_COMP control SADB SFR. This mode enables microcontroller detect threshold crossing input selected analog input (P3.0/ADC0, P3.1/ADC1, P3.2/ADC2 P3.3/ADC3) software ADC. level sensitive interrupt generated when analog input voltage level falls below analog output level DAC. This mode intended provide device with wake-up mechanism from Power-down Idle mode when key-press front panel detected. following software sequence should used when utilizing this mode Power-down Idle: Disable INT1 using SFR. INT1 level sensitive using TCON SFR. digital input level desired threshold level using SAD/SADB SFRs select required input (P3.0/ADC0, P3.1/ADC1, P3.2/ADC2 P3.3/ADC3) using CH<1:0> SFR. Enter Compare mode setting DC_COMP enable SADB SFR. Enable INT1 using SFR. Enter Power-down/Idle mode. Upon wake-up should restored conventional operating mode disabling DC_COMP control bit. control required analog input done using channel select bits CH<1:0> SFR, this selects required analog input passed inputs comparator. second comparator input generated whose value bits SAD<7:0> SADB SFRs. comparison between inputs made when start compare set, this must least instruction cycle after SAD<7:0> value been set. result comparison given instruction cycle after setting 14.4.2 INPUT VOLTAGE external analog voltage that used comparison with internally generated voltage does have same voltage range. lower reference level VSSA upper reference level VDDP. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, halfpage VDDP ADC0 ADC1 ADC2 ADC3 CH<1:0> SAD<3:0> 8-BIT SADB<3:0> MBK960 Fig.12 block diagram. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) I2C-BUS SERIAL I2C-bus consists serial data (SDA) line serial clock (SCL) line. definition I2C-bus protocol found document "The I2C-bus (including specification)". This document ordered using code 9398 40011. device operates four modes: Master transmitter Master receiver Slave transmitter Slave receiver. microcontroller peripheral controlled Serial Control (S1CON) status indicated Status (S1STA). Information transmitted/received to/from I2C-bus using Data (S1DAT) Slave Address (S1ADR) used configure slave address peripheral. byte level I2C-bus serial port identical I2C-bus serial port P8xCE558, except clock rate selection bits CR<2:0> S1CON. operation subsystem described detail "P8xCE558 data sheet". 15.1 I2C-bus port selection 16.1 Memory structure SAA55xx memory partitioned into distinct areas, dedicated Auxiliary area, Display area. Display area when being used Data Capture Display used extension auxiliary area. 16.1.1 AUXILIARY Auxiliary initialised power-up. Application software must initialize this Auxiliary RAM. contents Auxiliary area, Display maintained during Standby Idle modes, lost Power-down mode entered. 16.1.2 DISPLAY Display (Block only) initialised power-up value 20H. contents Display maintained when entering Idle mode. Idle mode exited using interrupt then contents unchanged, Idle mode exited using reset then contents re-initialised 20H. Full Closed Caption display requires display from 8000H 845FH. memory from 8460H 84FFH (must initialized application software) utilized extension dedicated contiguous Auxiliary that occupies 000H 02FFH. 16.2 Memory mapping I2C-bus ports available SCL0/SDA0 SCL1/SDA1. selection port done using TXT21.I2C PORT TXT21.I2C PORT When port enabled, information transmitted from device goes onto enabled port. information transmitted device only acted port enabled. both ports enabled then data transmitted from device seen both ports, however data transmitted device port seen other port. MEMORY INTERFACE memory interface controls access embedded DRAM, refreshing DRAM page clearing. DRAM shared between Data Capture, display microcontroller sections. Data Capture section uses DRAM store acquired information that been requested. display reads from DRAM information converts into values. microcontroller uses DRAM embedded auxiliary RAM. dedicated Auxiliary area occupies 0.75 kbytes, with address range from 0000H 02FFH. Display occupies 1.25 kbytes with address range from 2000H 24FFH mode 8000H 84FFH mode. modes although having different address ranges occupy same physical DRAM area. hardware will only initialize 1-kbyte (block available 1.25 kbytes device. application software must initialize this additional 0.25 kbytes used display auxiliary RAM. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 16.3 Addressing memory 16.4 Page clearing SAA55xx memory addressed microcontroller ways, either directly using MOVX command, Special Function Registers depending what address required. dedicated Auxiliary RAM, Display memory range 8000H 84FFH, only accessed using MOVX command. Display memory range 2000H 23FFH either directly accessed using MOVX, Special Function Registers. 16.3.1 DISPLAY MEMORY ACCESS Page clearing performed request from microcontroller under control embedded software. power-on reset Text Display memory (from 2000H 23FFH) cleared value 20H. TXT13.PAGE CLEARING will while this takes place. 16.4.1 DATA CAPTURE PAGE CLEAR present SAA55xx only devices. 16.4.2 SOFTWARE PAGE CLEAR Display memory when mode (see Fig.14) configured columns wide rows occupies bits memory. column selected using TXT9.R<4:0> TXT10.C<5:0>. data selected position read written using TXT11.D<7:0>. Whenever read write performed TXT11, values stored TXT9 column value stored TXT10 automatically incremented. rows column value incremented maximum which point resets logic increments counter value. When column reached values column both reset logic Writing values outside valid range TXT9 TXT10 will cause undetermined operation auto-incrementing function accesses TXT11. 16.3.2 DISPLAY MEMORY MOVX ACCESS software also initiate page clear, setting TXT9.CLEAR MEMORY bit. CLEAR MEMORY latched software does have reset after been set. Only page cleared line software requests page clear will carried next line which Data Capture hardware does force page cleared. flag, TXT13.PAGE CLEARING, provided indicate that software requested page clear being carried out. flag when logic written into TXT9.CLEAR MEMORY reset when page clear been completed. Inventory page clearing present SAA55xx only devices. important generation displays, that this mode access, understand mapping MOVX address onto display column value. This mapping column onto address shown Table values shown added onto base address required memory block (see Fig.13) give 16-bit address. Table Column MOVX address (lower bits address) COL.0 000H 020H 2E0H 300H 320H COL.23 017H 037H 3F7H 317H 337H COL.31 01FH 03FH 2FFH 31FH COL.32 3F8H 3F0H 340H 338H COL.39 3FFH 3F7H 347H 33FH 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx lower kbytes handbook, halfpage upper kbytes 7FFFH FFFFH 23FFH TEXT DISPLAY 2000H 84FFH 02FFH AUXILIARY 0000H DISPLAY GSA011 8000H Fig.13 DRAM memory mapping. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth control data Column non-displayable data (byte reserved) active position TXT9.R<4:0> 01H, TXT10.C<5:0> 0AH, TXT11 MBK962 Fig.14 memory map. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) DATA CAPTURE Data Capture section takes analog Composite Video Blanking Signal (CVBS), from this extracts required data, which then decoded stored memory. extraction data performed digital domain. first stage convert analog CVBS signal into digital form. This done using sampling MHz. data clock recovery then performed Multi-Rate Video Input Processor (MulVIP). From recovered data clock, serial Closed Captioning data converted parallel stored bytes line. extracted data stored locations. 17.1 Data Capture features 17.1.4 DATA CAPTURE TIMING SAA55xx Data Capture timing section uses synchronisation information extracted from CVBS signal generate required horizontal vertical reference timings. timing section automatically recognizes selects appropriate timings either synchronisation synchronisation. flag TXT12.VIDEO SIGNAL QUALITY when timing section locked correctly incoming CVBS signal. When TXT12.VIDEO SIGNAL QUALITY another flag TXT12.525/625 SYNC used identify standard. 17.1.5 LINE DATA SERVICES CVBS inputs Data Capture Line Data Service Video Signal Quality Detector. 17.1.1 CVBS SWITCH Line Data Services transmitted line 525-line broadcast system used Captioning information, Text information Extended Data Services. Full Details found "Recommended Practise Line Data Service EIA-608". Closed Caption Line data only acquired when TXT21.CC set. bytes data stored field SFRs, first stored CCDAT1 second byte stored CCDAT2. contents each CCDAT register reset start Closed Caption line defined CCLIN.CS<4:0>. Closed Caption line interrupt generated IE.ECC active. processing Closed Caption data convert into displayable format performed software. CVBS switch used select required analog input depending value TXT8.CVBS1/CVBS0. 17.1.2 ANALOG-TO-DIGITAL CONVERTER output CVBS switch passed differential single ended converter, although this device used single ended configuration with reference. analog output differential single ended converter converted into digital representation full-flash with sampling rate MHz. 17.1.3 MULTI-RATE VIDEO INPUT PROCESSOR multi-rate video input processor Digital Signal Processor designed extract data recover clock from digitized CVBS signal. only data clock standard that recovered only devices Closed Caption data rate approximately 503.5 kHz. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth CVBS0 CVBS1 CVBS SWITCH CVBS data<7:0> DATA SLICER CLOCK RECOVERY SYNC SEPARATOR ACQUISITION TIMING SYNC_FILTER ACQUISITION CC/WSS output data SFRs GSA010 Fig.15 Data Capture block diagram. DISPLAY display section based requirements Closed Caption. There some enhancements with locally generated On-Screen Displays. display section reads contents Display memory interprets control/character codes. From this information other global settings, display produces required signals video/data (Fast Blanking) signal signal processing device. display synchronised signal processing device horizontal vertical sync signals provided external circuits (Slave Sync mode). From these signals display timings derived. 18.1 Display features Globally selectable scan lines Globally selectable character matrix Italics Soft colours using CLUT with 4096 colour palette Underline Overline Fringing (shadow) selectable from N-S-E-W direction Fringe colour selectable Meshing defined area Contrast reduction defined area Cursor Special Graphics characters with planes, allowing four colours character software redefinable On-Screen Display characters character sets (G0/G2) single device (e.g. Latin, Cyrillic, Greek, Arabic) Mosaic graphics, Limited Line drawing characters character sets Closed (including extended) Caption character single device. Teletext style Enhanced modes Closed Caption features Serial Parallel display attributes Single/double/quadruple width height characters Scrolling display region Variable flash rate controlled software 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth VSYNC HSYNC DISPLAY TIMING address MICROPROCESSOR INTERFACE data FUNCTION REGISTERS address memory interface from memory interface address data data DISPLAY DATA ADDRESSING ATTRIBUTE HANDLING address data control PARALLEL/SERIAL CONVERTER FRINGING DATA BUFFER CHARACTER DRCs data CHARACTER FONT ADDRESSING CLUT address MBK965 Fig.16 Display block diagram. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.2 Display modes SAA55xx display section distinct modes with different features available each. modes are: TXT: This display configured with additional serial global attributes. display configured fixed rows with characters row. only family this mode only utilised display Text style OSD, Teletext Data Capture present. This display configured Closed Caption mode. display configured maximum rows with maximum characters row. both above modes character matrix, lines defined. There option lines display row, character matrix combinations lines maximum display rows give sensible display, since there limited number scan lines available. Special Function Register TXT21 memory mapped registers used control mode selection. 18.3 Display feature descriptions TXT: This attribute control character `flash' (08H) remains valid until until reset control character `steady' (09H). 18.3.2 BOXES This attribute valid from time until otherwise modified with Serial Mode with Serial Mode then from next character onwards. Text mode (within mode) background colour displayed regardless setting attribute bit. Boxes take effect only during mixed mode, where boxes this mode background colour displayed. Character locations where boxes show video/screen colour (depending setting Display Control) instead background colour. TXT: types boxes exist, teletext box. teletext activated `start box' control character (0BH). start characters required begin teletext box, with starting between characters. ends line after `end box' control character. mode also boxes, they started using size, implying control characters (BCH, BDH, BFH). starts after control character (set after) ends either next size implying character (set at). attributes flash, teletext box, conceal, separate graphics, twist hold graphics reset start box, they start row. boxes only valid mode which defined TXT5 TXT6 03H. display features described detail both modes. 18.3.1 FLASH Flashing causes foreground colour pixel displayed background pixels.The flash frequency controlled software setting resetting Status (see Table appropriate interval. This attribute valid from time (see Table until until otherwise modified. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.3.3 SIZE SAA55xx size characters modified both horizontal vertical directions. sizes available both horizontal vertical directions. sizes available normal double height/width combination these. attribute setting always valid whole row. Mixing sizes within possible. TXT: Three horizontal sizes available normal double quadruple control characters `normal size' (0CH/BCH) enables normal size, `double width' `double size' (0EH/BEH/0FH/BFH) enables double width characters. consecutive combination `double width' `double size' (0EH/BEH/0FH/BFH) activates quadruple width characters, provided quadruple width characters enabled TXT4.QUAD WIDTH ENABLE. Three vertical sizes available normal double quadruple control characters `normal size' (0CH/BCH) enable normal size, `double height' `double size' (0DH/BDH/0FH/BFH) enable double height characters. Quadruple height characters achieved using double height characters setting global attributes TXT7.DOUBLE HEIGHT (expand) TXT7.BOTTOM/TOP. double height characters used Teletext mode, single height characters lower double height character automatically disabled. 18.3.4 ITALIC This attribute valid from time until otherwise modified. attribute causes character foreground pixels offset horizontally pixel scan lines (interlaced mode). base bottom left character matrix pixel. pattern character indented shown Fig.17. TXT: Italic attribute available. handbook, full pagewidth character matrix character matrix character matrix indented 7/6/4 indented 6/5/3 indented 5/4/2 indented 4/3/1 indented 3/2/0 indented indented indented MBK970 Field Field Fig.17 Italic characters. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.3.5 COLOURS 18.3.7 BACKGROUND COLOUR SAA55xx CLUT (Colour Look-Up Table) with colour entries provided. colours programmable palette 4096 bits CLUT defined writing data that resides MOVX address space 80C51. Table CLUT colour values RED<3:0> GREEN<3:0 BLUE<3:0> (B11 >(B7 0000 0000 1111 1111 18.3.6 0000 0000 1111 1111 0000 1111 0000 1111 COLOUR ENTRY This attribute valid from time until otherwise modified with Serial Mode with Serial Mode then colour from next character onwards. background colour chosen from CLUT entries. TXT: control character `new background' (1DH) used change background colour current foreground colour. selection immediate (set remains valid until until otherwise modified. Text background control characters CLUT entries shown Table Table Background CLUT mapping FOREGROUND COLOUR foreground colour chosen from colours character-by-character basis. sets colours provided. serial attribute switches between banks (see Table Serial Mode colours CLUT entries TXT: foreground colour selected control character (see Table 16). colour control characters take effect start next character (set-after) remain valid until row, until modified control character. Only foreground colours available. text foreground control characters CLUT entries shown Table Table Foreground CLUT mapping CONTROL CODE DEFINED COLOUR black green yellow blue magenta cyan white CLUT ENTRY CONTROL CODE 18.3.8 DEFINED COLOUR black green yellow blue magenta cyan white CLUT ENTRY BACKGROUND DURATION attribute when takes effect from current position until text display defined Text Area End. background duration attribute (see Table Serial Mode combination with attribute (see Table Serial Mode forces background colour displayed until text area reached. TXT: This attribute available. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.3.9 UNDERLINE SAA55xx underline attribute causes characters have bottom scan line character cell forced foreground colour, including spaces. background duration set, then underline until text area. underline attribute (see Table Serial Mode 0/1, valid from time until otherwise modified. TXT: This attribute available. 18.3.10 OVERLINE overline attribute causes characters have scan line character cell forced foreground colour, including spaces. background duration set, then overline until text area. overline attribute (see Table Serial Mode 0/1, valid from time until otherwise modified. Overlining italic characters possible. TXT: This attribute available. 18.3.11 number characters flexible determined attribute (see Table Serial Mode However, maximum number character positions displayed determined setting Text Position Horizontal Text Area End. Note that when using attribute next character location after attribute should always occupied `space'. TXT: This attribute available, length fixed characters. 18.3.12 FRINGING fringe (shadow) defined around characters. fringe direction individually selectable North, South, East West direction using Fringing Control. colour fringe also defined entries CLUT, again using Fringing Control. example south south-west fringing shown Fig.18. fringe attribute (see Table Serial Mode valid from time until otherwise modified. TXT: display fringing mode controlled TXT4.SHADOW ENABLE bit. When set, alphanumeric characters being displayed shadowed, graphics characters shadowed. 18.3.13 MESHING attribute effects background colour being displayed. Alternate pixels displayed background colour video.The structure offset pixel from scan line scan line, thus achieving checker board display background colour video. example meshing shown Fig.19. setting Display Control effect meshing background colour. TXT: There meshing attributes that only affects black background colours TXT4.B MESH ENABLE second that only affects backgrounds other than black TXT4.C MESH ENABLE. black background defined CLUT entry non-black background defined CLUT entry 18.3.14 CURSOR cursor operates reversing background foreground colours character position pointed active cursor position. cursor enabled using TXT7.CURSOR When active, cursor appears defined TXT9.R<4:0> column defined TXT10.C<5:0>. position cursor fixed using TXT9.CURSOR FREEZE. cursor display shown Fig.20. valid range valid range column cursor remains rectangular times, shape affected italic attribute, therefore advised cursor with italic characters. TXT: valid range positioning valid range column 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth MBK972 Fig.18 South south-west fringing. handbook, full pagewidth MBK973 Fig.19 Meshing Meshing/fringing (south west). handbook, full pagewidth MBK971 Fig.20 Cursor display. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.3.15 SPECIAL GRAPHICS CHARACTERS CC/TXT: Several special characters provided improved effects. These characters provide choice four colours within character cell. total number special graphics characters limited They stored character codes character table characters), DRCs which overlay character codes 9XH. Each special graphics character uses consecutive normal characters. Fringing, underline overline possible special graphics characters. Special graphics characters activated when TXT20.OSD PLANES SAA55xx Table Special character colour allocation PLANE PLANE COLOUR ALLOCATION background colour foreground colour CLUT entry CLUT entry screen colour transparent (implicit mixed mode) inside object attribute set, then object surrounded video. attribute background colour inside object will also displayed transparent. handbook, full pagewidth background colour "set (Mode serial attribute background colour "set after" (Mode VOLUME background colour foreground colour foreground colour normal character foreground colour special character MGK550 This example could also done with special characters. Fig.21 Special character example. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.4 Character attribute coding Table Parallel character coding BITS 18.4.2 SAA55xx This section describes character attribute coding each mode. 18.4.1 MODE DESCRIPTION character code bits foreground colours mode bit: Parallel code Character coding split into character oriented attributes (parallel) character group coding (serial). serial attributes take effect either position attribute (set at), following location (set after) remain effective until either modified serial attribute until row. serial attribute represented space (the space character itself however used this purpose), attributes that still active, e.g. overline underline will visible during display space. default setting start size Flash Overline Underline Italics Display mode superimpose Fringing Background colour duration coding done 12-bit words. codes stored sequentially Display memory. maximum character positions defined single display. MODE Character coding serial format, with only attribute being changed single location. serial attributes take effect either position attribute (set at), following location (set after). attribute remains effective until either modified serial attributes until row. default settings start are: Foreground colour white (CLUT address Background colour black (CLUT address Horizontal size vertical size (normal size) Alphanumeric Contiguous mosaic graphics Release mosaics Flash Conceal Twist off. attributes have individual codes which defined basic character table (see Fig.22). 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Table Serial character coding DESCRIPTION SERIAL MODE (SET bits background colours Underline switch: underline underline Overline switch: overline overline Display mode: superimpose boxing Flash switch: flash flash Italics switch italics italics Fringing switch: fringing fringing Switch serial coding: mode mode Mode bit: serial code SERIAL MODE CHAR.POS. (SET bits background colours Horizontal size: normal Vertical size: normal Display mode: superimpose boxing Foreground colour switch: Bank (colours Bank (colours Background colour duration: stop row: continue Switch serial coding: mode mode Mode bit: serial code SAA55xx CHAR.POS. (SET AFTER) bits background colours Underline switch: underline underline Overline switch: overline overline Display mode: superimpose boxing Foreground colour switch: Bank (colours Bank (colours Background colour duration (set at): stop (set at): continue Switch serial coding mode mode Mode bit: serial code 2000 This text here white force landscape pages rotated correctly when browsing through Acrobat reader.This text here _white force landscape pages rotated correctly when browsing through Acrobat reader.This text here inThis text here white force landscape pages rotated correctly when browsing through Acrobat reader. white force landscape pages 2000 Philips Semiconductors column graphics black graphics graphics green background black back ground background green background yellow background blue background magenta background cyan background white microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) alpha black alpha alpha green alpha yellow graphics yellow alpha blue alpha magenta graphics blue graphics magenta alpha cyan alpha white graphics cyan graphics white conceal display flash steady contiguous graphics separated graphics start twist normal size double height double width double size MBK974 normal height double height black back ground back ground hold graphics release graphics double width double size Preliminary specification handbook, full pagewidth SAA55xx character dependent language page, refer National Option characters customer definable On-Screen Display character Fig.22 basic character (Pan-European). Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.5 Screen global controls 18.5.3 DISPLAY MODES SAA55xx number attributes available that affect whole display region, cannot applied selectively regions display. 18.5.1 SCAN LINES When attributes superimpose boxing (see Table Serial Mode 0/1, set, resulting display depends setting following screen control mode bits Display Control. TXT: display mode controlled bits TXT5 TXT6 registers. There three control functions Text Background Picture Separate sets bits used inside outside teletext boxes that different display modes invoked. TXT6 used newsflash (C5) subtitle (C6) bits basic page memory otherwise TXT5 used. This allows software type display required newsflash subtitle pages (e.g. text inside boxes, picture outside) this will invoked without further software intervention when such page acquired. When teletext control characters present display page memory, appropriate control must set, TXT7.BOX TXT7.BOX TXT7.BOX This allows display mode different inside teletext compared outside. These bits present allow boxes certain areas screen disabled. teletext boxes messages been superseded this device concept, these bits remain allow teletext boxes used, required. number scan lines field used each display defined, value independent character size being used. number lines either display row. number scan lines defined TXT21.DISP LINES<1:0>. value lines achieved display forced into 525-line display mode TXT17.FORCE DISP<1:0>, device line mode automatic detection circuitry within display finds 525-line display syncs. 18.5.2 CHARACTER MATRIX There three different character matrices available, these selection made using TXT21.CHAR SIZE<1:0> independent number display lines row. character matrix less than number scan lines then matrix padded with blank lines. character matrix greater than number scan lines then character truncated. Table Display modes DISPLAY MODE Video Full Text DESCRIPTION Disables display activities, sets true black video. Displays screen colour locations covered character foreground background colour. attribute effect. Mixed Screen Colour Displays screen colour locations covered character foreground, within boxed areas background colour. Mixed Video Mixed Video mode displays video locations covered character foreground, within boxed areas background colour. Table display control bits PICTURE 18.5.4 SCREEN COLOUR TEXT BACKGROUND EFFECT Text mode, black screen Text mode, background always black Text mode Video mode Mixed text mode Text mode, picture outside text area 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Screen colour displayed from 10.5 62.5 after active edge HSYNC input lines inclusive, 625-line display, lines inclusive 525-line display. screen colour defined Display Control points location CLUT table. screen colour covers full video width. visible when Full Text Mixed Screen Colour mode foreground background pixels being displayed. TXT: register bits TXT17.SCREEN COL<2:0> used define colour displayed place picture black background colour. bits zero, screen colour defined `transparent' picture background colour displayed normal. Otherwise bits define CLUT entries 18.6 18.6.1 Text display controls TEXT DISPLAY CONFIGURATION MODE) 18.6.2 DISPLAY SAA55xx display allows flexible allocation data memory individual rows. Sixteen words provided display memory this purpose. lower bits address first word memory where data starts. This value offset terms 16-bit words from start Display memory (8000H). most significant enables display when within scroll (dynamic) area. display memory fixed first words Closed Caption display memory. Table Display allocation FUNCTION Text display enable, valid outside soft scroll area. disable; enable. This reserved, should logic Pointer data. types areas possible. area static other dynamic. dynamic area allows scrolling region take place. areas cannot cross each other. Only scroll region possible. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth Display memory Text area display possible display entries Enable soft scrolling display possible display possible MBK966 display data Fig.23 Display data pointers. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.6.3 SOFT SCROLL ACTION SAA55xx dynamic scroll region defined Scroll Area, Scroll Range, Scroll line Status. scroll area enabled when SCON Status. position soft scroll area window defined using Soft Scroll Position (SSP<3:0>), height window defined using Soft Scroll Height (SSH<3:0>) both Scroll Range. rows that scrolled through window defined using Start Scroll (STS<3:0>) Stop Scroll (SPS<3:0>) both Scroll Area. soft scrolling function done modifying Scroll Line (SCL<3:0>) Scroll Line. first scroll value SCR<3:0> Status. number rows allocated scroll counter larger than defined visible scroll area, this allows parts rows bottom displayed during scroll function. registers written throughout field values updated display with next field sync. Care should taken that register pairs written software same field. Only region that contains only single height rows only double height rows scrolled. TXT: display organised fixed size rows columns 39), This standard size teletext transmissions. control data displayed used configure display page correctly. handbook, full pagewidth soft scroll position pointer SSP<3:0> e.g. soft scroll height SSH<3:0> e.g. usable display should used display start scroll STS<3:0> e.g. soft scrolling area should used display usable display start scroll SPS<3:0> e.g. MBK967 Fig.24 Soft scroll area. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth row0 0-63 lines row1 scroll area offset row2 row3 row4 row5 row6 row7 row8 Closed Captioning data Closed Captioning data Closed Captioning data Closed Captioning data Closed Captioning data row13 row14 visible area scrolling MBK977 Fig.25 text areas. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx handbook, full pagewidth control data non-displayable data byte reserved MBK968 Fig.26 text area. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.7 Display positioning SAA55xx display consists screen colour covering whole screen text area that placed within visible screen area. screen colour extends over large vertical horizontal range that offset needed. text area offset both directions relative vertical horizontal sync pulses. handbook, full pagewidth horizontal sync screen colour offset lines offset text vertical offset SCREEN COLOUR AREA horizontal sync delay TEXT AREA vertical sync 0.25 character offset text area start text area MGL150 Fig.27 Display area positioning. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.7.1 SCREEN COLOUR DISPLAY AREA SAA55xx This area covered screen colour. screen colour display area starts with fixed offset from leading edge horizontal sync pulse horizontal direction. vertical offset necessary. Table Screen colour display area POSITION Horizontal Vertical 525-LINE Start after leading edge horizontal sync Line Field (321, Field leading edge vertical sync (line numbering using standard). TEXT DISPLAY AREA width text area defined Text Area Register setting character value TAE<5:0>. This number determines where background colour Text Area will extend row. will also terminate character fetch process thus eliminating necessity attribute. This entails however writing positions. vertical offset Text Position Vertical. offset value VOL<5:0> done number scan lines. Note that Text Position Vertical Register should Display Busy interrupt generated these circumstances. 18.8 Character 18.7.2 text area defined start with offset both horizontal vertical direction. Table Text display area POSITION Horizontal DESCRIPTION full sized characters row. Start position setting from characters from leading edge horizontal sync. Fine adjustment quarter characters. lines (nominal 297). Start position setting from leading edge vertical sync, legal values lines (line numbering using standard). facilitate global nature device character ability accommodate large number characters, which stored different matrices. 18.8.1 CHARACTER MATRICES character matrices that accommodated both display modes are: planes) These modes allow colours character position. mode additional character matrices available allow four colours character. planes) characters stored physically matrix size either Vertical horizontal offset Text Area Start. offset done full width characters using TAS<5:0> quarter characters using HOP<1:0> fine setting. values TAS<5:0> will result corrupted display. value should also avoided Text Area Start corruption display occur. Alternative values overcome this problem. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.8.2 CHARACTER SELECTION SAA55xx Four character sets available device. consist alphanumeric characters required Closed Captioning, Customer definable On-Screen Display characters, Special Graphic characters. Only single character used display this selected using Basic selection TXT18.BS<1:0>. When selecting character mode, Twist selection TXT19.TS<1:0> should same value TXT18.BS<1:0> correct operation. TXT: character sets displayed once. These basic alternative (Twist Set). basic selected using TXT18.BS<1:0>. Table Character selection BS1/TS1 BS0/TS0 CHARACTER alternative/twist character defined TXT19.TS<1:0>. Since alternative character option enabled disabled using TXT19.TEN, language code that defined alternative defined TXT19.TC<2:0>. National option table selected using TXT18.NOT<3:0>. maximum National option tables defined when combined with EAST/WEST control located register TXT4. example character selection definitions show Table example National option reference table shown Table Only certain number national options will relevant each Character sets. EXAMPLE LANGUAGE Latin Greek Closed Caption Table National option selection NOT<3:0> 0000 NOT<3:0> 0001 NOT<3:0> 0010 English German Swedish Italian French Spanish Czech Polish German Swedish Italian French Czech English German Swedish Italian French Spanish Turkish NOT<3:0> 1110 Polish German Estonian Lettish Russian Serb-Croat Czech 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.9 addressing SAA55xx Three ROMs used generate correct pixel information. first contains National option look-up table, second contains Basic character look-up table third contains Character pixel information. Although these individual ROMs, since they need accessed simultaneously they combined into single unit. 2400H handbook, full pagewidth CHARACTER PIXEL DATA (71680 12-BIT) LOOK-UP 0800H 0600H TEXT TEXT LOOK-UP 0400H 0800H LOOK-UP BASIC NATIONAL OPTION 2048 LOCATIONS 0000H MBK978 LOOK-UP 0200H LOOK-UP 0000H Fig.28 organisation. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.9.1 CHARACTER TABLE SAA55xx character table shown Fig.29. TXT: character options (Pan-European: Latin) shown Fig.22. handbook, full pagewidth Character code columns (bits MBK976 Character code rows (bits Special characters column Additional table locations normal characters Table locations normal characters Fig.29 Closed Caption character table. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.10 Redefinable characters number Dynamically Redefinable Characters (DRCs) available. These mapped onto normal character codes, replace predefined value. There DRCs, first occupy character codes 8FH, second occupy locations 9FH. This allows DRCs Special DRCs. SAA55xx remapping standard DRCs activated when TXT20.DRCS ENABLE set. selection Normal Special symbols defined TXT20.OSD PLANES. Each character stored matrix planes), this allows possible character matrices defined within single location. handbook, full pagewidth address (HEX) 8800 CHARACTER 881F 8820 CHARACTER 883F 8840 CHARACTER 885F character code character bits 8BC0 CHARACTER 8BDF 8BE0 CHARACTER 8BFF address (HEX) MBK969 Fig.30 Organisation RAM. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) 18.11 Display synchronization horizontal vertical synchronizing signals from deflection used inputs. Both signals inverted before being delivered Phase Selector section. polarity controlled using either VPOL HPOL bits Text Position Vertical. TXT: TXT1.H POLARITY TXT1.V POLARITY bits control polarity. line locked clock derived from free running oscillator Phase Selector. This line locked clock used clock whole Display block. horizontal vertical sync signals synchronized with clock before being used display section. 18.12 Video/Data switch (Fast Blanking) polarity polarity video/data (Fast Blanking) signal inverted. polarity with VDSPOL Brightness. Table Fast blanking signal polarity VDSPOL CONDITION display Video display display Video display Table brightness BRI3 BRI0 0000 1111 18.15 Contrast reduction SAA55xx BRIGHTNESS lowest value highest value This feature available mode. TXT: bits SFRs TXT5 TXT6 control when output device activated (i.e. pulled LOW). This output intended TV's display circuits reduce contrast video when active. result contrast reduction improve readability text mixed teletext video display. bits TXT5 TXT6 SFRs allow display that, example, areas inside teletext boxes will contrast reduced when subtitle being displayed that rest screen will displayed normal video. MEMORY MAPPED REGISTERS (MMR) memory mapped registers used control display. registers mapped into microcontroller MOVX address space, starting address 87F0H extending 87FFH. Table address summary REGISTER NUMBER MEMORY ADDRESS 87F0H 87F1H 87F2H 87F3H 87F4H 87F5H 87F6H 87F7H 87F8H 87F9H 87FAH 87FBH 87FCH 87FDH 87FEH 87FFH FUNCTION Display Control Text Position Vertical Text Area Start Fringing Control Text Area Scroll Area Scroll Range Brightness Status reserved reserved reserved HSYNC Delay VSYNC Sync Delay Scroll Line Configuration 18.13 Video/data switch adjustment take into account delay between values signal external buffering, signal moved relation signals. signal either clock cycle before after signal, coincident with signal. This done using VDEL<2:0> Configuration. 18.14 brightness control brightness control provided allow upper output voltage level modified. nominal value into resistor, varied between brightness Brightness. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Table 87F0 87F1 87F2 87F3 87F4 87F5 87F6 87F7 87F8 NAME SRC3 VPOL HOP1 FRC3 SSH3 SPS3 VDSPOL BUSY SRC2 HPOL HOP0 FRC2 SSH2 SPS2 FIELD HSD6 VSD6 VDEL2 SRC1 VOL5 TAS5 FRC1 TAE5 SSH1 SPS1 SCON SCON HSD5 VSD5 VDEL1 SRC0 VOL4 TAS4 FRC0 TAE4 SSH0 SPS0 HSD4 VSD4 VDEL0 VOL3 TAS3 FRDN TAE3 SSP3 STS3 BRI3 SCR3 SCR3 HSD3 VSD3 SCL3 TXT/V VOL2 TAS2 FRDE TAE2 SSP2 STS2 BRI2 SCR2 SCR2 HSD2 VSD2 SCL2 MOD1 VOL1 TAS1 FRDS TAE1 SSP1 STS1 BRI1 SCR1 SCR1 HSD1 VSD1 SCL1 SAA55xx MOD0 VOL0 TAS0 FRDW TAE0 SSP0 STS0 BRI0 SCR0 SCR0 HSD0 VSD0 SCL0 RESET Display Control Text Position Vertical Text Area Start Fringing Control Text Area Scroll Area Scroll Range Brightness Status 87FC HSYNC Delay 87FD VSYNC Delay 87FE Scroll Line 87FF Configuration 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Table definition REGISTER Display Control SRC3 SRC0 MOD1 MOD0 screen colour definition meshing background colours (logic Video Full Text Mixed Screen Colour Mixed Video Text Position Vertical VPOL HPOL VOL5 VOL0 Text Area Start HOP1 HOP0 TAS5 TAS0 Fringing Control FRC3 FRC0 FRDN FRDE FRDS FRDW Text Area TAE5 TAE0 Scroll Area SSH3 SSH0 SSP3 SSP0 Scroll Range SPS3 SPS0 STS3 STS0 Brightness VDSPOL polarity (1), Video (0), Video BRI3 BRI0 brightness control stop scroll start scroll soft scroll height soft scroll position text area end, full characters fringing colour, value address CLUT fringe north direction (logic fringe east direction (logic fringe south direction (logic fringe west direction (logic fine horizontal offset quarter characters text area start inverted input polarity (logic inverted input polarity (logic display start vertical offset from VSYNC (lines) FUNCTION SAA55xx 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) REGISTER Status read BUSY FIELD SCR3 SCR0 Status write SCON SCR3 SCR0 HSYNC Delay HSD6 HSD0 VSYNC Delay VSD6 VSD0 Scroll Line SCL3 SCL0 Configuration VDEL2 VDEL0 closed caption mode (logic pixel delay between output switched video, active active pixel earlier then synchronous active pixel after TXT/V BUSY signal switch; horizontal (logic line scroll VSYNC delay number 8-bit clock cycles HSYNC delay, full size characters scroll area enabled (logic active flash region background colour only displayed (logic first scroll access display memory could cause display problems (logic even field (logic active flash region background only displayed (logic first scroll FUNCTION SAA55xx 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) LIMITING VALUES accordance with Absolute Maximum Rating System (IEC 60134). SYMBOL VDDX IIOK Tamb Tstg Note PARAMETER supply voltage (all supplies) input voltage (any input) output voltage (any output) output current (each output) input output diode current ambient temperature storage temperature note note CONDITIONS MIN. -0.5 -0.5 -0.5 +4.0 +125 MAX. SAA55xx UNIT This maximum value refers tolerant I/Os maximum, only when present. CHARACTERISTICS 10%; Tamb unless otherwise specified. SYMBOL Supplies VDDX IDDP IDDC IDDC(id) IDDC(pd) IDDC(stb) IDDA IDDA(id) IDDA(pd) IDDA(stb) supply voltage (VDD VSS) Periphery supply current core supply current Idle mode core supply current Power-down mode core supply current Standby mode core supply current analog supply current Idle mode analog supply current Power-down mode analog supply current Standby mode analog supply current note PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Digital inputs RESET Vhys LOW-level input voltage HIGH-level input voltage hysteresis voltage Schmitt trigger input input leakage current equivalent pull-down resistance 1.85 0.44 55.73 70.71 1.00 0.58 0.17 92.45 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SYMBOL HSYNC VSYNC Vhys LOW-level input voltage HIGH-level input voltage hysteresis voltage Schmitt trigger input input leakage current 1.80 0.40 0.96 0.56 0.00 PARAMETER CONDITIONS MIN. TYP. SAA55xx MAX. UNIT Digital outputs FRAME, LOW-level output voltage HIGH-level output voltage output rise time output fall time 90%; 90%; 2.84 7.50 6.70 8.85 7.97 0.13 10.90 10.00 (OPEN-DRAIN OUTPUT) LOW-level output voltage 2.84 0.00 90%; 90%; 7.20 4.90 8.64 7.34 0.14 0.00 5.50 0.12 11.10 9.40 HIGH-level pull-up output voltage push-pull LOW-level input voltage HIGH-level input voltage input leakage current output rise time output fall time Digital input/outputs P0.0 P0.4, P0.7, P1.0 P1.1, P2.1 P2.7, P3.0 P3.7 Vhys LOW-level input voltage HIGH-level input voltage hysteresis voltage Schmitt trigger input input leakage current LOW-level output voltage HIGH-level output voltage output rise time push-pull 90%; push-pull 90%; 1.78 0.41 2.81 6.50 8.47 0.98 0.55 0.01 0.18 5.50 10.70 output fall time 5.70 7.56 10.00 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SYMBOL P1.2, P1.3 P2.0 Vhys LOW-level input voltage HIGH-level input voltage hysteresis voltage Schmitt trigger input input leakage current LOW-level output voltage HIGH-level output voltage output rise time push-pull 90%; push-pull 90%; 1.80 0.42 2.81 7.00 8.47 0.99 0.56 0.02 0.17 5.50 10.50 PARAMETER CONDITIONS MIN. TYP. SAA55xx MAX. UNIT output fall time 5.40 7.36 9.30 P0.5 P0.6 Vhys LOW-level input voltage HIGH-level input voltage input leakage current hysteresis Schmitt trigger input LOW-level output voltage HIGH-level output voltage output rise time push-pull 90%; push-pull 90%; 1.82 0.42 2.76 7.40 8.22 0.98 0.11 0.58 0.20 5.50 8.80 output fall time 4.20 4.57 5.20 P1.4 P1.7 (OPEN-DRAIN) Vhys LOW-level input voltage HIGH-level input voltage hysteresis voltage Schmitt trigger input input leakage current LOW-level output voltage output fall time 90%; 1.99 0.49 69.70 83.67 1.08 0.60 0.13 0.35 103.30 Analog inputs CVBS0 CVBS1 Vsync Vvid(p-p) Zsource 2000 sync voltage amplitude video input voltage amplitude (peak-to-peak value) source impedance Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SYMBOL IREF Rgnd resistor ground resistor tolerance PARAMETER HIGH-level input voltage input capacitance CONDITIONS MIN. TYP. SAA55xx MAX. VDDA UNIT ADC0 ADC3 HIGH-level input voltage HIGH-level input voltage input capacitance VDDA Analog outputs output current (Black Level) output current (maximum Intensity) output current (70% full Intensity) Rload load resistor VSSA load capacitance VDDA VDDA Intensity level code VDDA Intensity level code resistor tolerance 6.67 Analog input/output SYNC_FILTER Csync Vsync storage capacitor ground sync filter level voltage nominal sync amplitude 0.35 0.55 0.75 Crystal oscillator XTALIN XTALOUT output capacitance LOW-level input voltage HIGH-level input voltage input capacitance VSSA VDDA 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SYMBOL PARAMETER CONDITIONS Tamb Tamb Tamb Tamb Tamb MIN. TYP. note SAA55xx MAX. UNIT Crystal specification; notes fxtal Cosc Txtal Notes Peripheral current dependent external components voltage levels I/Os. Crystal order number 4322 05561. 4322 05561 crystal used, then formulae crystal specification should used. Where mean capacitances chip XTALIN XTALOUT. Cext value mean stray capacitances external circuit XTALIN XTALOUT. maximum value crystal holder capacitance ensure start-up Cosc need reduced from initially selected value. osc(typ) 0(max) nominal frequency crystal load capacitance crystal motional capacitance resonance resistance capacitors XTALIN, XTALOUT crystal holder capacitance temperature range adjustment tolerance drift fundamental mode note 10-6 ±100 10-6 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Table I2C-bus characteristics SAA55xx FAST-MODE I2C-bus SYMBOL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tSU;STO Notes device must internally provide hold time least signal (referred VIH(min) signal) order bridge undefined region falling edge SCL. maximum fHD;DAT only device does stretch period tLOW signal. fast-mode I2C-bus device used standard-mode I2C-bus system, requirement tSU;DAT must then met. This will automatically case device does stretch period signal. such device does stretch period signal, must output next data line trmax tSU;DAT 1000 1250 (according standard-mode I2C-bus specification) before line released. total capacitance line clock frequency free time between STOP START condition hold time (repeated) START condition. After this period, first clock pulse generated. period clock HIGH period clock time repeated START condition data hold time; notes data time; note rise time both signals; note fall time both signals; note time STOP condition capacitive load each line PARAMETER MIN. MAX. UNIT 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) QUALITY RELIABILITY SAA55xx This device will meet Philips Semiconductors General Quality Specification Business group "Consumer Integrated Circuits SNW-FQ-611-Part principal requirements shown Tables Table Acceptance tests TEST Mechanical Electrical cumulative target: cumulative target: <100 REQUIREMENTS Table Processability tests package family) TEST Solderability Mechanical Solder heat resistance 0/16 lots 0/15 lots 0/15 lots REQUIREMENTS Table Reliability tests process family) TEST Operational life Humidity life Temperature cycling performance CONDITIONS hours temperature, humidity, bias 1000 hours, equivalent test) Tstg(min) Tstg(max) REQUIREMENTS <1000 <2000 <2000 Table Reliability tests device type) TEST latch-up CONDITIONS REQUIREMENTS Human body model 2000 Machine model latch-up (absolute maximum) Notes Tables fraction defective devices, parts million. fraction devices failing test condition, Failures Million. FITS Failures Time Standard. 2000 This text here white force landscape pages rotated correctly when browsing through Acrobat reader.This text here _white force landscape pages rotated correctly when browsing through Acrobat reader.This text here inThis text here white force landscape pages rotated correctly when browsing through Acrobat reader. white force landscape pages dbook, full pagewidth 2000 APPLICATION INFORMATION Philips Semiconductors microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) Vtune PH2369 P2.0/TPWM EEPROM PCF8582E P1.5/SDA1 P1.4/SCL1 P1.7/SDA0 P1.6/SCL0 P1.3/T1 P1.2/INT0 P1.1/T0 P1.0/INT1 VDDP RESET XTALOUT XTALIN OSCGND VDDC VSSP VSYNC HSYNC VDDA P3.4/PWM7 FRAME TV's display circuits field flyback line flyback RECEIVER control signals brightness contrast saturation volume volume VAFC status P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 P3.0/ADC0 P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 program+ program- VHF-L VHF-H menu control signals VSSC P0.0 P0.1 P0.2 P0.3 P0.4 SAA55xx minus(-) P0.5 plus(+) VSSA CVBS (IF) CVBS (SCART) CVBS0 CVBS1 SYNC_FILTER IREF P0.6 P0.7 Preliminary specification SAA55xx MBK980 Fig.31 Application diagram. Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) ELECTROMAGNETIC COMPATIBILITY (EMC) GUIDELINES Optimization circuit return paths minimisation common mode emission will assisted using double sided printed-circuit board (PCB) with inductance ground plane. single-sided local ground plane under whole Integrated Circuit (IC) should present shown Fig.32. This should connected widest possible connection back ground connection, bulk electrolytic decoupling capacitor. should preferably connect other grounds way, wire links should present this connect. wire links increases ground bounce introducing inductance into ground. supply pins decoupled ground plane under This easily accomplished using surface mount capacitors, which more effective than leaded components high frequency. SAA55xx Using device socket will unfortunately area inductance external bypass loop. ferrite bead inductor with resistive characteristics high frequencies utilised supply line close decoupling capacitor provide high impedance. prevent pollution conduction onto signal lines (which then radiate) signals connected supply pull resistor should connected side this ferrite component. OSCGND should connected only crystal load capacitors local circuit ground. Physical connection distances associated active devices should short. Output traces should routed with close proximity mutually coupled ground return paths. handbook, full pagewidth +3.3 electrolytic decoupling capacitor other connections VDDC VDDP VDDA VSSP ferrite beads decoupling capacitors under-IC plane connection note: wire links under-IC plane VSSC VSSA MBK979 Fig.32 Power supply connections EMC. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) PACKAGE OUTLINES SDIP52: plastic shrink dual in-line package; leads (600 mil) SAA55xx SOT247-1 seating plane index scale DIMENSIONS original dimensions) UNIT Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT247-1 REFERENCES JEDEC MS-020 EIAJ EUROPEAN PROJECTION max. 5.08 min. 0.51 max. 0.53 0.40 0.32 0.23 47.9 47.1 14.0 13.7 1.778 15.24 15.80 15.24 17.15 15.90 0.18 max. 1.73 ISSUE DATE 95-03-11 99-12-27 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SAA55xx LQFP100: plastic profile quad flat package; leads; body SOT407-1 index detail scale DIMENSIONS original dimensions) UNIT Note Plastic metal protrusions 0.25 maximum side included. OUTLINE VERSION SOT407-1 REFERENCES 136E20 JEDEC MS-026 EIAJ EUROPEAN PROJECTION max. 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 14.1 13.9 14.1 13.9 0.75 0.45 0.08 0.08 1.15 0.85 1.15 0.85 16.25 16.25 15.75 15.75 ISSUE DATE 00-01-19 00-02-01 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) SOLDERING 26.1 Introduction soldering through-hole mount packages SAA55xx total contact time successive solder waves must exceed seconds. device mounted seating plane, temperature plastic body must exceed specified maximum storage temperature (Tstg(max)). printed-circuit board been pre-heated, forced cooling necessary immediately after soldering keep temperature within permissible limit. 26.3 Manual soldering This text gives brief insight wave, manual soldering. more in-depth account soldering found "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 90011). Wave soldering preferred method mounting through-hole mount packages printed-circuit board. 26.2 Soldering dipping solder wave maximum permissible temperature solder solder this temperature must contact with joints more than seconds. 26.4 Apply soldering iron less) lead(s) package, either below seating plane more than above temperature soldering iron less than remain contact seconds. temperature between contact seconds. Suitability through-hole mount packages dipping wave soldering methods SOLDERING METHOD PACKAGE DIPPING WAVE suitable(1) DBS, DIP, HDIP, SDIP, Note suitable SDIP packages, longitudinal axis must parallel transport direction printed-circuit board. 2000 Philips Semiconductors Preliminary specification microcontrollers with Closed Captioning (CC) On-Screen Display (OSD) DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values SAA55xx This data sheet contains target goal specifications product development. This data sheet contains preliminary data; supplementary data published later. This data sheet contains final product specifications. Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. 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