µPD78F0034A, 78F0034AY 8-BIT SINGLE-CHIP MICROCONTROLLER DES
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INTEGRATED CIRCUIT
µPD78F0034A, 78F0034AY
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
µPD78F0034A member µPD780034A Subseries 78K/0 Series, equivalent
µPD780034A with flash memory place internal ROM.
µPD78F0034AY member µPD780034AY Subseries, featuring flash memory place internal µPD780034AY. µPD78F0034A incorporates flash memory, which programmed erased while mounted board. Detailed function descriptions provided following user's manuals. sure read them before designing.
µPD780024A, 780034A, 780024AY, 780034AY Subseries User's Manual: U14046E
78K/0 Series Instruction User's Manual: U12326E
FEATURES
Pin-compatible with mask versions (except pin) Flash memory: Supply voltage: Note KBNote Internal high-speed RAM: 1,024 bytesNote
flash memory internal high-speed capacities changed with memory size switching register (IMS).
Remark differences between flash memory mask versions, refer DIFFERENCES BETWEEN µPD78F0034A, 78F0034AY, MASK VERSIONS.
ORDERING INFORMATION
Part Number Package 64-pin plastic SDIP (19.05 (750)) 64-pin plastic LQFP 64-pin plastic LQFP 64-pin plastic 64-pin plastic TQFP 64-pin plastic SDIP (19.05 (750)) 64-pin plastic LQFP 64-pin plastic LQFP 64-pin plastic 64-pin plastic TQFP Internal Flash memory Flash memory Flash memory Flash memory Flash memory Flash memory Flash memory Flash memory Flash memory Flash memory
µPD78F0034ACW µPD78F0034AGB-8EU µPD78F0034AGC-8BS µPD78F0034AGC-AB8 µPD78F0034AGK-9ET µPD78F0034AYCW µPD78F0034AYGB-8EU µPD78F0034AYGC-8BS µPD78F0034AYGC-AB8 µPD78F0034AYGK-9ET
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Document U14040EJ4V0DS00 (4th edition) Date Published April 2002 CP(K) Printed Japan
mark
shows major revised points.
1999, 2000
µPD78F0034A, 78F0034AY
78K/0 SERIES LINEUP
products 78K/0 Series listed below. names enclosed boxes subseries names.
Products mass production Products under development
subseries products compatible with bus. Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin
PD78075B PD78078 PD78070A PD780058 PD78058F µPD78054 µPD780065 PD780078 PD780034A PD780024A µPD78014H µPD78018F PD78083
Inverter control
EMI-noise reduced version µPD78078
µPD78078Y PD78070AY PD780018AY PD780058Y PD78058FY PD78054Y
PD78054 with timer enhanced external interface
ROMless version PD78078 PD78078Y with enhanced serial limited function
PD78054 with enhanced serial
EMI-noise reduced version PD78054
PD78018F with UART converter, enhanced PD780024A with expanded PD780034A with timer enhanced serial PD780078Y PD780034AY PD780024A with enhanced converter PD780024AY PD78018F with enhanced serial EMI-noise reduced version PD78018F PD78018FY
Basic subseries control On-chip UART, capable operating voltage (1.8
64-pin
µPD780988
drive
On-chip inverter control circuit UART. EMI-noise reduced.
100-pin 80-pin 78K/0 Series 80-pin 80-pin
PD780208 PD780232 µPD78044H µPD78044F
drive
PD78044F with enhanced C/D. Display output total:
panel control. On-chip C/D. Display output total:
PD78044F with N-ch open-drain I/O. Display output total:
Basic subseries driving VFD. Display output total:
100-pin 100-pin 120-pin 120-pin 120-pin 100-pin 100-pin 100-pin
PD780354 PD780344 PD780338 PD780328 µPD780318 PD780308 µPD78064B µPD78064
µPD780354Y PD780344Y
PD780344 with enhanced converter PD780308 with enhanced display function timer. PD780308 with enhanced display function timer. PD780308 with enhanced display function timer. PD780308 with enhanced display function timer.
Segment signal output: pins max. Segment signal output: pins max. Segment signal output: pins max. Segment signal output: pins max.
µPD780308Y PD78064Y
PD78064 with enhanced SIO, expanded EMI-noise reduced version PD78064
Basic subseries driving LCDs, on-chip UART
interface supported 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin
PD780948 PD78098B PD780702Y µPD780703Y PD780833Y
µPD780816
Meter control
On-chip controller
PD78054 with IEBuscontroller
On-chip IEBus controller On-chip controller On-chip controller compliant with J1850 (Class Specialized controller function
100-pin 80-pin 80-pin
µPD780958 µPD780852 µPD780828B
industrial meter control On-chip automobile meter controller/driver automobile meter driver. On-chip controller
Remark (Vacuum Fluorescent Display) referred FIP(Fluorescent Indicator Panel) some documents, functions same.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
major functional differences among subseries listed below. Non-Y subseries
Function Subseries Name Control Timer 8-Bit 10-Bit 8-Bit Capacity (Bytes) 8-Bit 16-Bit Watch Serial Interface External MIN. Value Expansion
µPD78075B µPD78078 µPD78070A
(UART:
(time-division UART: (UART:
µPD780058 µPD78058F µPD78054
µPD780065 µPD780078
µPD780034A µPD780024A
(UART: (UART: (UART:
µPD78014H µPD78018F µPD78083
Inverter control drive
(UART: (UART:
µPD780988 Note µPD780208 µPD780232 µPD78044H µPD78044F
drive
µPD780354 µPD780344 µPD780338 µPD780328 µPD780318 µPD780308 µPD78064B µPD78064
(UART:
(UART:
(time-division UART: (UART:
interface
µPD780948 µPD78098B
(UART:
supported µPD780816 Meter control Dashboard control
(UART: (UART:
µPD780958 µPD780852
µPD780828B
(UART:
Note 16-bit timer: channels 10-bit timer: channel
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
subseries
Function Subseries Name Control Capacity (Bytes) Timer 8-Bit 10-Bit 8-Bit (UART: I2C:
Serial Interface
8-Bit 16-Bit Watch
External MIN. Value Expansion
µPD78078Y
µPD78070AY
µPD780018AY
µPD780058Y
µPD78058FY
(time-division UART: (UART:
µPD78054Y
µPD780078Y
µPD780034AY µPD780024AY
(I2C: (UART: (time-division UART: I2C: (UART: (UART: I2C:
(UART:
(UART:
µPD78018FY
drive
µPD780354Y µPD780344Y µPD780308Y
µPD78064Y
µPD780701Y interface µPD780703Y supported µPD780833Y
Remark
Functions other than serial interface common both non-Y subseries.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
OVERVIEW FUNCTIONS
Part Number Item Internal memory Memory space General-purpose registers Minimum instruction execution time When main system clock selected When subsystem clock selected Instruction Flash memory High-speed KBNote 1,024 bytesNote bits registers bits registers banks) On-chip minimum instruction execution time cycle variable function 0.24 µs/0.48 µs/0.95 µs/1.91 µs/3.81 8.38 operation) 32.768 operation) 16-bit operation Multiply/divide bits bits, bits bits) manipulation (set, reset, test, Boolean operation) adjust, etc.
µPD78F0034A
µPD78F0034AY
ports
Total:
CMOS input: CMOS I/O: N-ch open-drain withstand voltage): converter 10-bit resolution channels Operable over wide power supply voltage range: AVDD Serial interface UART mode: channel 3-wire serial mode: channels UART mode: channel 3-wire serial mode: channel mode (multimaster supporting): channel
Timers
16-bit timer/event counter: 8-bit timer/event counter: Watch timer: Watchdog timer:
channel channels channel channel
Timer outputs Clock output
(8-bit output capable: 65.5 kHz, kHz, kHz, kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 8.38 operation with main system clock) 32.768 32.768 operation with subsystem clock) 1.02 kHz, 2.05 kHz, 4.10 kHz, 8.19 8.38 operation with main system clock) Maskable Non-maskable Software Internal: external: Internal: Internal: external: +85°C 64-pin 64-pin 64-pin 64-pin 64-pin plastic plastic plastic plastic plastic SDIP (19.05 (750)) LQFP LQFP TQFP
Buzzer output Vectored interrupt sources
Test inputs Supply voltage Operating ambient temperature Package
Note
capacities flash memory internal high-speed changed with memory size switching register (IMS).
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
CONTENTS
CONFIGURATION (TOP VIEW)
BLOCK DIAGRAM FUNCTIONS
Port Pins Non-Port Pins Circuits Recommended Connection Unused Pins
DIFFERENCES BETWEEN µPD78F0034A, 78F0034AY, MASK VERSIONS MEMORY SIZE SWITCHING REGISTER (IMS) FLASH MEMORY PROGRAMMING
Selection Communication Mode Flash Memory Programming Functions Connection Flashpro
ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
CONFIGURATION (TOP VIEW)
64-pin plastic SDIP (19.05 (750))
µPD78F0034ACW, 78F0034AYCW
P40/AD0 P41/AD1 P42/AD2 P43/AD3 P44/AD4 P45/AD5 P46/AD6 P47/AD7 P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 VSS0 VDD0 P32/SDA0Note P33/SCL0Note P34/SI31Note P35/SO31Note P36/SCK31Note P20/SI30 P21/SO30 P22/SCK30 P23/RxD0 P24/TxD0 P25/ASCK0 VDD1
P67/ASTB P66/WAIT P65/WR P64/RD P75/BUZ P74/PCL P73/TI51/TO51 P72/TI50/TO50 P71/TI01 P70/TI00/TO0 P03/INTP3/ADTRG P02/INTP2 P01/INTP1 P00/INTP0 VSS1 RESET AVDD AVREF P10/ANI0 P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 AVSS
Notes
SDA0 SCL0 incorporated only µPD78F0034AY Subseries. SI31, SO31, SCK31 incorporated only µPD78F0034A Subseries.
Cautions Connect directly VSS0 VSS1 normal operation mode. Connect AVSS VSS0. Remark When µPD78F0034A 78F0034AY used application fields that require reduction noise generated from inside microcontroller, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
64-pin plastic LQFP 64-pin plastic
µPD78F0034AGB-8EU, 78F0034AYGB-8EU
64-pin plastic LQFP
µPD78F0034AGC-AB8, 78F0034AYGC-AB8
64-pin plastic TQFP
µPD78F0034AGC-8BS, 78F0034AYGC-8BS
µPD78F0034AGK-9ET, 78F0034AYGK-9ET
P73/TI51/TO51 P72/TI50/TO50
P67/ASTB
P66/WAIT
P75/BUZ
P47/AD7
P46/AD6
P45/AD5
P44/AD4
P43/AD3
P42/AD2
P41/AD1
P40/AD0
P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 VSS0 VDD0 P32/SDA0 P33/SCL0
Note
P74/PCL
P65/WR
P64/RD
P71/TI01 P70/TI00/TO0 P03/INTP3/ADTRG P02/INTP2 P01/INTP1 P00/INTP0 VSS1 RESET AVDD AVREF P10/ANI0
Note
P34/SI31Note P35/SO31Note
P17/ANI7
P16/ANI6
P15/ANI5
P14/ANI4
P13/ANI3
P12/ANI2
P21/SO30
P22/SCK30
P23/RxD0
P24/TxD0
P25/ASCK0
Notes
SDA0 SCL0 incorporated only µPD78F0034AY Subseries. SI31, SO31, SCK31 incorporated only µPD78F0034A Subseries.
Cautions Connect directly VSS0 VSS1 normal operation mode. Connect AVSS VSS0. Remark When µPD78F0034A 78F0034AY used application fields that require reduction noise generated from inside microcontroller, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
P36/SCK31Note
Data Sheet U14040EJ4V0DS
P11/ANI1
P20/SI30
VDD1
AVSS
µPD78F0034A, 78F0034AY
A15: AD7: ADTRG: ANI0 ANI7: ASCK0: ASTB: AVDD: AVREF: AVSS: BUZ: INTP0 INTP3: P03: P17: P25: P36: P47: P57: P67: Address Address/data trigger input Analog input Asynchronous serial clock Address strobe Analog power supply Analog reference voltage Analog ground Buzzer clock External interrupt input Port Port Port Port Port Port Port P75: PCL: RESET: RxD0: SDA0: SI30, SI31: SO30, SO31: TO0, TO50, TO51: TxD0: VDD0, VDD1: VPP: VSS0, VSS1: WAIT: XT1, XT2: Port Programmable clock Read strobe Reset Receive data Serial data Serial input Serial output Timer output Transmit data Power supply Programming power supply Ground Wait Write strobe Crystal (main system clock) Crystal (subsystem clock)
SCK30, SCK31, SCL0: Serial clock
TI00, TI01, TI50, TI51: Timer input
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
BLOCK DIAGRAM
TI00/TO0/P70 TI01/P71 TI50/TO50/P72 TI51/TO51/P73
16-bit timer/ event counter 8-bit timer/ event counter 8-bit timer/ event counter Watchdog timer Watch timer
Port
Port
Port
Port Flash memory
SI30/P20 SO30/P21 SCK30/P22 SI31/P34 SO31/P35 SCK31/P36 RxD0/P23 TxD0/P24 ASCK0/P25 SDA0/P32 SCL0/P33 ANI0/P10 ANI7/P17 AVDD AVSS AVREF INTP0/P00 INTP3/P03 BUZ/P75 PCL/P74
78K/0 core Serial interface
Port
Port
Serial interface 31Note (1,024 bytes)
Port
Port
AD0/P40 AD7/P47 A8/P50 A15/P57 RD/P64 WR/P65 WAIT/P66 ASTB/P67 RESET
UART0
busNote
External access
converter
Interrupt control Buzzer output Clock output control
System control
VDD0 VDD1 VSS0 VSS1
Notes
Incorporated only µPD78F0034A Incorporated only µPD78F0034AY
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
FUNCTIONS
Port Pins (1/2)
Name Function After Reset Alternate Function INTP0 INTP1 INTP2 INTP3/ADTRG Input Port 8-bit input-only port. Port 6-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified software. Input ANI0 ANI7
Port 4-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified software.
Input
Input
SI30 SO30 SCK30 RxD0 TxD0 ASCK0
Port 7-bit port. Input/output specified 1-bit units.
N-ch open-drain port. LEDs driven directly.
Input
SDA0Note SCL0Note on-chip pull-up resistor specified software. SI31Note SO31Note SCK31Note
Port 8-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified software. Interrupt request flag KRIF falling edge detection. Port 8-bit port. LEDs driven directly. Input/output specified 1-bit units. on-chip pull-up resistor specified software. Port 4-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified software.
Input
Input
Input
WAIT ASTB
Notes
SDA0 SCL0 incorporated only µPD78F0034AY Subseries. SI31, SO31, SCK31 incorporated only µPD78F0034A Subseries.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Port Pins (2/2)
Name Function After Reset Alternate Function TI00/TO0 TI01 TI50/TO50 TI51/TO51
Port 6-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified software.
Input
Non-Port Pins (1/2)
Name Function After Reset Alternate Function P03/ADTRG Input Serial interface serial data input. Input Output Serial interface serial data input/output Serial interface serial data output. Input Input Serial interface serial clock input/output. Input Input Output Input Input Serial data input asynchronous serial interface. Serial data output asynchronous serial interface. Serial clock input asynchronous serial interface. External count clock input 16-bit timer/event counter Capture trigger signal input capture register (CR01) 16-bit timer/ event counter Capture trigger signal input capture register (CR00) 16-bit timer/ event counter External count clock input 8-bit timer/event counter External count clock input 8-bit timer/event counter Output 16-bit timer/event counter output. 8-bit timer/event counter output (shared with 8-bit output). 8-bit timer/event counter output (shared with 8-bit output). Output Output Clock output (for trimming main system clock subsystem clock). Buzzer output. Lower address/data extending memory externally. Input Input Input Input Input Input Input Input Input P70/TO0
INTP0 INTP1 INTP2 INTP3 SI30 SI31Note SDA0Note SO30 SO31Note SCK30 SCK31Note SCL0Note RxD0 TxD0 ASCK0 TI00
Input
External interrupt request input which valid edge (rising edge, falling edge, both rising falling edges) specified.
Input
TI01
TI50 TI51 TO50 TO51
P72/TO50 P73/TO51 P70/TI00 P72/TI50 P73/TI51
Notes
SI31, SO31, SCK31 incorporated only µPD78F0034A Subseries. SDA0 SCL0 incorporated only µPD78F0034AY Subseries.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Non-Port Pins (2/2)
Name Function After Reset Alternate Function Input Input
WAIT ASTB
Output Output
Higher address extending memory externally. Strobe signal output read operation external memory. Strobe signal output write operation external memory.
Input Input
Input Output
Inserting wait accessing external memory. Strobe output which externally latches address information output ports access external memory. converter analog input. converter trigger signal input. converter reference voltage input. converter analog power supply. voltage equal VDD0 VDD1. converter ground potential. voltage equal VSS0 VSS1. System reset input. Connecting crystal resonator main system clock oscillation.
ANI0 ANI7 ADTRG AVREF AVDD
Input Input Input
Input Input
P03/INTP3
AVSS
RESET VDD0 VSS0 VDD1 VSS1
Input Input Input
Connecting crystal resonator subsystem clock oscillation.
Positive power supply voltage ports. Ground potential ports. Positive power supply (except ports). Ground potential (except ports). Applying high-voltage program write/verify. Connect directly VSS0 VSS1 normal operation mode.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Circuits Recommended Connection Unused Pins input/output circuit type each recommended connection unused pins shown Table 3-1. input/output configuration each type, refer Figure Table 3-1. Types Circuits (1/2)
Name P00/INTP0 P01/INTP1 P02/INTP2 P03/INTP3/ADTRG P10/ANI0 P17/ANI7 P20/SI30 P21/SO30 P22/SCK30 P23/RxD0 P24/TxD0 P25/ASCK0 P30, P32/SDA0Note P33/SCL0Note P34/SI31Note P35/SO31Note P36/SCK31Note P40/AD0 P47/AD7 Input: Independently connect VDD0 VSS0 resistor. Output: Leave open. Input: Independently connect VDD0 resistor. Output: Leave open. Input: Independently connect VDD0 VSS0 resistor. Output: Leave open. 13-P 13-R Input: Independently connect VDD0 resistor. Output: Leave open. Input Directly connect VDD0 VSS0. Input: Independently connect VDD0 VSS0 resistor. Output: Leave open. Circuit Type Recommended Connection Unused Pins Input: Independently connect VSS0 resistor. Output: Leave open.
P50/A8 P57/A15 P64/RD P65/WR P66/WAIT P67/ASTB P70/TI00/TO0 P71/TI01 P72/TI50/TO50 P73/TI51/TO51 P74/PCL P75/BUZ
Notes
SDA0 SCL0 incorporated only µPD78F0034AY Subseries. SI31, SO31, SCK31 incorporated only µPD78F0034A Subseries.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Table 3-1. Types Circuits (2/2)
Name RESET AVDD AVREF AVSS Directly connect VSS0 VSS1. Circuit Type Input Directly connect VDD0. Leave open. Directly connect VDD0 VDD1. Directly connect VSS0 VSS1. Recommended Connection Unused Pins
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Figure 3-1. Circuits
TYPE TYPE 13-R IN/OUT Data Output disable VSS0 Schmitt-triggered input with hysteresis characteristics N-ch
TYPE
VDD0
TYPE Feedback cut-off
Pullup enable Data
P-ch VDD0 P-ch IN/OUT
P-ch
Output disable Input enable TYPE
N-ch VSS0
TYPE VDD0 P-ch P-ch VDD0 P-ch IN/OUT Comparator
Pullup enable Data
N-ch VSS0 VREF (threshold voltage)
Output disable
N-ch VSS0
Input enable
TYPE 13-P Data Output disable N-ch VSS0
IN/OUT
Input enable
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
DIFFERENCES BETWEEN µPD78F0034A, 78F0034AY, MASK VERSIONS
µPD78F0034A 78F0034AY products provided with flash memory which enables writing, erasing, rewriting programs with device mounted target system. functions µPD78F0034A (except functions specified flash memory) made same those mask versions setting memory size switching register (IMS). Tables show differences between µPD78F0034A, 78F0034AY mask versions. Table 4-1. Differences Between µPD78F0034A Mask Versions
Item
µPD78F0034A
Mask Versions
µPD780034A Subseries
Internal structure Internal capacity Flash memory Mask
µPD780024A SubseriesNote µPD780021A: µPD780022A: µPD780023A: µPD780024A: µPD780021A: µPD780022A: µPD780023A: µPD780024A:
µPD780031A: µPD780032A: µPD780033A: µPD780034A: µPD780031A: µPD780032A: µPD780033A: µPD780034A:
bytes bytes 1,024 bytes 1,024 bytes
bytes bytes 1,024 bytes 1,024 bytes
Internal high-speed capacity
1,024 bytes
Minimum instruction execution time
Minimum instruction execution time variable function incorporated 0.166 µs/0.333 µs/0.666 µs/1.33 µs/2.66 (operation MHz,
When main system clock selected 0.24 µs/0.48 µs/0.95 1.91 µs/3.81 (operation 8.38 MHz, When subsystem clock selected Clock output (32.768 kHz) 65.5 kHz, kHz, kHz, kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 (operation 8.38 with main system clock) 32.768 (operation 32.768 with subsystem clock) 1.02 kHz, kHz, 4.10 kHz, 8.19 (operation 8.38 with main system clock) bits available provided Provided
93.75 kHz, 187.5 kHz, kHz, kHz, 1.25 MHz, MHz, MHz, (operation with main system clock) 32.768 (operation 32.768 with subsystem clock)
Buzzer output
1.46 kHz, 2.93 kHz, 5.86 kHz, 11.7 (operation with main system clock)
converter resolution Mask option specification on-chip pull-up resistor pins Electrical specifications, recommended soldering conditions
bits Available Provided provided
Refer data sheet individual products.
Note
µPD78F0034A used flash memory version µPD780024A Subseries.
Caution There differences noise immunity noise radiation between flash memory mask versions. When pre-producing application with flash memory version then mass producing with mask version, sure conduct sufficient evaluations commercial samples (CS) (not engineering samples (ES)) mask versions.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Table 4-2. Differences Between µPD78F0034AY Mask Versions
Item
µPD78F0034AY
Mask Versions
µPD780034AY Subseries
Internal structure Internal capacity Flash memory Mask
µPD780024AY SubseriesNote
µPD780031AY: µPD780032AY: µPD780033AY: µPD780034AY:
µPD780021AY: µPD780022AY: µPD780023AY: µPD780024AY:
Internal high-speed capacity
1,024 bytes
µPD780031AY: bytes µPD780032AY: bytes µPD780033AY: 1,024 bytes µPD780034AY: 1,024 bytes
µPD780021AY: bytes µPD780022AY: bytes µPD780023AY: 1,024 bytes µPD780024AY: 1,024 bytes
Minimum instruction execution time
Minimum instruction execution time variable function incorporated
When main system clock selected 0.24 µs/0.48 µs/0.95 µs/1.91 µs/3.81 (operation 8.38 MHz, When subsystem clock selected Clock output (32.768 kHz) 65.5 kHz, kHz, kHz, kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 (operation 8.38 with main system clock) 32.768 (operation 32.768 with subsystem clock) Buzzer output 1.02 kHz, kHz, 4.10 kHz, 8.19 (operation 8.38 with main system clock) bits available Available bits
converter resolution Mask option specification on-chip pull-up resistor pins Electrical specifications, recommended soldering conditions
provided Provided
Provided provided
Refer data sheet individual products.
Note
µPD78F0034AY used flash memory version µPD780024AY Subseries.
Caution There differences noise immunity noise radiation between flash memory mask versions. When pre-producing application with flash memory version then mass producing with mask version, sure conduct sufficient evaluations commercial samples (CS) (not engineering samples (ES)) mask versions.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
MEMORY SIZE SWITCHING REGISTER (IMS)
register that software used specify part internal memory that used. setting memory size switching register (IMS), internal memory µPD78F0034A 78F0034AY mapped identically that mask version. with 8-bit memory manipulation instruction. RESET input sets CFH. Caution initial value setting disabled (CFH). sure value target mask version moment initial setting. Figure 5-1. Format Memory Size Switching Register
Address FFF0H After reset
RAM2 RAM1 RAM0
ROM3 ROM2 ROM1 ROM0
ROM3 ROM2 ROM1 ROM0 Selection Internal Capacity Setting prohibited
Other than above
RAM2 RAM1 RAM0 Selection Internal High-Speed Capacity bytes 1,024 bytes Setting prohibited
Other than above
Table shows value make memory mapping same those mask versions. Table 5-1. Value Memory Size Switching Register
Target Mask Versions Value
µPD780031A, 780031AY µPD780032A, 780032AY µPD780033A, 780033AY µPD780034A, 780034AY
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
FLASH MEMORY PROGRAMMING
Writing flash memory performed without removing memory from target system board programming). Writing performed with dedicated flash programmer (Flashpro (part No.: FL-PR3 PGFP3)) connected host machine target system. Writing flash memory also performed using flash memory writing adapter connected Flashpro III. Remark FL-PR3 product Naito Densei Machida Mfg. Co., Ltd. Selection Communication Mode Writing flash memory performed using Flashpro serial communication. Select communication modes Tables 6-2. selection communication mode made using format shown Figure 6-1. Each communication mode selected number pulses shown Tables 6-2. Table 6-1. List Communication Mode (µPD78F0034A)
Communication Mode 3-wire serial Channels Used SI30/P20 SO30/P21 SCK30/P22 SI31/P34 SO31/P35 SCK31/P36 UART RxD0/P23 TxD0/P24 P72/TI50/TO50 (serial clock input) P71/TI01 (serial data output) P70/TI00/TO0 (serial data input) Pulses
Pseudo 3-wire serial
Caution sure select communication mode using number pulses shown Table 6-1.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Table 6-2. List Communication Mode (µPD78F0034AY)
Communication Mode 3-wire serial Channels Used SI30/P20 SO30/P21 SCK30/P22 SDA0/P32 SCL0/P33 RxD0/P23 TxD0/P24 P72/TI50/TO50 (serial clock input) P71/TI01 (serial data output) P70/TI00/TO0 (serial data input) Pulses
UART
Pseudo 3-wire serial
Caution sure select communication mode using number pulses shown Table 6-2. Figure 6-1. Format Communication Mode Selection
pulses RESET Flash write mode
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Flash Memory Programming Functions Operations such writing flash memory performed various command/data transmission reception operations according selected communication mode. Table shows major functions flash memory programming. Table 6-3. Major Functions Flash Memory Programming
Function Reset Batch verify Batch erase Batch blank check High-speed write Description Used stop write operation detect transmission cycle. Compares entire memory contents with input data. Erases entire memory contents. Checks deletion status entire memory. Performs write flash memory based write start address number data written (number bytes). Performs continuous write based information input with high-speed write operation. Used confirm current operating mode operation end. Sets frequency resonator. Sets memory erase time. Sets communication rate UART mode Sets standard/high-speed mode mode Outputs device name memory capacity, device block information.
Continuous write Status Oscillation frequency setting Erase time setting Baud rate setting mode setting Silicon signature read
Connection Flashpro connection Flashpro µPD78F0034A 78F0034AY differs according communication mode (3-wire serial I/O, UART, pseudo 3-wire serial I/O, bus). connection each communication mode shown Figures 6-5, respectively. Figure 6-2. Connection Flashpro 3-Wire Serial Mode
PD78F0034A, µPD78F0034AY
Flashpro RESET
RESET SCK3n SI3n SO3n
Remark µPD78F0034A:
µPD78F0034AY:
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Figure 6-3. Connection Flashpro UART Mode
PD78F0034A, µPD78F0034AY
Flashpro RESET
RESET RxD0 TxD0
Figure 6-4. Connection Flashpro Pseudo 3-Wire Serial Mode
PD78F0034A, µPD78F0034AY
Flashpro RESET
RESET
(serial clock input) (serial data input)
(serial data output)
Figure 6-5. Connection Flashpro Mode (µPD78F0034AY only)
Flashpro RESET
PD78F0034AY
RESET SCL0 SDA0
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVREF AVSS Input voltage P03, P17, P25, P36, P47, P57, P67, P75, XT1, XT2, RESET N-ch open drain Conditions Ratings -0.3 +6.5 -0.3 +10.5 -0.3 -0.3 0.3Note 0.3Note Unit
-0.3 +0.3 -0.3 0.3Note
Output voltage Analog input voltage
-0.3 +6.5 -0.3 0.3Note 0.3Note
Analog input
AVSS -0.3 AVREF -0.3 0.3Note
Output current, high
Total P03, P47, P57, P67, Total P25,
Output current,
P03, P25, P36, P47, P67, P33, Total P03, P47, P67, Total Total Total
+125
Operating ambient temperature Storage temperature
During normal operation During flash memory programming
Tstg
Note
below
Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Capacitance 25°C,
Parameter Input capacitance capacitance Symbol Conditions Unmeasured pins returned Unmeasured pins returned P03, P25, P36, P47, P57, P67, P75, MIN. TYP. MAX. Unit
Remark Unless otherwise specified, characteristics alternate-function pins same those port pins. Main System Clock Oscillator Characteristics +85°C,
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency (fX)Note Oscillation stabilization timeNote Oscillation frequency (fX)Note Oscillation stabilization timeNote input frequency (fX)Note input high-/low-level width (tXH, tXL)
Conditions After reaches oscillation voltage range MIN.
MIN.
TYP.
MAX. 8.38
Unit
Crystal resonator
8.38
External clock
8.38
PD74HCU04
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS1. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped system operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Subsystem Clock Oscillator Characteristics +85°C,
Resonator Crystal resonator Recommended Circuit
XT1VPP
Parameter Oscillation frequency (fXT)Note Oscillation stabilization timeNote
Conditions
MIN.
TYP. 32.768
MAX.
Unit
38.5
External clock
input frequency (fXT)Note input high-/low-level width (tXTH, tXTL)
µPD74HCU04
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reaches oscillator voltage MIN. Cautions When using subsystem clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS1. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. subsystem clock oscillator designed low-amplitude circuit reducing current consumption, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Recommended Oscillator Constant Main System Clock: Ceramic Resonator +85°C)
Manufacturer Part Number Frequency (MHz) Murata Co., Ltd. CSBFB1M00J58 CSBLA1M00J58 CSTCC2M00G56 CSTLS2M00G56 CSTCC3M58G53 CSTLS3M58G53 CSTCR4M00G53 CSTLS4M00G53 CSTCR4M19G53 CSTLS4M19G53 CSTCR4M91G53 CSTLS4M91G53 CSTCR5M00G53 CSTLS5M00G53 CSTCE8M00G52 CSTLS8M00G53 CSTLS8M00G53093 CSTCE8M38G52 CSTLS8M38G53 CSTLS8M38G53093 CSTCE10M0G52 CSTLS10M0G53 CSTLS10M0G53093 CSTCE12M0G52 CSTLA12M0T55 CSTLA12M0T55093 CCR3.58MC3 CCR4.19MC3 CCR5.0MC3 CCR8.0MC5 CCR8.38MC5 1.00 1.00 2.00 2.00 3.58 3.58 4.00 4.00 4.19 4.19 4.91 4.91 5.00 5.00 8.00 8.00 8.00 8.38 8.38 8.38 10.00 10.00 10.00 12.00 12.00 12.00 3.58 4.19 5.00 8.00 8.38 Recommended Circuit Constant (pF) chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip On-chip On-chip On-chip On-chip On-chip (pF) chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip chip On-chip On-chip On-chip On-chip On-chip Oscillation Voltage Range MIN. MAX.
Caution oscillator constant oscillation voltage range indicate conditions stable oscillation. Oscillation frequency precision guaranteed. applications requiring oscillation frequency precision, oscillation frequency must adjusted implementation circuit. details please contact directly manufacturer resonator will use.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Characteristics +85°C,
Parameter Output current, high Output current, Symbol pins P03, P25, P36, P47, P67, P33, Total P03, P47, P67, Total Total Total Input voltage, high VIH1 P17, P21, P24, P35, P47, P57, P67, P74, P03, P20, P22, P23, P25, P34, P36, P73, RESET (N-ch open-drain) VIH4 VIH5 XT1, 0.7VDD 0.8VDD 0.8VDD 0.85VDD 0.7VDD 0.8VDD 0.8VDD 0.9VDD Input voltage, VIL1 P17, P21, P24, P35, P47, P57, P67, P74, P03, P20, P22, P23, P25, P34, P36, P73, RESET VIL4 VIL5 XT1, Output voltage, high Output voltage, VOH1 -100 VOL1 P03, P25, P36, P47, P67, VOL2 Conditions MIN. TYP. MAX. 0.3VDD 0.2VDD 0.2VDD 0.15VDD 0.3VDD 0.2VDD 0.1VDD 0.2VDD 0.1VDD Unit
VIH2
VIH3
VIL2
VIL3
Remark Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Characteristics +85°C,
Parameter Input leakage current, high Symbol ILIH1 Conditions P03, P17, P25, P36, P47, P57, P67, P75, RESET XT1, P03, P17, P25, P36, P47, P57, P67, P75, RESET XT1, VOUT MIN. TYP. MAX. Unit
ILIH2 ILIH3 Input leakage current, ILIL1
ILIL2 ILIL3 Output leakage current, high Output leakage current, Software pullup resistor ILOH
ILOL
VOUT
P03, P25, P36, P47, P57, P67,
Remark Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Characteristics +85°C,
Parameter Supply currentNote Symbol IDD1 8.38 crystal oscillation operating mode 5.00 crystal oscillation operation mode ±10%Note ±10%Note Conditions ±10%Note converter stopped converter operating converter stopped converter operating converter stopped converter operating IDD2 8.38 crystal oscillation HALT mode 5.00 crystal oscillation HALT mode ±10%Note ±10%Note ±10%Note Peripheral functions stopped Peripheral functions operating Peripheral functions stopped Peripheral functions operating Peripheral functions stopped Peripheral functions operating IDD3 32.768 crystal oscillation operating modeNote IDD4 32.768 crystal oscillation HALT modeNote IDD5 VDD, STOP mode When feed-back resistor used ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note 0.05 0.05 MIN. TYP. MAX. 10.5 11.5 Unit
Notes Refers total current flowing through internal power supply (VDD0 VDD1). Includes peripheral operating current (however, current flowing through pull-up resistors ports AVREF included). When processor clock control register (PCC) 00H. When 02H. When main system clock stopped.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Characteristics Basic operation +85°C,
Parameter Cycle time (Min. instruction execution time) Symbol Operating main system clock Conditions Operating subsystem clock TI00, TI01 input high-/low-level width tTIH0, tTIL0 TI50, TI51 input frequency TI50, TI51 input high-/low-level width Interrupt request input high-/lowlevel width RESET low-level width tINTH, tINTL tTIH5, tTIL5 fTI5 INTP0 INTP3, tRSL MIN. 0.24 103.9Note 2/fsam 0.1Note 2/fsam 0.2Note 2/fsam 0.5Note TYP. MAX. Unit
Notes Value when using external clock. When using crystal resonator, value becomes (MIN.). Selection fsam fX/4, fX/64 possible using bits (PRM00, PRM01) prescaler mode register (PRM0). However, TI00 valid edge selected count clock, value becomes fsam fX/8.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
(main system clock)
16.0 10.0
Cycle time
Operation guaranteed range
0.24
Supply voltage
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Read/write operation +85°C,
Parameter ASTB high-level width Address setup time Address hold time Input time from address data Symbol tASTH tADS tADH tADD1 tADD2 Output time from address Input time from data tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 Input time from WAIT tRDWT1 tRDWT2 Input time from WAIT WAIT low-level width Write data setup time Write data hold time low-level width Delay time from ASTB Delay time from ASTB Delay time from ASTB external fetch Hold time from address external fetch Write data output time from Write data output time from Hold time from address Delay time from WAIT Delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.8tCY 0.8tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX.
(1/3)
Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Read/write operation +85°C,
Parameter ASTB high-level width Address setup time Address hold time Input time from address data Symbol tASTH tADS tADH tADD1 tADD2 Output time from address Input time from data tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 Input time from WAIT tRDWT1 tRDWT2 Input time from WAIT WAIT low-level width Write data setup time Write data hold time low-level width Delay time from ASTB Delay time from ASTB Delay time from ASTB external fetch Hold time from address external fetch Write data output time from Write data output time from Hold time from address Delay time from WAIT Delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.5tCY 0.5tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 2n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX.
(2/3)
Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Read/write operation +85°C,
Parameter ASTB high-level width Address setup time Address hold time Input time from address data Symbol tASTH tADS tADH tADD1 tADD2 Output time from address Input time from data tRDAD tRDD1 tRDD2 Read data hold time low-level width tRDH tRDL1 tRDL2 Input time from WAIT tRDWT1 tRDWT2 Input time from WAIT WAIT low-level width Write data setup time Write data hold time low-level width Delay time from ASTB Delay time from ASTB Delay time from ASTB external fetch Hold time from address external fetch Write data output time from Write data output time from Hold time from address Delay time from WAIT Delay time from WAIT tRDWD tWRWD tWRADH tWTRD tWTWR 0.8tCY 0.5tCY 0.5tCY 1.2tCY 2.5tCY 2.5tCY tWRWT tWTL tWDS tWDH tWRL1 tASTRD tASTWR tRDAST (0.5 2n)tCY (1.5 2n)tCY 2tCY 0.8tCY 1.2tCY (1.5 2n)tCY (2.5 2n)tCY 2n)tCY Conditions MIN. 0.3tCY 2n)tCY 2n)tCY 2n)tCY 2n)tCY MAX.
(3/3)
Unit
tRDADH
0.8tCY
1.2tCY
Remarks TCY/4 indicates number waits. load capacitance AD7, A15, WAIT, ASTB pins.)
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Serial interface +85°C, 3-wire serial mode (SCK3n. internal clock output)
Parameter SCK3n cycle time Symbol tKCY1 Conditions SCK3n high-/low-level width SI3n setup time SCK3n) tKH1 tKL1 tSIK1 SI3n hold time (from SCK3n) Output delay time from SCK3n SO3n tKSI1 pFNote MIN. 1,600 3,200 tKCY1/2 tKCY1/2 TYP. MAX. Unit
tKSO1
Note
load capacitance SCK3n SO3n output lines.
3-wire serial mode (SCK3n. external clock input)
Parameter SCK3n cycle time Symbol tKCY2 Conditions SCK3n high-/low-level width tKH2 tKL2 SI3n setup time SCK3n) SI3n hold time (from SCK3n) Output delay time from SCK3n SO3n tSIK2 MIN. 1,600 3,200 1,600 TYP. MAX. Unit
tKSI2 pFNote
tKSO2
Note
load capacitance SO3n output line.
Remark µPD78F0034A:
µPD78F0034AY:
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
UART mode (dedicated baud rate generator output)
Parameter Transfer rate Symbol Conditions MIN. TYP. MAX. 131,031 78,125 39,063 Unit
UART mode (external clock input)
Parameter ASCK0 cycle time Symbol tKCY3 Conditions ASCK0 high-/low-level width tKH3, tKL3 Transfer rate MIN. 1,600 3,200 1,600 39,063 19,531 9,766 TYP. MAX. Unit
UART mode (infrared data transfer mode)
Parameter Transfer rate rate allowable error Output pulse width Input pulse width Symbol 4/fX Conditions MIN. MAX. 131,031 ±0.87 0.24/fbrNote Unit
Note
fbr: Specified baud rate
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Mode (µPD78F0034AY only)
Parameter Symbol Standard Mode MIN. SCL0 clock frequency free time (between stop start condition) Hold timeNote SCL0 clock low-level width SCL0 clock high-level width Start/restart condition setup time Data hold time CBUS compatible master Data setup time SDA0 SCL0 signal rise time SDA0 SCL0 signal fall time Stop condition setup time Spike pulse width controlled input filter Capacitive load each line tSU:DAT tSU:STO fCLK tBUF MAX. High-Speed Mode MIN. MAX. Unit
tHD:STA tLOW tHIGH tSU:STA tHD:DAT
0Note
1,000
0Note 100Note 0.1CbNote 0.1CbNote
0.9Note
Notes start condition, first clock pulse generated after this hold time. fill undefined area SCL0 falling edge, necessary device internally provide least hold time SDA0 signal (which VIHmin. SCL0 signal). device does extend SCL0 signal hold time (tLOW), only maximum data hold time tHD:DAT needs fulfilled. high-speed mode available standard mode system. this time, conditions described below must satisfied. device does extend SCL0 signal state hold time tSU:DAT device extends SCL0 signal state hold time sure transmit next data SDA0 line before SCL0 line released (tRmax. tSU:DAT 1,000 1,250 standard mode specification). Total capacitance line (unit:
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Timing Measurement Point (Excluding Input)
0.8VDD 0.2VDD
Point measurement
0.8VDD 0.2VDD
Clock Timing
1/fX
VIH4 (MIN.) VIL4 (MAX.)
input
1/fXT
tXTL input
tXTH VIH5 (MIN.) VIL5 (MAX.)
Timing
tTIL0
tTIH0
TI00, TI01
1/fTI5 tTIL5 tTIH5
TI50, TI51
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Interrupt Request Input Timing
tINTL
tINTH
INTP0 INTP3
RESET Input Timing
tRSL
RESET
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Read/Write Operation External fetch wait):
Higher 8-bit address tADD1
Lower 8-bit address tADS tASTH tADH
Hi-Z tRDAD tRDD1
Instruction code tRDADH tRDAST
ASTB
tASTRD tRDL1 tRDH
External fetch (wait insertion):
Higher 8-bit address tADD1
Lower 8-bit address tADS tASTH tADH tRDAD
Hi-Z tRDD1
Instruction code tRDADH tRDAST
ASTB
tASTRD WAIT tRDWT1 tWTL tWTRD tRDL1 tRDH
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
External data access wait):
tADD2 Lower 8-bit address tADS tASTH ASTB tADH Hi-Z tRDAD tRDD2
Higher 8-bit address
Read data
Write data
Hi-Z
tRDH
tASTRD tASTWR tWRL1 tRDL2 tRDWD tWRWD tWDS tWDH tWRADH
External data access (wait insertion):
tADD2
Lower 8-bit address
Higher 8-bit address Hi-Z tRDAD tRDH tRDD2 tASTRD Hi-Z
Read data
Write data
tADS tADH tASTH ASTB
tRDL2 tASTWR WAIT tRDWT2 tWTL tWTRD
tRDWD tWRWD
tWDS
tWDH
tWRL1
tWRADH
tWTL tWRWT tWTWR
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Serial Transfer Timing 3-wire serial mode:
tKCYm tKLm tKHm
SCK3n tSIKm tKSIm
SI3n tKSOm
Input data
SO3n
Output data
Remarks µPD78F0034A: µPD78F0034AY: UART mode (external clock input):
KCY3
ASCK0
mode (µPD78F0034AY only):
tLOW SCL0 tSU:STA tHD:STA tSU:STO
tHD:DAT tHD:STA
tHIGH tSU:DAT
SDA0 tBUF Stop condition Start condition Restart condition Stop condition
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Converter Characteristics +85°C, AVDD AVREF AVSS
Parameter Resolution Overall errorNote AVREF AVREF AVREF Conversion time tCONV AVREF AVREF AVREF Zero-scale errorNotes AVREF AVREF AVREF Full-scale errorNotes AVREF AVREF AVREF Integral linearity errorNote AVREF AVREF AVREF Differential linearity error AVREF AVREF AVREF Analog input voltage Reference voltage Resistance between AVREF AVSS VIAN AVREF RREF During conversion operation Symbol Conditions MIN. TYP. ±0.2 ±0.3 ±0.6 MAX. ±0.4 ±0.6 ±1.2 ±0.4 ±0.6 ±1.2 ±0.4 ±0.6 ±1.2 ±2.5 ±4.5 ±8.5 ±1.5 ±2.0 ±3.5 AVREF AVDD Unit %FSR %FSR %FSR
%FSR %FSR %FSR %FSR %FSR %FSR
Notes Excluding quantization error (±1/2 LSB). Indicated ratio full-scale value (%FSR). Remark When µPD78F0034A 78F0034AY used 8-bit resolution converter, specifications same µPD780024A 78F0024AY Subseries converter. Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention supply voltage Data retention supply current Release signal time Oscillation stabilization wait time Symbol VDDDR IDDDR tSREL tWAIT Release RESET Release interrupt request Subsystem clock stop (XT1 VDD) feed-back resistor disconnected 217/fX Note Conditions MIN. TYP. MAX. Unit
Note
Selection 212/fX 214/fX 217/fX possible using bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS).
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Data Retention Timing (STOP Mode Release RESET)
Internal reset operation HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution RESET
VDDDR tSREL
tWAIT
Data Retention Timing (Standby Release Signal: STOP Mode Release Interrupt Request Signal)
HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution Standby release signal (Interrupt request)
VDDDR tSREL
tWAIT
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Flash Memory Programming Characteristics (VDD 10.3 Basic characteristics
Parameter Operating frequency Symbol Conditions Supply voltage VPPL VPPH supply current supply current Write time (per byte) Number rewrites Erase time Programming temperature TWRT CWRT TERASE TPRG =10.0 Operation voltage when writing Upon low-level detection Upon high-level detection Upon high-voltage detection MIN. 0.8VDD 9.7Note 10.0Note TYP. MAX. 8.38 0.2VDD 1.2VDD 10.3Note 20Note Unit
Times
Notes product grades 10.2 (MIN.), 10.3 (TYP.), 10.4 (MAX.), applied. product specification number (MAX.). Serial write operation characteristics
Parameter time time from time from RESET count start time from RESET Count execution time counter high-level width counter low-level width counter noise elimination width Symbol tPSRON tDRPSR tPSRRF tRFCF tCOUNT tNFW Conditions high voltage high voltage high voltage MIN. TYP. MAX. Unit
Flash Memory Write Mode Timing
VPPH VPPL tPSRON tPSRRF tCOUNT RESET (input) tDRPSR tRFCF
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
PACKAGE DRAWINGS
64-PIN PLASTIC SDIP (19.05mm(750))
NOTES
Each lead centerline located within 0.17 true position (T.P.) maximum material condition. Item center leads when formed parallel.
ITEM
MILLIMETERS 58.0 +0.68 -0.20 1.78 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.05 +0.26 -0.20 5.08 MAX. 19.05 (T.P.) 17.0±0.2 0.25 +0.10 -0.05 0.17 P64C-70-750A,C-4
Remark package material products same mass produced products.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
64-PIN PLASTIC LQFP (10x10)
detail lead
ITEM
MILLIMETERS 12.0±0.2 10.0±0.2 10.0±0.2 12.0±0.2 1.25 1.25 0.22±0.05 0.08 (T.P.) 1.0±0.2 0.17 +0.03 -0.07 0.08 0.1±0.05 1.5±0.10 0.25 0.6±0.15 S64GB-50-8EU-2
NOTE
Each lead centerline located within 0.08 true position (T.P.) maximum material condition.
Remark package material products same mass produced products.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
64-PIN PLASTIC LQFP (14x14)
detail lead
ITEM
MILLIMETERS 17.2±0.2 14.0±0.2 14.0±0.2 17.2±0.2 0.37 +0.08 -0.07 0.20 (T.P.) 1.6±0.2 0.17 +0.03 -0.06 0.10 1.4±0.1 0.127±0.075 MAX. 0.25 0.886±0.15 P64GC-80-8BS
NOTE Each lead centerline located within 0.20 true position (T.P.) maximum material condition.
Remark package material products same mass produced products.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
64-PIN PLASTIC (14x14)
detail lead
NOTE Each lead centerline located within 0.15 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 17.6±0.4 14.0±0.2 14.0±0.2 17.6±0.4 0.37 +0.08 -0.07 0.15 (T.P.) 1.8±0.2 0.8±0.2 0.17 +0.08 -0.07 0.10 2.55±0.1 0.1±0.1 5°±5° 2.85 MAX. P64GC-80-AB8-5
Remark package material products same mass produced products.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
64-PIN PLASTIC TQFP (12x12)
detail lead
ITEM MILLIMETERS 14.0±0.2 12.0±0.2 12.0±0.2 14.0±0.2 1.125 1.125 0.32 +0.06 -0.10 0.13 0.65 (T.P.) 1.0±0.2 0.17 +0.03 -0.07 0.10 0.1±0.05 1.1±0.1 0.25 0.6±0.15 P64GK-65-9ET-3
NOTE Each lead centerline located within 0.13 true position (T.P.) maximum material condition.
Remark package material products same mass produced products.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
RECOMMENDED SOLDERING CONDITIONS
µPD78F0034A, 78F0034AY should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact your sales representative. Table 9-1. Surface Mounting Type Soldering Conditions (1/2) µPD78F0034AGC-8BS: 64-pin plastic LQFP
µPD78F0034AYGC-8BS: 64-pin plastic LQFP µPD78F0034AGC-AB8: 64-pin plastic µPD78F0034AYGC-AB8: 64-pin plastic
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-00-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: times less Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: times less
VP15-00-2
Wave soldering
Solder bath temperature: 260°C max., Time: seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature) temperature: 300°C max., Time: seconds max. (per row)
WS60-00-1
Partial heating
Caution different soldering methods together (except partial heating). µPD78F0034AGB-8EU: 64-pin plastic LQFP
µPD78F0034AYGB-8EU: 64-pin plastic LQFP
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-107-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours) Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours) temperature: 300°C max., Time: seconds max. (per row)
VP15-107-2
Partial heating
Note
After opening pack, store 25°C less less allowable storage period.
Caution different soldering methods together (except partial heating).
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Table 9-1. Surface Mounting Type Soldering Conditions (2/2) µPD78F0034AGK-9ET: 64-pin plastic TQFP
µPD78F0034AYGK-9ET: 64-pin plastic TQFP
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-107-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours) Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: times less, Exposure limit: daysNote (after days, prebake 125°C hours) Solder bath temperature: 260°C max., Time: seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature), Exposure limit: daysNote (after days, prebake 125°C hours) temperature: 300°C max., Time: seconds max. (per row)
VP15-107-2
Wave soldering
WS60-107-1
Partial heating
Note
After opening pack, store 25°C less less allowable storage period.
Caution different soldering methods together (except partial heating). Table 9-2. Insertion Type Soldering Conditions
µPD78F0034ACW: 64-pin plastic SDIP (19.05 (750)) µPD78F0034AYCW: 64-pin plastic SDIP (19.05 (750))
Soldering Method Wave soldering (pin only) Partial heating Soldering Conditions Solder bath temperature: 260°C max., Time: seconds max. temperature: 300°C max., Time: seconds max. (per row)
Caution Apply wave soldering only pins careful bring solder into direct contact with package.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD78F0034A, 78F0034AY Subseries. Also refer Cautions Using Development Tools. Language Processing Software
RA78K0 CC78K0 DF780034 CC78K0-L Assembler package common 78K/0 Series compiler package common 78K/0 Series Device file µPD780034A, 78F0034AY Subseries compiler library source file common 78K/0 Series
Flash Memory Writing Tools
Flashpro (part FL-PR3, PG-FP3) FA-64CW, FA-64GC, FA-64GC-8BS, FA-64GB-8EU, FA-64GK-9ET Flash programmer dedicated microcontrollers with on-chip flash memory
Adapter flash memory writing
Debugging Tools When IE-78K0-NS in-circuit emulator used
IE-78K0-NS IE-70000-MC-PS-B IE-78K0-NS-PA IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Power supply unit IE-78K0-NS Performance board that enhances expands IE-78K0-NS functions Adapter required when using PC-9800 series (except notebook type) host machine supported) card interface cable when using PC-9800 series notebook host machine (PCMCIA socket supported) Adapter required when using PC/ATor compatible host machine (ISA supported) Adapter necessary when using which incorporated host machine Emulation board emulate µPD780034A, 78F0034AY Subseries Emulation probe 64-pin plastic SDIP type) Emulation probe 64-pin plastic (CG-AB8, GC-8BS type) Emulation probe 64-pin plastic TQFP (GK-9ET type) Emulation probe 64-pin plastic LQFP (GB-8EU type) Conversion socket connect NP-64GC target system board which 64-pin plastic (GC-AB8, GC-8BS type) mounted Conversion adapter connect NP-64GC-TQ target system board which 64-pin plastic (GC-AB8, GC-8BS type) mounted Conversion adapter connect NP-64GK target system board which 64-pin plastic TQFP (GK-9ET type) mounted Conversion adapter connect NP-H64GB-TQ target system board which 64-pin plastic LQFP (GB-8EU type) mounted Integrated debugger IE-78K0-NS System simulator common 78K/0 Series Device file µPD780034A, 78F0034AY Subseries
Data Sheet U14040EJ4V0DS
IE-70000-CD-IF-A
IE-70000-PC-IF-C IE-70000-PCI-IF-A IE-780034-NS-EM1 NP-64CW NP-64GC, NP-64GC-TQ NP-64GK NP-H64GB-TQ EV-9200GC-64
TGC-064SAP
TGK-064SBP
TGB-064SDP
ID78K0-NS SM78K0 DF780034
µPD78F0034A, 78F0034AY
When using in-circuit emulator IE-78001-R-A
IE-78001-R-A IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Adapter required when using PC-9800 series host machine (excluding notebook PCs) supported) Adapter required when using PC/AT compatible host machine (ISA supported) Adapter required when using which incorporated host machine Emulation board emulate µPD780034A, 78F0034AY Subseries Emulation probe conversion board IE-780034-NS-EM1 IE-78001-R-A Emulation probe 64-pin plastic SDIP type) Emulation probe 64-pin plastic (GC-AB8, GC-8BS type) Emulation probe 64-pin plastic TQFP (GK-9ET type) Conversion socket connect EP-78240GC-R target system board which 64-pin plastic (GC-AB8, GC-8BS type) mounted Conversion adapter connect EP-78012GK-R target system board which 64-pin plastic TQFP (GK-9ET type) mounted Integrated debugger IE-78001-R-A System simulator common 78K/0 Series Device file µPD780034A, 78F0034AY Subseries
IE-70000-PC-IF-C IE-70000-PCI-IF-A IE-780034-NS-EM1 IE-78K0-R-EX1 EP-78240CW-R EP-78240GC-R EP-78012GK-R EV-9200GC-64
TGK-064SBP
ID78K0 SM78K0 DF780034
Real-Time
RX78K0 Real-time 78K/0 Series
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Cautions Using Development Tools ID-78K0-NS, ID78K0, SM78K0 used combination with DF780034. CC78K0 RX78K0 used combination with RA78K0 DF780034. FL-PR3, FA-64CW, FA-64GC, FA-64GC-8BS, FA-64GB-8EU, FA-64GK-9ET, NP-64CW, NP-64GC, NP64GC-TQ, NP-64GK, NP-H64GB-TQ products made Naito Densei Machida Mfg. Co., Ltd. (+81-45475-4191). TGK-064SBW, TGC-064SAP, TGK-064-SBP, TGB-064SDP products made TOKYO ELETECH CORPORATION. further information contact Daimaru Kogyo, Ltd. Tokyo Electronic Division (+81-3-3820-7112) Osaka Electronic Division (+81-6-6244-6672) third party development tools, Single-Chip Microcontroller Selection Guide (U11069E). host machines supporting each software follows.
Host Machine [OS] Software RA78K0 CC78K0 ID78K0-NS ID78K0 SM78K0 RX78K0 PC-9800 series [Japanese PC/AT compatibles [Japanese/English Windows] Note Note Note WindowsTM] HP9000 series 700[HP-UXTM] SPARCstation[SunOSTM, SolarisTM]
Note
DOS-based software
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Conversion Socket Drawing (EV-9200GC-64) Footprints Figure A-1. EV-9200GC-64 Drawing (For Reference Only)
EV-9200GC-64-G0 INCHES 0.74 0.555 0.555 0.74 0.118 0.031 0.236 0.622 0.728 0.236 0.622 0.728 0.315 0.307 0.098 0.079 0.053 0.014 +0.004 -0.005
EV-9200GC-64
No.1 index
ITEM MILLIMETERS 18.8 14.1 14.1 18.8 15.8 18.5 15.8 18.5 1.35 0.35
0.091 0.059
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Figure A-2. EV-9200GC-64 Footprints (For Reference Only)
EV-9200GC-64-P1E ITEM Caution MILLIMETERS 19.5 14.8 INCHES 0.768 0.583
0.8±0.02 15=12.0±0.05 0.031+0.002 0.591=0.472 +0.003 -0.001 -0.002 0.8±0.02 15=12.0±0.05 0.031+0.002 0.591=0.472 +0.003 -0.001 -0.002 14.8 19.5 6.00 0.08 6.00 0.08 0.02 0.583 0.768 0.236 +0.004 -0.003 0.236 +0.004 -0.003 0.197 +0.001 -0.002
2.36 0.03 1.57 0.03
0.093 +0.001 -0.002 0.087 +0.004 -0.005 0.062 +0.001 -0.002
(QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E).
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Conversion Adapter Drawing (TGC-064SAP) Figure A-3. TGC-064SAP Drawing (For Reference Only)
Protrusion height
ITEM MILLIMETERS 14.12 0.8x15=12.0 20.65 10.0 12.4 14.8 17.2 9.05 13.35 1.325 1.325 16.0 20.65 12.5 17.5 3.55 INCHES 0.556 0.031x0.591=0.472 0.031 0.813 0.394 0.488 0.583 0.677 0.079 0.356 0.197 0.526 0.052 0.052 0.630 0.813 0.492 0.689 0.051 0.071 ITEM
MILLIMETERS 1.85 0.25 13.6
INCHES 0.073 0.138 0.079 0.236 0.010 0.535 0.047 0.047 0.094 0.106
TGC-064SAP-G0E
(19.65) 7.35
0.140 0.035 0.012
(0.667) 0.289 0.047
note: Product TOKYO ELETECH CORPORATION.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Conversion Adapter Drawing (TGK-064SBP) Figure A-4. TGK-064SBP Drawing (For Reference Only) (Unit:
Protrusion height
ITEM
MILLIMETERS 18.4 0.65x15=9.75 0.65 7.75 10.15 12.55 14.95 0.65x15=9.75 11.85 18.4 12.45 10.25 10.02 14.92 18.4 11.1 1.45 1.45
INCHES 0.724 0.026x0.591=0.384 0.026 0.305 0.400 0.494 0.589 0.026x0.591=0.384 0.467 0.724 0.079 0.490 0.404 0.303 0.394 0.587 0.724 0.437 0.057 0.057 0.197 0.051 0.071
ITEM
MILLIMETERS
INCHES
(16.95) 7.35 1.85 0.25 1.325 1.325
0.035 0.012
(0.667) 0.289 0.047 0.073 0.138 0.079 0.236 0.010 0.052 0.052 0.094 0.106 TGK-064SBP-G0E
0.209
0.039
3.55
0.140
Note: Product TOKYO ELETECH CORPORATION.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
APPENDIX RELATED DOCUMENTS
related documents indicated this publication include preliminary versions. However, preliminary versions marked such. Documents Related Devices
Document Name Document U14046E U14042E U15131E
µPD780024A, 780034A, 780024AY, 780034AY Subseries User's Manual µPD780021A, 780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY, 780024AY Data Sheet µPD780021A(A), 780022A(A), 780023A(A), 780024A(A), 780021AY(A), 780022AY(A), 780023AY(A),
780024AY(A) Data Sheet
µPD780031A, 780032A, 780033A, 780034A, 780031AY, 780032AY, 780033AY, 780034AY Data Sheet µPD780031A(A), 780032A(A), 780033A(A), 780034A(A), 780031AY(A), 780032AY(A), 780033AY(A),
780034AY(A) Data Sheet
U14044E U15132E
µPD78F0034A, 78F0034AY Data Sheet
78K/0 Series User's Manual Instruction
This manual U12326E
Documents Related Development Software Tools (User's Manuals)
Document Name RA78K0 Assembler Package Operation Language Structured Assembly Language CC78K0 Compiler Operation Language SM78K0S, SM78K0 System Simulator Ver. 2.10 Later SM78K Series System Simulator Ver. 2.10 Later Operation (Windows Based) External Part User Open Interface Specifications ID78K0-NS Integrated Debugger Ver. 2.00 Later ID78K0 Integrated Debugger Windows Based Operation (Windows Based) Reference Guide RX78K0 Real-Time Fundamentals Installation Project Manager Ver. 3.12 Later (Windows Based) U14379E U11539E U11649E U11537E U11536E U14610E Document U14445E U14446E U11789E U14297E U14298E U14611E U15006E
Documents Related Development Hardware Tools (User's Manuals)
Document Name IE-78K0-NS In-Circuit Emulator IE-78K0-NS-A In-Circuit Emulator IE-78001-R-A In-Circuit Emulator IE-78K0-R-EX1 In-Circuit Emulator Document U13731E U14889E U14142E prepared
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Documents Related Flash Memory Writing
Document Name PG-FP3 Flash Memory Programmer User's Manual Document U13502E
Other Related Documents
Document Name SEMICONDUCTORS SELECTION GUIDE Products Packages Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Document X13769E C10535E C11531E C10983E C11892E
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
[MEMO]
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
Note: Purchase components conveys license under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
IEBus trademarks Corporation. Windows either registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc.
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (France) S.A.
France Tel: 01-3067-58-00 Fax: 01-3067-58-99
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics (France) S.A.
Madrid, Spain Tel: 091-504-27-87 Fax: 091-504-28-60
Electronics Hong Kong Ltd.
Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Brasil S.A.
Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829
Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290
Electronics Shanghai, Ltd.
Shanghai, P.R. China Tel: 021-6841-1138 Fax: 021-6841-1137
Electronics (Europe) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Branch Netherlands
Electronics Taiwan Ltd.
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Eindhoven, Netherlands Tel: 040-244 Fax: 040-244
Branch Sweden
Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
Taeby, Sweden Tel: 08-63 Fax: 08-63
Filiale Italiana
Milano, Italy Tel: 02-667541 Fax: 02-66754299
J02.3-1
Data Sheet U14040EJ4V0DS
µPD78F0034A, 78F0034AY
information this document current February, 2002. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).
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