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Using a Personal Computer to Program the AT89C51 / C52 / LV51 / LV52 / C1051 / C2051

8-Bit Microcontroller with Flash Application Note

Using a Personal Computer to Program the AT89C51 / C52 / LV51 / LV52 / C1051 / C2051
Introduction
8-Bit Microcontroller with Flash Application Note
Software
Software for the programmer is available by downloading it from the Atmel BBS at 408-436-4309. The programmer is controlled by software running on the host. The AT89C51 / C52 and C1051 / C2051 have dedicated control programs, which were written in Microsoft C. Programs dedicated to the AT89LV51 / LV52 do not exist these devices are supported by the programs for the AT89C51 / C52, respectively. In the text below, all references to the AT89C51 / C52 may be assumed to apply to the AT89LV51 / LV52 as well. All programmer control programs are invoked from the DOS command line by entering the program name followed by "LPT1" or "LPT2" to specify parallel port
0285D-B-12 / 97
Verify against File Compare the contents of code memory against the contents of the specified file. The user is prompted for the file name, which may require path and extension. The file is expected to contain binary data hex files are not accepted. The first byte in the file is compared to the first location in the device. Successive bytes are compared to successive locations until the last location in the device has been compared or until the data in the file has been exhausted. Locations which fail to compare are displayed by address, with the expected and actual byte contents. If there are no compare failures, nothing is displayed. Save to File Copy the contents of device memory to the specified file. The user is prompted for the file name, which may require path and extension. The number of bytes in the resulting file is the same as the number of memory locations in the device. Blank Check Verify that the contents of device memory are all ones. Only pass or fail is reported the addresses and contents of failing locations are not displayed. Read Signature Read and display the contents of the signature bytes. The number of signature bytes and their expected contents varies between devices. Refer to the device data sheet for additional information. Write Lock Bit 1 Write Lock Bit 2 Write Lock Bit 3 Set the indicated lock bit. Note that the AT89C1051 / C2051 contain only two lock bits, while the AT89C51 / LV51 and AT89C52 / LV52 contain three lock bits. The state of the lock bits cannot be verified by direct observation. Exit Quit the programmer control program.
invoked and restored to its original state before the program terminates. In order to guarantee that the program is not exited before the timer configuration is restored, the CTRL-C and CTRL-BREAK keys are disabled. This means that the program cannot be aborted except by specifying the exit option at the main menu or by rebooting the system. The timer control code is provided as an 8086 assembly language module, which is linked with the compiled control program. The granularity of the timer is 0.838 microseconds, but the minimum practical delay is system- and software-dependent. The timer code ensures that the delay produced will not be of shorter duration than requested. The control programs provided for the AT89C1051 / C2051 are system independent.
Programmer
The programmer circuitry (see Figures 1 and 2) consists of the host interface and switchable power supplies. The signal sequencing and timing required for programming is generated by the host under software control. A 40-pin ZIF socket is provided for programming the AT89C51 / C52 the 20-pin ZIF socket accommodates the AT89C1051 / C2051. Note that the power and ground connections and bypass capacitors required by the TTL devices are not shown on the schematic. Power for the programmer circuitry and the AT89C51 / C52 / C1051 / C2051 is provided by a fixed five volt supply. A second supply provides either five or twelve volts, selectable, for use during programming. The addition of a transistor to the output of the variable supply provides a third level, ground, for use when programming the AT89C1051 / C2051. The resistor values utilized in the variable power supply circuit were determined using the equations presented in the LM317 voltage regulator data sheet. Power supply ramp rates are accommodated by the host software. For 5 VVPP programming, the devices must be ordered from the factory as an AT89CX-XX-5 (not available with the AT89C1051 / 2051). The programmer is connected to the host with a 25-conductor ribbon cable. To minimize the effect on signal integrity, the length of the cable should be as short as possible, preferably not exceeding three feet.
System Dependency
The control programs for the AT89C51 and AT89C52 come in two flavors: host system-dependent and host systemindependent. System-dependency results from the use of software timing loops to enforce required delays, the duration of which will vary between host systems running at different speeds. The code provided was tested on an 80386based system running at 33 MHz, and may require modification for use on other systems. This method was chosen for its simplicity. Host system-independence is achieved by using the Programmable Interval Timer embedded in the system hardware to enforce time delays independent of system speed. The timer is reconfigured when the control program is
Parallel Interface
The original parallel interface provided by IBM was probably not intended to support bidirectional data transfers. However, due to the way in which the interface was implemented, bidirectional transfers are possible. Over the years, many products have appeared which exploit this capability. Unfortunately, many system and interface card manufacturers have not faithfully cloned the IBM design, resulting in bus contention when the peripheral attempts to drive return
Microcontroller
Figure 1. AT89 Series Programmer Interface
Note:
0.1 µF bypass caps on all ICs
Microcontroller
Figure 2. Power Supply for AT89 Series Programmer
Figure 3. AT89 Series Programmer Socket Wiring
Microcontroller
A28 A27 A26 A25
74LS04
DWR CWR
74LS04
Y0 12 Y1 11 Y2 10 Y3 9 74LS139
Figure 4. A Parallel Interface Supporting Bidirectional Operation
74LS04
IORD IOWR
B14 B13
Note: 0.1-µF bypass caps on all ICs.
Microcontroller
Figure 5.
Microcontroller
G1 1 G2 19 74LS541 DWR DRD
Note: 0.1-µF bypass caps on all ICs.