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GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER output, skew cloc
Top Searches for this datasheetQS5820T GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER output, skew clock signal buffer High drive FCT-type outputs Reduced swing outputs noise Input hysteresis better noise margin Monitor output Guaranteed skew 0.5ns output skew 0.7ns pulse skew part-to-part skew Available 40-pin QVSOP QS5820T DESCRIPTION: QS5820T clock driver/buffer circuits used clock distribution schemes where skew, high speed, small footprint primary concerns. QS5820T offers four banks five non-inverting outputs. Designed IDT's proprietary QCMOS process, this device provides propagation delay buffering with on-chip skew 0.5ns same-transition, same-bank signals. QS5820T provides major skew advantages over octal type devices where total part-to-part skew (tSK(t)) >1ns unacceptable. Furthermore, board area consumed QVSOP package almost one-third that typical SOIC package offered octal devices. This clock buffer product designed high performance workstation, multi-board computing telecommunications systems. QS5820T available 40-pin QVSOP package which offers world's smallest logic footprint. FUNCTIONAL BLOCK DIAGRAM MONB 2000 Integrated Device Technology, Inc. DECEMBER 2000 DSC-5822/- QS5820T GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER CONFIGURATION 40-1 ABSOLUTE MAXIMUM RATINGS Symbol VTERM(2) VTERM(3) VTERM(3) IOUT PMAX TSTG Rating Supply Voltage Ground Switch Voltage Input Voltage Input Voltage (pulse width 20ns) Input Diode Current with Output Current Sink Current/Pin Maximum Power Dissipation Storage Temperature Range Max. -0.5 -0.5 -0.5 Unit +150 NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. Terminals. terminals except VDD. CAPACITANCE 1MHz, VOUT Pins Pins Typ. Max. Unit NOTE: Capacitance characterized tested. DESCRIPTION Name OEA, OEB, OEC, INA, INB, INC, OAn, OBn, OCn, MONB, MOND Type Description Output Enable Inputs Clock Inputs Clock Outputs Non-disable Monitor Outputs QVSOP VIEW RECOMMENDED OPERATING CONDITIONS Symbol VOUT Description Power Supply Voltage Input Voltage Voltage Applied Outputs Ambient Operating Temperature Min. 4.75 Max. 5.25 Unit QS5820T GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage Output HIGH Voltage Output Voltage Input Leakage Current Output Leakage Current Short Circuit Current (2,3) Conditions Guaranteed Logic HIGH Inputs Guaranteed Logic Inputs Min., -18mA Min., -24mA Min., 64mA Max., Max., Outputs High-Z Max., VOUT Min. Typ. Max. 0.55 Unit NOTES: Typical values 5.0V, 25°C. more than output should used test this high power condition. Duration second. Guaranteed design tested. POWER SUPPLY CHARACTERISTICS Symbol ICCD Parameter Quiescent Power Supply Current Supply Current Input HIGH Dynamic Power Supply Current Output Test Conditions Max., Max., 3.4V, 0MHz Max., Outputs Enabled, duty cycle Typ. Max. Unit mA/MHz NOTES: conditions shown Min. Max., appropriate values specified under specifications. Guaranteed tested. Typical values reference only. Conditions 5.0V 25°C. (ICC)(DH)(NT) ICCD (fO)(NO) where: Input duty cycle Number HIGH inputs Output frequency Number outputs QS5820T GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER SKEW CHARACTERISTICS OVER OPERATING RANGE QS5820AT Symbol tSK(01) tSK(02) tSK(p) tSK(t) Description Skew between outputs, same transition, same bank Skew between outputs, same transition, different bank Duty cycle distortion (pulse skew) single output opposite transitions tPLH) Part-to-part skew, same transition Min. Max. QS5820BT Min. Max. Unit NOTES: Skew parameters guaranteed across temperature range, production tested. Skew parameters apply propagation delays only. tSK(t) only applies devices same transition, same VDD, same temperature, same speed grade, same loading. SWITCHING CHARACTERISTICS OVER OPERATING RANGE CLOAD 50pF, RLOAD unless otherwise noted. QS5820AT Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ Description Propagation Delay (1,2) Output Rise Time, 0.8V Output Fall Time, 0.8V Output Enable Time Output Disable Time Min. Max. Min. QS5820BT Max. Unit NOTES: Minimums guaranteed tested. propagation delay range indicated Min. Max. specifications results from process environmental variables. These propagation delay limits imply skew. QS5820T GUARANTEED SKEW CMOS OUTPUT CLOCK DRIVER/BUFFER ORDERING INFORMATION Package Device Type Quarter Size Very Outline Package (SO40-1) 5820AT 5820BT Guaranteed Skew Output Clock Driver/Buffer CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054 SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com* search sales office near you, please click sales button found home page dial 800# above press logo registered trademark Integrated Device Technology, Inc. Turboclock registered trademark Integrated Device Technology, Inc. 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