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GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER outputs Rail-to-rail out
Top Searches for this datasheetQS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER outputs Rail-to-rail output voltage swing Input hysteresis better noise margin Guaranteed skew: 0.3ns output skew (same bank) 0.6ns output skew (different bank) part-to-part skew Std. speed grades Available QSOP packages QS5807/A DESCRIPTION: QS5807 clock driver/buffer circuits used clock buffering schemes where skew parameter. QS5807 offers non-inverting outputs. Designed IDT's proprietary QCMOS process, these devices provide propagation delay buffering with on-chip skew 0.3ns same-transition signals. QS5807 characterized operation -40°C +85°C. FUNCTIONAL BLOCK DIAGRAM 2001 Integrated Device Technology, Inc. JANUARY 2001 DSC-5231/2 QS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER CONFIGURATION 20-8 ABSOLUTE MAXIMUM RATINGS Symbol VTERM(2) VTERM(3) IOUT TSTG Description Supply Voltage Ground Output Voltage VOUT Input Voltage Input Voltage (pulse width 20ns) Output Current Output Current Max. Sink Current/Pin Storage Temperature Junction Temperature Unit Max. +150 +150 QSOP/ SOIC VIEW NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. Terminals. terminals except Vcc. CAPACITANCE Pins +25OC, 1.0MHz, Max. Unit Typ. NOTE: This parameter guaranteed production tested. DESCRIPTION Names Description Clock Input Clock Outputs QS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: -40°C +85°C, 5.0V 10%, 0.2V, 0.2V Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage Output HIGH Voltage Test Conditions Guaranteed Logic HIGH Inputs Guaranteed Logic Inputs Min., -18mA Min., VIL, -300µA Min., VIL, -15mA Min., VIL, -24mA IOFF Output Voltage Input Leakage Current Input Power Leakage Short Circuit Current Input Hysteresis (2,3) Min. Typ.(1) -0.7 Max. -1.2 0.55 Unit Min., VIL, 300µA Min., VIL, 64mA Max., Max., VOUT VTLH VTHL Inputs NOTES: Typical values 5.0V, 25°C. more than output should used test this high power condition. Duration less than second. Guaranteed design tested. POWER SUPPLY CHARACTERISTICS Symbol ICCD Parameter Quiescent Power Supply Current Supply Current Input HIGH Dynamic Power Supply Current Output Total Power Supply Current Examples Test Conditions Max., Max., 3.4V Input toggling duty cycle Max., outputs Enabled Max., Input duty cycle 10MHz Max., Input duty cycle 2.5MHz NOTES: Guaranteed design tested. 0pF. (ICC)(DH)(NT) ICCD (fO)(NO) where: Input Duty Cycle Number HIGH inputs Output Frequency Number outputs Typ. 0.005 0.12 Max. Unit mA/MHz QS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER SWITCHING CHARACTERISTICS OVER OPERATING RANGE -40°C +85°C, 5.0V CLOAD 50pF, RLOAD unless otherwise noted. QS5807 Symbol tSK(01) tSK(P) tSK(T) tPLH tPHL Parameter Skew between outputs, same transition Pulse Skew; skew between opposite transitions same output (tPHL tPLH) Part-to-part skew Propagation Delay Output Rise Time, 0.8V Output Fall Time, 0.2Vcc 0.8Vcc QS5807A Min. Max. 0.35 Unit Min. Max. NOTES: Skew parameters guaranteed across temperature range, tested. Skew parameters measured 0.5Vcc. tSK(T) only applies devices same transition, part type, temperature, power supply voltage, loading, package, speed grade. propagation delay range indicated Min. Max. specifications results from process environmental variables. These propagation delays imply limit skew. QS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER TEST CIRCUITS WAVEFORMS Pulse Generator 50pF Pulse generator puls 1.0M 2.5ns; 2.5ns PROPAGATION DELAY PULSE SKEW tSK(P) INPUT 1.5V INPU 1.5V 0.5V OUTPUT 2.0V 0.5V OUTPUT 0.8V tSK(p) PLHL OUTPUT SKEW tSK(O1) PART-TO-PART SKEW tSK(T) INPUT 1.5V INPU 1.5V PART UTPUT 0.5V OUTPUT 0.5V SK(O tSK(t) tSK(t) 0.5V 0.5V PART UTPUT OUTPUT SK(01) PLH2 PLH1 PHL1 SK(p) PLH2 PLH1 PHL2 PHL1 QS5807/A GUARANTEED SKEW CMOS CLOCK DRIVER/BUFFER ORDERING INFORMATION XXXX Device Type Package Quarter-size Outline Package (SO20-8) 5807 5807A Guaranteed Skew Clock Driver/Buffer CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054 SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com* search sales office near you, please click sales button found home page dial 800# above press logo, QuickSwitch, SynchroSwitch registered trademarks Integrated Device Technology, Inc. Other recent searchesSCC2692 - SCC2692 SCC2692 Datasheet HCS410 - HCS410 HCS410 Datasheet FDV304P - FDV304P FDV304P Datasheet EZC35DREH - EZC35DREH EZC35DREH Datasheet B15A60VIC - B15A60VIC B15A60VIC Datasheet 1604870000 - 1604870000 1604870000 Datasheet
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