Triacs logic level Passivated, sensitive gate triacs plastic enve

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Triacs logic level Passivated, sensitive gate triacs plastic enve

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Triacs logic level
Passivated, sensitive gate triacs plastic envelope suitable surface mounting, intended general purpose bidirectional switching phase control applications. These devices intended interfaced directly microcontrollers, logic integrated circuits other power gate trigger circuits.
BT136S series
QUICK REFERENCE DATA
SYMBOL VDRM IT(RMS) ITSM PARAMETER BT136S Repetitive peak off-state voltages on-state current Non-repetitive peak on-state current MAX. 600D UNIT
PINNING SOT428
DESCRIPTION gate
CONFIGURATION
SYMBOL
LIMITING VALUES
Limiting values accordance with Absolute Maximum System (IEC 134). SYMBOL VDRM IT(RMS) ITSM PARAMETER Repetitive peak off-state voltages on-state current Non-repetitive peak on-state current fusing Repetitive rate rise on-state current after triggering full sine wave; full sine wave; prior surge 16.7 dIG/dt A/µs GT2- GT2- CONDITIONS MIN. MAX. -600 UNIT A/µs A/µs A/µs A/µs
dIT/dt
PG(AV) Tstg
Peak gate current Peak gate voltage Peak gate power Average gate power Storage temperature Operating junction temperature
over period
June 2001
1.300
Triacs logic level
THERMAL RESISTANCES
SYMBOL j-mb PARAMETER CONDITIONS MIN.
BT136S series
TYP.
MAX.
UNIT
Thermal resistance full cycle junction mounting base half cycle Thermal resistance (FR4) mounted; footprint Fig.14 junction ambient
STATIC CHARACTERISTICS
unless otherwise stated SYMBOL PARAMETER Gate trigger current CONDITIONS GT2- GT2- GT2- GT2- MIN. 0.25 TYP. MAX. 1.70 UNIT
Latching current
Holding current On-state voltage Gate trigger voltage Off-state leakage current
VDRM(max);
DYNAMIC CHARACTERISTICS
unless otherwise stated SYMBOL dVD/dt PARAMETER Critical rate rise off-state voltage Gate controlled turn-on time CONDITIONS VDRM(max); exponential waveform; VDRM(max); dIG/dt A/µs MIN. TYP. MAX. UNIT V/µs
June 2001
1.300
Triacs logic level
BT136S series
Ptot
Tmb(max)
IT(RMS)
IT(RMS)
Fig.1. Maximum on-state dissipation, Ptot, versus on-state current, IT(RMS), where conduction angle.
Fig.4. Maximum permissible current IT(RMS) versus mounting base temperature Tmb.
IT(RMS)
1000
ITSM ITSM
time
initial limit
quadrant
10us
100us
10ms
100ms
0.01
surge duration
Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width sinusoidal currents, 20ms.
Fig.5. Maximum permissible repetitive on-state current IT(RMS), versus surge duration, sinusoidal currents, 107°C.
VGT(Tj) VGT(25
ITSM
BT136
time
initial
Number cycles 50Hz
1000
Fig.3. Maximum permissible non-repetitive peak on-state current ITSM, versus number cycles, sinusoidal currents,
Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25°C), versus junction temperature
June 2001
1.300
Triacs logic level
BT136S series
IGT(Tj) IGT(25 GT2- GT2-
1.27 0.091 ohms
Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25°C), versus junction temperature
IL(Tj) IL(25
Fig.10. Typical maximum on-state characteristic.
j-mb (K/W) unidirectional bidirectional
0.01 10us 0.1ms 10ms 0.1s
Fig.8. Normalised latching current IL(Tj)/ IL(25°C), versus junction temperature
IH(Tj) IH(25C)
Fig.11. Transient thermal impedance j-mb, versus pulse width
dVD/dt (V/us)
1000
Fig.9. Normalised holding current IH(Tj)/ IH(25°C), versus junction temperature
Fig.12. Typical, critical rate rise off-state voltage, dVD/dt versus junction temperature
June 2001
1.300
Triacs logic level
MECHANICAL DATA
Dimensions Mass:
6.73 2.38 0.93 seating plane
BT136S series
6.22 10.4
2.285 (x2)
(x2)
Fig.13. SOT428 centre connected tab.
MOUNTING INSTRUCTIONS
Dimensions
2.15
4.57
Fig.14. SOT428 minimum sizes surface mounting. Notes Plastic meets UL94 1/8".
June 2001
1.300
Triacs logic level
BT136S series
DEFINITIONS
DATA SHEET STATUS DATA SHEET STATUS1 Objective data PRODUCT STATUS2 Development DEFINITIONS This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, ordere improve design supply best possible product This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Changes will communicated according Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A
Preliminary data
Qualification
Product data
Production
Limiting values Limiting values given accordance with Absolute Maximum Rating System (IEC 134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections this specification implied. Exposure limiting values extended periods affect device reliability. Application information Where application information given, advisory does form part specification. Philips Electronics N.V. 2001 rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent other industrial intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products designed life support appliances, devices systems where malfunction these products reasonably expected result personal injury. Philips customers using selling these products such applications their risk agree fully indemnify Philips damages resulting from such improper sale.
Please consult most recently issued datasheet before initiating completing design. product status device(s) described this datasheet have changed since this datasheet published. latest information available Internet June 2001 1.300

Triacs logic level Passivated, sensitive gate triacs plastic enve

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