CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX1
|
|
|
Top Searches for this datasheet
19-0892; 12/96
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
MAX154/MAX158 high-speed multi-channel analog-to-digital converters (ADCs). MAX154 four analog input channels while MAX158 eight channels. Conversion time both devices 2.5µs. MAX154/MAX158 also feature 2.5V on-chip reference, forming complete high-speed data acquisition system. Both converters include built-in track/hold, eliminating need external track/hold. analog input range +5V, although operates from single supply. Microprocessor interfaces simplified ADC's ability appear memory location port without need external logic. data outputs latched, three-state buffer circuitry allow direct connection microprocessor data system input port.
_Features
One-Chip Data Acquisition System Four Eight Analog Input Channels 2.5µs Channel Conversion Time Internal 2.5V Reference Built-In Track/Hold Function 1/2LSB Error Specification Single Supply Operation External Clock Space-Saving SSOP Package
MAX154/MAX158
_Ordering Information
PART MAX154ACNG TEMP. RANGE +70°C +70°C +70°C +70°C +70°C +70°C +70°C PIN-PACKAGE Narrow Plastic Narrow Plastic Dice Wide Wide SSOP SSOP ERROR (LSB) ±1/2 ±1/2 ±1/2 ±1/2
_Applications
Digital Signal Processing High-Speed Data Acquisition Telecommunications High-Speed Servo Control Audio Instrumentation
MAX154BCNG MAX154BC/D MAX154ACWG MAX154BCWG MAX154ACAG MAX154BCAG
Ordering Information continued data sheet.
_Pin Configurations
VIEW
AIN6 AIN4 AIN3 AIN2 AIN1 N.C. AIN5 AIN4 AIN3 AIN2 AIN1 AIN7 AIN8
MAX158
VREF+ VREF-
MAX154
VREF+ VREF-
DIP/SO/SSOP DIP/SO/SSOP
Maxim Integrated Products
free samples latest literature: http://www.maxim-ic.com, phone 1-800-998-8800
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, GND.0V, +10V Voltage Other Pins.GND -0.3V, +0.3V Output Current (REF OUT).30mA Power Dissipation (any package) +75°C .450mW Derate above +25°C .6mW/°C Operating Temperature Ranges MAX15_ _.0°C +70°C MAX15_ .-40°C +85°C MAX15_ .-55°C +125°C Storage Temperature Range .-65°C +160°C Lead Temperature (soldering, 10sec) .+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD +5V, VREF+ +5V, VREF- GND, Mode TMIN TMAX, unless otherwise noted). PARAMETER ACCURACY Resolution Total Unadjusted Error (Note No-Missing-Codes Resolution Channel-to-Channel Mismatch REFERENCE INPUT Reference Resistance VREF+ Input Voltage Range VREF- Input Voltage Range REFERENCE OUTPUT (Note Output Voltage Load Regulation Power-Supply Sensitivity Temperature Drift (Note Output Noise Capacitive Load ANALOG INPUT Analog Input Voltage Range Analog Input Capacitance Analog Input Current AINR CAIN IAIN channel, VREF45 0.157 VREF+ V/µs +25°C 10mA, +25°C ±5%, +25°C MAX15_ MAX15_ MAX15_ 2.47 2.50 0.01 2.53 µV/rms ppm/°C VREFGND VREF+ MAX15_A MAX15_B ±1/4 ±1/2 Bits Bits SYMBOL CONDITIONS UNITS
Slew Rate, Tracking LOGIC INPUTS Input High Voltage Input Voltage Input High Current Input Current Input Capacitance (Note VINH VINL IINH IINL
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
ELECTRICAL CHARACTERISTICS (continued)
(VDD +5V, VREF+ +5V, VREF- GND, MODE TMIN TMAX, unless otherwise noted). PARAMETER LOGIC OUTPUTS Output High Voltage Output Voltage Three-State Output Current Output Capacitance (Note POWER-SUPPLY Supply Voltage Supply Current Power Dissipation Power-Supply Sensitivity Note Note Note Note specified performance 2.4V ±1/16 4.75 5.25 ±1/4 COUT DB0-DB7, INT; IOUT -360µA DB0-DB7, INT; IOUT 1.6mA IOUT 2.6mA SYMBOL CONDITIONS UNITS
MAX154/MAX158
DB0-DB7, RDY; VOUT
Total unadjusted error includes offset, full-scale, linearity errors. Specified with external load unless otherwise noted. Temperature drift defined change output voltage from +25°C TMIN TMAX divided TMIN) (TMAX 25). Guaranteed design.
TIMING CHARACTERISTICS (Note
(VDD +5V, VREF+ +5V, VREF- GND, MODE TMIN TMAX, unless otherwise noted). +25°C Setup Time Hold Time Multiplexer Address Setup Time Multiplexer Address Hold Time Delay Conversion Time (Mode Data Access Time After Data Access Time After INT, Mode Delay (Mode Data Hold Time Delay Time Between Conversions Pulse Width (Mode tCSS tCSH tRDY tCRD tACC1 tACC2 tINTH (Note (Note 50pF (Note 50pF, MAX15_C/E MAX15_M
PARAMETER
SYMBOL
CONDITIONS
UNITS
Note input control signals specified with 20ns (10% +5V) timed from 1.6V voltage level. Note Measured with load circuits Figure defined time required output cross 0.8V 2.4V. Note Defined time required data lines change 0.5V when loaded with circuits Figure
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
_Typical Operating Characteristics
+25°C, unless otherwise noted.)
REFERENCE TEMPERATURE DRIFT
MX7824/28-1
OUTPUT CURRENT TEMPERATURE
MX7824/28-2
ACCURACY DELAY BETWEEN CONVERSIONS (tp)
VREF
MX7824/28-3
2.520
OUTPUT CURRENT (mA) ISOURCE VOUT 2.4V
VOLTAGE
2.510
LINEARITY ERROR (LSB)
2.500
ISINK VOUT 0.4V
2.490
2.480 AMBIENT TEMPERATURE (°C)
-100 AMBIENT TEMPERATURE (°C)
(ns)
ACCURACY VREF [VREF VREF(+) VREF(-)]
MX7824/28-4
POWER-SUPPLY CURRENT TEMPERATURE (NOT INCLUDING REFERENCE LADDER)
MX7824/28-5
LINEARITY ERROR (LSB)
SUPPLY CURRENT (mA) 4.75V 5.25V
VREF
-100
AMBIENT TEMPERATURE (°C)
DGND 100pF 10pF DGND DGND 100pF
10pF DGND
High-Z
High-Z
High-Z
High-Z
Figure Load Circuits Data-Access Time Test
Figure Load Circuits Data-Hold Time Test
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
_Pin Descriptions
MAX154 NAME AIN4 AIN3 AIN2 AIN1 FUNCTION Analog Input Channel Analog Input Channel Analog Input Channel Analog Input Channel Reference Output (2.5V) MAX154 Three-State Data Output, (LSB) Three-State Data Output, Three-State Data Output, Three-State Data Output, Read Input. controls conversions data access. Digital Interface section. Interrupt Output. going indicates completion conversion. Digital Interface section. Ground Lower Limit Reference Span. Sets zero-code voltage. Range: VREF+. Upper Limit Reference Span. Sets full-scale input voltage. Range: VREF- VDD. Ready Output. Open-drain output with active pull-up device. Goes when goes high impedance conversion. Chip-Select Input. must device selected. Three-State Data Output, Three-State Data Output, Three-State Data Output, Three-State Data Output, (MSB) Channel Address Input Channel Address Input Connect Power-Supply Voltage, MAX158 NAME AIN6 AIN5 AIN4 AIN3 AIN2 AIN1 FUNCTION Analog Input Channel Analog Input Channel Analog Input Channel Analog Input Channel Analog Input Channel Analog Input Channel Reference Output (2.5V) MAX158 Three-State Data Output, (LSB) Three-State Data Output, Three-State Data Output, Three-State Data Output, Read Input. controls conversions data access. Digital Interface section. Interrupt Output. going indicates completion conversion. Digital Interface section. Ground Lower Limit Reference Span. Sets zero-code voltage. Range: VREF+. Upper Limit Reference Span. Sets full-scale input voltage. Range: VREF- VDD. Ready Output. Open-drain output with active pull-up device. Goes when goes high impedance conversion. Chip-Select input. must device selected. Three-State Data Output, Three-State Data Output, Three-State Data Output, Three-State Data Output, (MSB) Channel Address Input Channel Address Input Channel Address Input Power-Supply Voltage, Analog Input Channel Analog Input Channel
MAX154/MAX158
VREF-
VREF-
VREF+
VREF+
AIN8 AIN7
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
_Detailed Description
Converter Operations
MAX154/MAX158 what commonly called "half-flash" conversion technique (Figure 4-bit flash converter sections used achieve 8bit result. Using comparators, upper 4-bit (most significant) flash compares unknown input voltage reference ladder provides upper four data bits. internal uses bits generate analog signal from first flash conversion. residue voltage representing difference between unknown input voltage then compared reference ladder (least significant) flash comparators obtain lower four output bits.
_Digital Interface
MAX154/MAX158 only Chip Select (CS) Read (RD) control inputs. READ operation, taking low, latches multiplexer address inputs starts conversion (Table
Table Truth Table Input Channel Selection
MAX154/MX7824 MAX158/MX7828 SELECTED CHANNEL AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8
Operating Sequence
operating sequence shown Figure conversion initiated falling edge comparator inputs track analog input voltage approximately 1µs. After this first cycle, flash result latched into output buffers conversion begins. goes approximately 600ns later, indicating conversion, that lower four bits latched into output buffers. data then accessed using inputs.
There interface modes, which determined length input. Mode implemented keeping until conversion ends, designed microprocessors that forced into WAIT state. this mode, conversion started with READ operation (taking low), data read when conversion ends. Mode other hand, does require microprocessor WAIT states. READ operation simultaneously initiates conversion reads previous conversion result.
VREF+ VREFAIN1
4-BIT FLASH (4MSB)
AIN4
MUX*
4-BIT
THREESTATE DRIVERS
AIN8
VREF+
4-BIT FLASH (4LSB)
TIMING CONTROL CIRCUITRY
2.5V
ADDRESS LATCH DECODE
*MAX154 4-Channel MAX158 8-Channel
Figure Functional Diagram
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
500ns 1000ns 600ns GOING INDICATES THAT CONVERSION COMPLETE THAT DATA READ
SETUP TIME REQUIRED INTERNAL COMPARATORS PRIOR STARTING CONVERSION
SAMPLED FOUR MSBs LATCHED
device), connected processor's READY/WAIT input. goes falling edge goes high impedance conversion, when conversion result appears data outputs. output required, external pull-up resistor omitted. goes when conversion complete returns high rising edge
MAX154/MAX158
TRACKED INTERNAL COMPARATORS
Interface Mode
Mode designed applications where microprocessor forced into WAIT state. Taking latches multiplexer address starts conversion (Figure Data from previous conversion immediately read from outputs (DB0-DB7). goes high rising edge goes conversion. second READ operation required read result this conversion. second READ latches multiplexer address starts another conversion. delay 2.5µs must allowed between READ operations. goes falling edge goes high impedance rising edge needed, external pull-up resistor omitted.
Figure Operating Sequence
Interface Mode
Figure shows timing diagram Mode operation. This used with microprocessors that have WAIT state capability, whereby READ instruction extended accommodate slow-memory devices. Taking latches analog multiplexer address starts conversion. Data outputs DB0-DB7 remain high-impedance condition until conversion complete. There status outputs: Interrupt (INT) Ready (RDY). RDY, open-drain output internal pull-up
tCSS
tCSH
tCSS
ANALOG CHANNEL ADDRESS tRDY ADDR VALID ADDR VALID
tINTH tCRD tACC2 DATA VALID
DATA
HIGH IMPEDANCE
Figure Mode Timing Diagram
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
tCSS
tCSH
tCSS
tCSH
ANALOG CHANNEL ADDRESS tRDY tCRD tINTH tINTH tRDY ADDR VALID ADDR VALID
tACCI DATA
tACCI DATA
DATA
Figure Mode Timing Diagram
_Analog Considerations
Reference Input
VREF+ VREF- inputs converter define zero full-scale ADC. other words, voltage VREF- equal input voltage that produces output code zeros, voltage VREF+ equal input voltage that produces output code ones (Figure Figure shows some possible reference configurations. 0.01µF bypass capacitor should used reduce high-frequency output impedance internal reference. Larger capacitors should used, this degrades stability reference buffer. 2.5V reference output with respect pin.
OUTPUT CODE 11111111 11111110 11111101 FULL-SCALE TRANSITION
1LSB VREF+ VREF256 00000011 00000010 00000001 00000000 VREF1 INPUT VOLTAGE TERMS LSBs) FS-1LSB VREF+
Bypassing
47µF electrolytic 0.1µF ceramic capacitor should used bypass GND. These capacitors must have minimum lead length, since excess lead length contribute conversion errors instability. reference inputs driven long lines, they should bypassed with 0.1µF capacitors reference input pins.
Figure Transfer Function
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
Input Current
AINx(+) AINx(-)
MAX154/MAX158
REFOUT
MAX154 MAX158
0.1µF
47µF VREF+ 0.01µF VREF-
Figure Internal Reference
AINx(+) AINx(-)
0.1µF 47µF
VREF+ VREF-
MAX154 MAX158
converters' analog inputs behave somewhat differently from conventional ADCs. sampled data comparators take varying amounts current from input, depending cycle they equivalent circuit converter shown Figure When conversion starts, AIN(n) connected comparators. Thus, AIN(n) connected thirty-one capacitors. acquire input signal approximately 1µs, input capacitors must charge input voltage through on-resistance multiplexer (about 600) comparator's analog switches comparator). addition, about 12pF stray capacitance must charged. input modeled equivalent network shown Figure (source impedance) increases, capacitors take longer charge. Since length input acquisition time internally set, large source resistances (greater than 100) will cause settling errors. output impedance opamp open-loop output impedance divided loop gain frequency interest. important that amplifier driving converter input have sufficient loop gain approximately 1MHz maintain output impedance.
Input Filtering
transients analog input caused sampled data comparators degrade converter's performance, since does "look" input when these transients occur. comparator's outputs track input during first conversion, then latched. Therefore, least will provided charge ADC's input capacitance. necessary filter these transients with external capacitor terminals.
Figure Power Supply Reference
Current path must still exist from VIN(-) Ground
Sinusoidal Inputs
AINx(+)
0.1µF 47µF 2.5V AINx(-)
VREF+
MAX154 MAX158
VREF-
MAX154/MAX158 measure input signals with slew rates high 157mV/µs rated specifications. This means that analog input frequency high 10kHz without external track/hold. maximum sampling rate limited conversion time (typical tCRD 2µs) plus time required between conversions 500ns). calculated fMAX 400kHz tCRD (2.0 0.5) fMAX permits maximum sampling rate 50kHz channel when using MAX158 100kHz channel when using MAX154. These rates well above Nyquist requirement 20kHz sampling rate 10kHz input bandwidth.
Figure Inputs Referenced
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
Bipolar Input Operation
circuit Figure used bipolar input operation. input voltage scaled amplifier that only positive voltages appear ADC's inputs. analog input range output code complementary offset binary. ideal input/output characteristic shown Figure 10b.
LADDER COMPARATORS
11111111 11111110 11111101 10000010 10000001 10000000 01111111 01111110 00000010 00000001 00000000 1LSB
1LSB
AIN1
RMUX
12pF
LADDER COMPARATORS INPUT VOLTAGE (LSBs)
Figure Equivalent Input Circuit
32pF
Figure 10b. Transfer Function Input Operation
AIN1
ADDRESS
Figure Network Model
3.57k 11.5 10.0k AIN1 MREQ WAIT D0-D7 DATA DB0-DB7 ADDRESS DECODE
MAX154 MAX158
0.01µF
16.2k
MAX154 MAX158
0.01µF
VREF+ REFOUT
VREF47µF
DB0-DB7 MAX158.
0.1µF
ONLY CHANNEL SHOWN
Figure Simple Mode Interface
Figure 10a. Bipolar Input Operation
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference
_Ordering Information (continued)
BANDPASS FILTER BANDPASS FILTER AIN1 AIN2
MAX154/MAX158
PART
TEMP. RANGE
PIN-PACKAGE Plastic Plastic Wide Wide SSOP SSOP CERDIP CERDIP Plastic Plastic Dice Wide Wide SSOP SSOP Plastic Plastic Wide Wide SSOP SSOP CERDIP CERDIP
ERROR (LSB) ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2 ±1/2
MAX154AENG -40°C +85°C MAX154BENG -40°C +85°C MAX154AEWG -40°C +85°C MAX154BEWG -40°C +85°C MAX154AEAG -40°C +85°C MAX154BEAG -40°C +85°C
DATA
MAX158
SPEECH INPUT DB0-DB7 BANDPASS FILTER BANDPASS FILTER
AIN7
MAX154AMRG -55°C +125°C MAX154BMRG -55°C +125°C MAX158ACPI +70°C +70°C MAX158BCPI MAX158BC/D +70°C MAX158ACWI MAX158BCWI MAX158ACAI MAX158BCAI MAX158AEPI MAX158BEPI MAX158AEWI MAX158BEWI MAX158AEAI MAX158BEAI MAX158AMJI MAX158BMJI +70°C +70°C +70°C +70°C -40°C +70°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -55°C +125°C -55°C +125°C
AIN8 VREF+ VREF15
Figure Speech Analysis Using Real-Time Filtering
AIN1 AIN2 AIN3 AIN4 REF+ VREFGND
SAMPLE PULSE
VREF VOUT
MAX154
DB0-DB7
MAX506
DB0-DB7
VOUT VOUT VOUT
DGND
AGND
Figure 4-Channel Fast Sample Infinite Hold
CMOS High-Speed 8-Bit ADCs with Multiplexer Reference MAX154/MAX158
_Chip Topography
AIN4 AIN6 AIN8 (N.C.) (AIN2) (AIN4) AIN3 AIN5 AIN7 (N.C.) (AIN1) (AIN3)
AIN2 (N.C.) AIN1 (N.C.) (REF OUT)
(N.C.) 0.127" (3.228mm)
VREF+ VREF0.124" (3.150mm)
_Package Information
INCHES MILLIMETERS 0.068 0.078 1.73 1.99 0.002 0.008 0.05 0.21 0.010 0.015 0.25 0.38 0.004 0.008 0.09 0.20 VARIATIONS 0.205 0.209 5.20 5.38 0.0256 0.65 0.301 0.311 7.65 7.90 0.025 0.037 0.63 0.95 INCHES MILLIMETERS 6.33 0.239 0.249 6.07 6.33 0.239 0.249 6.07 7.33 0.278 0.289 7.07 8.33 0.317 0.328 8.07 0.397 0.407 10.07 10.33
21-0056A
MAX154/MX7824
PINS
SSOP SHRINK SMALL-OUTLINE PACKAGE
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 (408) 737-7600 1996 Maxim Integrated Products Printed registered trademark Maxim Integrated Products.
Other recent searches
UG371 - UG371 UG371 Datasheet
SISN85 - SISN85 SISN85 Datasheet
SH7145 - SH7145 SH7145 Datasheet
LG-192HE-CT - LG-192HE-CT LG-192HE-CT Datasheet
IRS2336 - IRS2336 IRS2336 Datasheet
IRS23364D - IRS23364D IRS23364D Datasheet
C8051F040 - C8051F040 C8051F040 Datasheet
1701231000 - 1701231000 1701231000 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
