32-Channel Sample/Hold Amplifier with Single Multiplexed Input MA

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32-Channel Sample/Hold Amplifier with Single Multiplexed Input MA

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19-1674; 4/00
32-Channel Sample/Hold Amplifier with Single Multiplexed Input
MAX5168 contains sample/hold amplifiers four 1-of-8 multiplexers. logic controlling muxes sample/hold amplifiers combines four muxes into unified 1-of-32 multiplexer with sample/hold each output. Additional logic allows devices function single 64-channel unit. MAX5168 available with output impedance 500, MAX5168 operates with +10V supplies, separate digital logic supply. Manufactured with proprietary BiCMOS process, provides high accuracy, fast acquisition time, droop rate, hold step. MAX5168 typical linearity error less than 0.01% accurately acquire step input signals 0.01% accuracy 2.5µs within input signal range. Transitions from sample mode hold mode result only 0.5mV error. While hold mode, output voltage slowly droops rate 1mV/s. MAX5168 available 48-pin TQFP package specified both commercial (0°C +70°C) extended industrial (-40°C +85°C) temperature ranges. 32-Channel Sample/Hold 0.01% Accuracy Acquired Signal 0.01% Linearity Error Fast Acquisition Time: 2.5µs Droop Rate: 1mV/s Hold Step: 0.25mV Wide Output Voltage Range:
Features
MAX5168
Ordering Information
PART MAX5168LCCM MAX5168MCCM MAX5168NCCM MAX5168LECM MAX5168MECM MAX5168NECM TEMP. RANGE +70°C +70°C +70°C -40°C +85°C -40°C +85°C -40°C +85°C PINPACKAGE TQFP TQFP TQFP TQFP TQFP TQFP ROUT
_Applications
Automatic Test Systems (ATE) Industrial Process Controls Arbitrary Function Generators Avionics Equipment
ADDR2 ADDR3 ADDR4 SELECT CONFIG DGND AGND N.C.
Configuration
VIEW
ADDR1 ADDR0 OUT31 OUT30 OUT29 OUT28 OUT27 OUT26 OUT25 OUT24 OUT23 OUT22
OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 OUT15 OUT14 OUT13 OUT12 OUT11
MAX5168
Maxim Integrated Products
N.C. OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10
TQFP
free samples latest literature, visit www.maxim-ic.com phone 1-800-998-8800. small orders, phone 1-800-835-8769.
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
ABSOLUTE MAXIMUM RATINGS
AGND.-0.3V +11.0V AGND .-6.0V +0.3V .+15.75V DGND .-0.3V +6.0V AGND .-0.3V +6.0V DGND AGND.-0.3V +2.0V OUT_ .VSS Logic Inputs DGND .-0.3V +6.0V Maximum Current into OUT_ .±10mA Maximum Current into Logic Inputs .±20mA Continuous Power Dissipation +70°C) 48-Pin TQFP (derate 12.5mW/°C above +70°C).1000mW Operating Temperature Ranges MAX5168_CCM .0°C +70°C MAX5168_ECM.-40°C +85°C Storage Temperature Range .-65°C +150°C Lead Temperature (soldering, 10s) .+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD +10.0V, -5.0V, +5.0V ±5%, AGND DGND 50pF, TMIN TMAX, unless otherwise noted. Typical values +25°C.) PARAMETER ANALOG SECTION Linearity Error Hold Step Droop Rate Offset Voltage Output Voltage Range VOUT_ -4.0V +7V, AGND AGND, +25°C AGND, +25°C +15°C +65°C (Note 250pF MAX5168L 10nF MAX5168M/N MAX5168L MAX5168M MAX5168N 0.75 +25°C, Figure Figure (Note step 0.08% 100mV step ±1mV 1000 1300 0.01 0.25 0.08 1.00 mV/s µV/°C SYMBOL CONDITIONS UNITS
Analog Crosstalk
step with 500ns rising edge (Note ROUT_ ISOURCE ISINK (Note 250pF sample mode sample mode
Input Capacitance Output Impedance Output Source Current Output Sink Current Output Clamp High TIMING PERFORMANCE Acquisition Time Hold-Mode Settling Time Aperture Delay
±1mV final value, Figure (Note
32-Channel Sample/Hold Amplifier with Single Multiplexed Input
ELECTRICAL CHARACTERISTICS (continued)
(VDD +10.0V, -5.0V, +5.0V ±5%, AGND DGND 50pF, TMIN TMAX, unless otherwise noted. Typical values +25°C.) PARAMETER Pulse Width Data Setup Time Data Hold Time DIGITAL INPUTS Input Voltage High Input Voltage Input Current POWER SUPPLIES Positive Analog Supply Negative Analog Supply Digital Logic Supply Positive Analog Supply Current Negative Analog Supply Current ADDR_ DGND DGND ADDR_ 0.8V 2.0V, 0.8V 2.0V VSS, sample mode, AGND (Note (Note -4.75 4.75 10.5 -5.45 5.25 DGND SYMBOL tSET CONDITIONS Figure (Note Figure (Note Figure (Note UNITS
MAX5168
Digital Logic Supply Current
Power-Supply Rejection Ratio
PSRR
Note Guaranteed design. Note exceed absolute maximum rating +15.75V (see Absolute Maximum Ratings).
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
Typical Operating Characteristics
(VDD +10V, -5V, +5V, +5V, AGND DGND VDD, VSS, +25°C, unless otherwise noted.)
DROOP RATE INPUT VOLTAGE
MAX5168
DROOP RATE TEMPERATURE
MAX5168
POWER-SUPPLY REJECTION RATIO SAMPLE MODE
NEGATIVE SUPPLY (VSS) -100 POSITIVE SUPPLY (VDD) PSRR (dB)
MAX5168
DROOP RATE (mV/s) INPUT VOLTAGE
-120
DROOP RATE (mV/s)
1000 10,000 TEMPERATURE (°C) FREQUENCY (kHz)
POWER-SUPPLY REJECTION RATIO HOLD MODE
POSITIVE SUPPLY (VDD) -100 PSRR (dB) NEGATIVE SUPPLY (VSS) 1000 10,000 FREQUENCY (kHz)
MAX5168
HOLD STEP INPUT VOLTAGE
MAX5168
HOLD STEP TEMPERATURE
HOLD STEP (µV)
MAX5168
-120
-160 -140 -120 HOLD STEP (µV) -100 INPUT VOLTAGE
TEMPERATURE (°C)
OFFSET VOLTAGE INPUT VOLTAGE
MAX5168
OFFSET VOLTAGE TEMPERATURE
MAX5168
-3.0 -3.2 -3.4 OFFSET VOLTAGE (mV) -3.6 -3.8 -4.0 -4.2 -4.4 -4.6 -4.8 -5.0 INPUT VOLTAGE
OFFSET VOLTAGE (mV)
TEMPERATURE (°C)
32-Channel Sample/Hold Amplifier with Single Multiplexed Input
Description
14-29 31-46 NAME ADDR2 ADDR3 ADDR4 SELECT CONFIG DGND AGND N.C. OUT0-OUT15 OUT16-OUT31 ADDR0 ADDR1 Address Decoder Address Decoder Address Decoder Enables pin. polarity SELECT determined state CONFIG pin. CONFIG low, then SELECT active-high. CONFIG high, then SELECT active-low. When SELECT active state, channels hold mode independent pin. Puts selected channel into sample mode when low. Places channels into hold mode when high. Sets polarity SELECT pin. Logic Supply Digital Analog Supply Analog Input connection. internally connected. Outputs 0-15 Pins +10V Analog Supply Outputs 16-31 Pins Address Decoder Address Decoder FUNCTION
MAX5168
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
ADDR0-ADDR4
SELECT CONFIG SW30 SW31
MAX5168
OUT0
OUT1
OUT30
OUT31
Figure Functional Diagram
Detailed Description
Digital Interface
MAX5168 three logic control inputs five address lines. address lines inputs demultiplexer that selects outputs standard addressing scheme (Table analog input connected addressed sample/hold when directed control logic (Table three logic control lines determine state addressed sample/hold. normal circuit connection this device hardwire CONFIG SELECT opposing logic voltages. When SELECT CONFIG opposite states (one high other low), five address lines select sample/holds. line place selected channel into sample hold mode. other channels will remain hold mode. active-high sampling mode desired, CONFIG low. this case, SELECT controls addressed channel with high state putting that channel into sample mode.
SELECT CONFIG pins allow design virtual 64-channel device using MAX5168s. Applications Information section more information about 64-plus output addressing schemes.
Sample/Hold
MAX5168 contains buffered sample/hold circuits with internal hold capacitors. Internal hold capacitors minimize leakage current, dielectric absorption, feedthrough, required board space. value hold capacitor affects acquisition time droop rate. Smaller capacitance allows faster acquisition times increases droop rate. Larger values increase hold acquisition time. hold capacitor used MAX5168 provides fast 2.5µs (typ) acquisition time while maintaining relatively 1mV/s (typ) droop rate, making sample/hold ideal highspeed sampling. Sample Mode When SELECT CONFIG opposing logic states, line controls mode operation. Sample mode entered when low. During sample mode,
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
Table Channel/Output Selection
ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13 VOUT14 VOUT15 VOUT16 VOUT17 VOUT18 VOUT19 VOUT20 VOUT21 VOUT22 VOUT23 VOUT24 VOUT25 VOUT26 VOUT27 VOUT28 VOUT29 VOUT30 VOUT31 OUTPUT SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED SELECTED
Table Logic Table CONFIG, SELECT,
(SAMPLE/HOLD) Don't care. CONFIG SELECT CHANNEL FUNCTION Hold Sampling Sampling Hold Hold
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
selected multiplexer channel connects allowing hold capacitor acquire input signal. guarantee accurate sample, maintain sample mode least 4µs. output sample/hold amplifier tracks input after 4µs. Only addressed channel selected multiplexer samples input; other channels remain hold mode. Hold Mode matter what condition other control lines, high places MAX5168 into all-channel hold mode. Hold mode disables multiplexer disconnects sample/holds from input. When channel disconnected, hold capacitor maintains sampled voltage output with 1mV/s typical droop rate (towards VDD). Hold Step When switching between sample mode hold mode, voltage hold capacitor changes charge injection from stray capacitance. This voltage change, called hold step, minimized limiting amount stray capacitance seen hold capacitor. MAX5168 limits hold step 0.25mV (typ). output capacitor ground used filter this small hold-step error. when then this equation becomes (VSS 0.75V) VOUT (VDD 2.4V)
Timing Definitions
Acquisition time (tAQ) time MAX5168 must remain sample mode hold capacitor acquire accurate sample. hold-mode settling time (tH) time necessary output voltage settle final value. Aperture delay (tAP) time interval required disconnect input from hold capacitor. hold pulse width (tPW) time MAX5168 must remain hold mode while address changed. Data setup time time address must maintained digital input pins before address becomes valid. Data hold time (tDH) time address must maintained after device placed hold mode (Figure
Applications Information
Multiplexing
Figure shows typical demultiplexer application. Different digital codes converted digital-toanalog converter (DAC) then stored different channels MAX5168. 40mV/s (max) droop rate requires refreshing hold capacitors every 250ms before voltage droops 1/2LSB 8-bit with full-scale voltage.
Output
MAX5168 contains output buffer each multiplexer channel total), hold capacitor sees high-impedance input that reduces droop rate. capacitor droops 1mV/s (typ) while hold mode. buffer also provides output impedance; however, device contains output resistors series with buffer output (Figure selected output filtering. provide greater design flexibility, MAX5168 available with output impedance 500, Output loads increase analog supply current (IDD ISS). Excessive loading output(s) drastically increases power dissipation. exceed maximum power dissipation specified Absolute Maximum Ratings. resistor-divider formed output resistor (RO) load impedance scales sampled voltage (VSAMP). Determine output voltage (VOUT_) follows: Voltage Gain VOUT_ VSAMP maximum output voltage range depends analog supply voltages available scaling factor used: (VSS 0.75V) VOUT_ (VDD 2.4V)
Virtual Output Sample/Hold
MAX5168s configured operate single output sample/hold. upper lower addressed devices identified CONFIG's logic level. Connect CONFIG upper device low, making SELECT active high. Connect CONFIG lower device high make SELECT active low. Figure shows configure devices. devices only address lines single control decode outputs. Address lines A0-A4 from control logic connect ADDR0- ADDR4 both 32-channel devices. line toggles SELECT pins both devices select active one. device that CONFIG tied high responds lower addresses (000000 through 011111). device that CONFIG grounded responds upper addresses (100000 through 111111).
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
ADDR_ SELECT, CONFIG
OUT_
HOLD STEP
(CHANNEL FROM HOLD SAMPLE)
(CHANNEL FROM SAMPLE HOLD)
Figure Timing Diagram
SELECT
ADDRESS ADDR0-ADDR4
ADDRESS DECODER SWITCHES 0-31 OUT0
MAX5168
OUT1
DATA
OUT30
OUT31
CONFIG
Figure Multiplexing
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
CONFIG A0-A4 INPUT ADDR0-ADDR4 SELECT OUT30 OUT31 OUT0 OUT1
MAX5168
OUT32 ADDR0-ADDR4 SELECT CONFIG OUT62 OUT63 OUT33
MAX5168
Figure 64-Output Sample/Hold Circuit
Input Drive Requirements
input MAX5168 feeds inputs highimpedance buffers. These buffers what charge sample/hold capacitor through multiplexer switch resistance. bias current selected buffer 10µA, this feeds into 10pF input capacitance. Figure shows equivalent input circuit. bias currents other sample holds very small comparison bias current selected channel.
IBIAS 10µA,
10pF
Powering MAX5168
MAX5168 does require special power-up sequence avoid latchup. device requires three separate supply voltages operation. However, when voltages available, DC-DC charge-pump (switched-capacitor) converters provide simple, efficient solution. MAX860 provides voltage doubling inversion, ideal conversions from +10V from -5V.
Figure Input Equivalent Circuit
Chip Information
TRANSISTOR COUNT: 6961
32-Channel Sample/Hold Amplifier with Single Multiplexed Input
Package Information
32L/48L,TQFP.EPS
MAX5168
32-Channel Sample/Hold Amplifier with Single Multiplexed Input MAX5168
NOTES
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 2000 Maxim Integrated Products Printed registered trademark Maxim Integrated Products.

32-Channel Sample/Hold Amplifier with Single Multiplexed Input MA

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