The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.   United States  United States   


Datasheet Search Engine   
 
 
Part # or Description: • 5V RS232 Driver • 2SC5066* • "Real Time Clock" • "USB connector" • "blue led" 5mm • 10 watt zener diode • 2N3055* motorola
 
Search Tip: Try entering the part number only. Include a wildcard (eg. lm317* or 1n4148*)


  Datasheet Home \ Datasheet Details

ESD Protection, TTL, EPROM, Memory, Power Supply, Microprocessor, Capacitor

Download

PDF Abstract Text:

AT27C020


· Fast Read Access Time - 55 ns · Low Power CMOS Operation ·

AT27C020
Features
· Fast Read Access Time - 55 ns · Low Power CMOS Operation ·
2-Megabit (256K x 8) OTP EPROM AT27C020
Description
The AT27C020 is a low-power, high performance 2, 097, 152-bit one-time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed reducing WAIT states on high performance microprocessor systems. In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current is typically less than 10 µA. PLCC Top View Pin Name A0 - A17 O0 - O7 CE OE PGM Function Addresses Outputs Chip Enable Output Enable Program Strobe
A7 A6 A5 A4 A3 A2 A1 A0 O0 A12 A15 A16 VPP VCC PGM A17
Pin Configurations
PDIP Top View
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM A17 A14 A13 A8 A9 A11 OE A10 CE 07 06 05 04 03
A11 A9 A8 A13 A14 A17 PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TSOP Top View Type 1
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE 07 06 05 04 03 GND 02 01 O0 A0 A1 A2 A3
01 02 GND 03 04 05 06
A14 A13 A8 A9 A11 OE A10 CE 07
Rev. 0570C-B-12 / 97
System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
Block Diagram
AT27C020
Absolute Maximum Ratings
Temperature Under Bias............-55°C to +125°C Storage Temperature..............-65°C to +150°C Voltage on Any Pin with Respect to Ground ................ -2.0V to +7.0V(1) Voltage on A9 with Respect to Ground .............. -2.0V to +14.0V(1)
Note: 1. NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
VPP Supply Voltage with Respect to Ground ............... -2.0V to +14.0V(1)
Operating Modes
Mode / Pin Read Output Disable Standby Rapid Program PGM Verify PGM Inhibit Product Identification
Notes:
CE VIL X VIH VIL VIL VIH VIL
OE VIL VIH X VIH VIL X VIL
PGM X(1) X X VIL VIH X X
Outputs DOUT High Z High Z DIN DOUT High Z Identification Code
DC and AC Operating Conditions for Read Operation
DC and Operating Characteristics for Read Operation
Symbol ILI ILO IPP ISB ICC VIL VIH VOL VOH Notes:
Parameter Input Load Current Output Leakage Current VPP
Read / Standby Current
VCC(1) Standby Current VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage
0.8 VCC + 0.5 0.4
1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP.
AC Characteristics for Read Operation
tOH Note:
1. 2, 3, 4, 5. See AC Waveforms for Read Operation diagram.
AT27C020
AC Waveforms for Read Operation(1)
Notes:
Input Test Waveforms and Measurement Levels
For -55 devices only:
3.0V AC DRIVING LEVELS 0.0V 1.5V AC MEASUREMENT LEVEL
Output Test Load (1)
For -70, -90, -12, -15 devices only:
Note:
Pin Capacitance
Note:
Units pF pF
Programming Waveforms (1)
Notes:
The Input Timing reference is 0.8V for VIL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients.
DC Programming Characteristics
AT27C020
AC Programming Characteristics
Notes:
Parameter Address Setup Time CE Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay VPP Setup Time VCC Set up Time PGM Program Pulse Width(3) Data Valid from OE VPP Pulse Rise Time During Programming
Test Condition (1)
Units µs µs µs µs µs µs
Pins Codes Manufacturer Device Type A0 0 1 O7 0 1 O6 0 0 O5 0 0 O4 1 0 O3 1 0 O2 1 1 O1 1 1 O0 0 0 Hex Data 1E 86
Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.
AT27C020
Ordering Information
tACC (ns) 55 ICC (mA) Active 25 Standby 0.1 Ordering Code AT27C020-55JC AT27C020-55PC AT27C020-55TC AT27C020-55JI AT27C020-55PI AT27C020-55TI AT27C020-70JC AT27C020-70PC AT27C020-70TC AT27C020-70JI AT27C020-70PI AT27C020-70TI AT27C020-90JC AT27C020-90PC AT27C020-90TC AT27C020-90JI AT27C020-90PI AT27C020-90TI AT27C020-12JC AT27C020-12PC AT27C020-12TC AT27C020-12JI AT27C020-12PI AT27C020-12TI AT27C020-15JC AT27C020-15PC AT27C020-15TC AT27C020-15JI AT27C020-15PI AT27C020-15TI Package 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T Operation Range Commercial (0°C to 70°C) Industrial (-40°C to 85°C) Commercial (0°C to 70°C) Industrial (-40°C to 85°C) Commercial (0°C to 70°C) Industrial (-40°C to 85°C) Commercial (0°C to 70°C) Industrial (-40°C to 85°C) Commercial (0°C to 70°C) Industrial (-40°C to 85°C)
Package Type 32J 32P6 32T 32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32-Lead, Plastic Thin Small Outline Package (TSOP)