REALTEK FLAT PANEL DISPLAY CONTROLLER RTD2020 This document conta

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RTD2020
REALTEK FLAT PANEL DISPLAY CONTROLLER RTD2020
This document contains introductory information pertaining Realtek RTD2020 Flat Panel Display Controller. Because there proprietary confidential information contained complete specifications, this brief offered those interested chip. more detailed description device, please contact your Realtek sales representative. Features. General Description Block Diagram. Assignments. Descriptions. PLL. Control Interface Digital Input Display Port. Miscellaneous Interface. Channel Power Ground Interface.
2002/11/12
Rev.1.20
RTD2020
Features
General Integrated Spread-Spectrum DCLK Integrated 8-bit triple-channel 140MHz ADC/PLL Integrated programmable timing controller Integrated microcontroller compatible with standard 8032 General-purpose input/outputs (GPIOs) Embedded fully functional multi-language support Embedded supports DDC1, DDC2B, DDC/CI Supports functionality channel Embedded programmable Zoom scaling down Embedded Pattern Generator external memory required Requires only crystal generate timing Analog Input Interface Supports 140MHz (SXGA 75Hz) Supports Sync Green (SOG) de-composite sync modes On-chip high-performance PLLs Digital Input Interface Supports 24-bit pixel digital input 160MHz Supports 12-bit input Supports 16/24-bit YUV422/444 video format input Supports 8-bit video format input Built-in color space converter de-interlace Capture window auto position auto phase tracking capability Auto Detection /Auto Calibration Input format detection Compatibility with standard VESA mode support user-defined mode Smart engine Phase Image position calibration Scaling Fully programmable zoom ratios Independent horizontal/vertical scaling Advanced zoom algorithm provides high image quality Sharpness/Smooth filter enhancement Color Processor Digital brightness contrast adjustments Gamma correction Dithering logic 18-bit panel color depth enhancement Output Interface Fully programmable, built-in display timing generator 2-pixel/clock panel support, 140MHz swap, odd/even swap red/blue group swap Programmable TCON function support Reduced Power saving features Host Interface Supports pins serial interface Support parallel interface while using internal Embedded 12*18 font character Embedded characters symbols including multi-color symbols User font RAM, which allows programming special symbols background colors character colors Programmable width height control background windows Selectable shadow color windows characters Intensity, blinking effects Fade-in/out effect Frame shadowing independent shadowing Frame bordering independent bordering channel 8-bits output, selectable clock frequency Row-to-Row spacing maintain constant display height Window alpha-blending effect Power Technology 2.5V/3.3V power supply 0.25µm CMOS process; 208-pin PQFP package
2002/11/12
Rev.1.20
RTD2020
General Description
Realtek RTD2020 highly-integrated single chip controller solution producing real time, quality digital video computer graphic images monitor/flat panel displays, such monitors. monitors flat panel displays provide sharp, flicker free display while saving space energy desktop applications. RTD2020 provides ideal interface between industry standard digital graphics controllers wide variety panel devices. Flat panel devices using RTD2020 support incoming VESA modes interface device, SXGA (1280x1024) resolution. increased flexibility, RTD2020 supports both analog digital interface inputs. embedded 8-bit triple-channel 140MHz high-quality Analog Digital Converter (ADC) support 1280x1024 75Hz analog input signal. digital interface support Transmission Minimized Differential Signaling (TMDS) receiver Video-Decoder digital output signals 160MHz. RTD2020 features embedded On-Screen Display (OSD) engine. This enables either character based based menu display. Through this menu, display parameters, such brightness contrast, controlled, information resolution frequency, displayed. embedded display pattern generator function panel testing. Processing 24-bit 16-bit input data streams, conversion input signals high resolution output, RTD2020 implements sophisticated scaling algorithm. This feature allows RTD2020 perform horizontal vertical interpolation replication down image scaling, based programmable parameters, create images highest quality. built-in advanced filtering engine enables independent vertical horizontal zoom/shrink, and, through enhancement individual pixels, enhances image sharpness, provides superb visual quality. This allows appropriate sized display crisp, sharp text smooth, clear graphics, taking full advantage flat panel technology. Also featured enhanced color processing functions, including gamma correction dithering logic. Brightness, contrast gamma correction programmed through internal gamma correction lookup tables. Full control output panel data obtained color mapping input data. 8-bit/color pixel path offers 16.7 million color support 24-bit panels. 18-bit panels also supported through spatial temporal dither algorithms. Increased integration RTD2020 includes components such 8032 compatible micro controller, provide monitor information through DDC1/DDC2B protocol. Internal System Programming (ISP) accomplished through serial bus, supporting enhanced DDC-communication from monitor, such DDC/CI also supported. Finally, Timing-Controller (TCON) generates control signals LCD-panel rather than LCD-monitor, embedded spread-spectrum technology reduces effects. these features make RTD2020 optimum solution superior-quality image display.
2002/11/12
Rev.1.20
RTD2020
Block Diagram
Program (64KB~128KB) Addr Data Ctrl
R/G/B RTD2020 Flat Panel Display
TCON
Panel Row/Column Driver
NTSC
Video Decoder
Signal Panel
Rx0~2
TMDS Receiver
EEPROM
24.576MHz Key-In
TMDS/LVDS Panel
Application System Block Diagram
Analog Digital RGB/YUV
Triple-ADC FIFO
Color Conversion
Timing Control
Panel Driver
Sync Processor
Control Register
Scaling
Built-In Build-In
24.576MHz
Onchip
Color Processing
Panel
Flat Panel Display RTD2020 Chip Functional Block Diagram
2002/11/12
Rev.1.20
RTD2020
Assignments
P2.4/TCON15 P2.3/TCON14 P2.2/TCON13 P2.1/TCON12 P2.0/TCON11 P1.7/TCON10 P1.6/TCON9 GNDIK P1.5/TCON8 P1.4/TCON7 VCCK BBLU0 BBLU1 BBLU2 BBLU3 BBLU4 BBLU5 BBLU6 BBLU7 BGRN0 BGRN1 BGRN2 BGRN3 BGRN4 BGRN5 GNDIK BGRN6 BGRN7 VCCK BRED0 BRED1 BRED2 BRED3 BRED4 BRED5 BRED6 BRED7 BCLK VODD PWM0 P2.7/PWM2 P2.6/PWM1 P3.3 INT0#/P3.2 DDCSCL DDCSDA GNDO P2.5/TCON16 DBBLU0 DBBLU1 VCC3IO DBBLU2 GNDO DBBLU3 DBBLU4 DBBLU5 DBBLU6 DBBLU7 GNDIK DBGRN0 DBGRN1 DBGRN2 VCCK DBGRN3 VCC3IO DBGRN4 GNDO DBGRN5 DBGRN6 DBGRN7 DBRED0 DBRED1 DBRED2 GNDIK DBRED3 VCCK DBRED4 DBRED5 VCC3IO DBRED6 GNDO DBRED7 REFCLK/OCLK DABLU0 DABLU1 DABLU2 DABLU3 VCCK DABLU4 DABLU5 GNDIK DABLU6 VCC3IO DABLU7 GNDO DAGRN0 DAGRN1 DAGRN2 DAGRN3
Realtek RTD2020
VCC3IO EXT# ADC_VDD ADC_VDD ADC_GND ADC_GND ADC_VDD ADC_VDD ADC_GND ADC_GND ADC_TEST ADC_VDD ADC_VDD ADC_REFIO ADC_GND ADC_GND WE#/P0.4 ROM_ADDR_BANK GNDIK ROM_ADDR15 VCCK ROM_ADDR14 ROM_ADDR13 ROM_ADDR12 GNDIK ROM_ADDR11 VCCK ROM_ADDR10 GNDO ROM_ADDR9 ROM_ADDR8 VCC3IO ROM_ADDR7 ROM_ADDR6 ROM_ADDR5 ROM_ADDR4 ROM_ADDR3 ROM_ADDR2 ROM_ADDR1 ROM_ADDR0 ROM_DATA0 ROM_DATA1 ROM_DATA2 ROM_DATA3 GNDO ROM_DATA4 ROM_DATA5 VCC3IO ROM_DATA6
2002/11/12
DAGRN4 DAGRN5 DAGRN6 GNDO DAGRN7 DARED0 DARED1 VCC3IO DARED2 GNDIK DARED3 VCCK DARED4 DARED5 DARED6 DARED7 DEN/TCON4 DVS/TCON5 DHS/TCON6 VCC3IO DCLK/ECLK GNDO P1.0/TCON0 P1.1/TCON1 P1.2/TCON2 VCCK P1.3/TCON3 GNDIK T0#/P3.4/SCSB T1#/P3.5/SCLK P3.6/SDI P3.7/SDO INT1#/P3.1/IRQ# P3.0/PWDN# RESET# PLL_VDD PLL_GND PLL_GND PLL_GND PLL_VDD PLL_VDD PLL_TEST1 PLL_TEST2 PLL_GND PLL_GND PLL_VDD PLL_VDD PLL_GND PSEN# ROM_DATA7
RTD2020 Pin-Out Diagram
Rev.1.20
RTD2020
Descriptions
order reduce count, therefore size cost, some pins have multiple functions. those cases, functions separated with symbol. Refer Assignment diagram graphical representation. Analog Power Input Ground Output
Name ADC_REFIO ADC_TEST ADC_VDD Type 141,142 147,148 153,154 138,139 144,145 150,151 Description Reference Test Analog Input from BLUE Channel Analog Input from GREEN Channel Analog Input from Channel Analog Power
ADC_GND
Analog Ground
Total: Pins
Name PLL_TEST1 PLL_TEST2 PLL_VDD Type 88,94 95,100 89,90 91,98 99,102 Description Reference Clock Input Reference Clock Output Test Test Analog Power
PLL_GND
Analog Ground
Total: Pins
2002/11/12
Rev.1.20
RTD2020
Control Interface
Name (EXT# =0): SCSB (EXT# =1): GPIO_P3.4 (EXT# =0): SCLK (EXT# =1): GPIO_P3.5 (EXT# =0): (EXT# =1): GPIO_P3.6 (EXT# =0): (EXT# =1): GPIO_P3.7 (EXT# =0): IRQ# (EXT# =1): GPIO_P3.1 (EXT# =0): PWDN# (EXT# =1): GPIO_P3.0 RESET# Type Description Serial Control Chip Select GPIO_P3.4
Serial Control Clock GPIO_P3.5
Serial Control Data GPIO_P3.6 Serial Control Data GPIO_P3.7 Controller's IRQ# Output; GPIO_P3.1 INT#1
PowerDown# Controller GPIO_P3.0
(EXT#=0): RESET# Controller; (EXT#=1): RESET# Total: Pins
2002/11/12
Rev.1.20
RTD2020
Digital Input
Name VODD BENA BCLK BRED/YIN [7:0] DVODATA [11:4] VIDEO8 BGRN [7:0] DVODATA [3:0] Type 172,173 174,175 176,177 178,179 181,182 184,185 186,187 188,189 190,191 192,193 194,195 196,197 Description VGA-port Horizontal Sync VGA-port Vertical Sync Video Signal VGB-port Horizontal Sync VGB-port Vertical Sync VGB-port Input Data Enable VGB-port Input Clock VGB-port Input Data (Red/Y)
VGB-port Input Data (Green)
BBLU/UVIN [7:0]
VGB-port Input Data (Blue/UV)
Total: Pins
Display Port
Name DCLK DARED [7:0] Type Description Display clock; TCON_ECLK Display Horizontal Sync; TCON_6 Display Vertical Sync; TCON_5 Display Data Enable; TCON_4 Display A-port Data
DAGRN [7:0]
Display A-port GREEN Data
DABLU [7:0]
Display A-port BLUE Data
DBRED [7:0]
Display B-port Data
DBGRN [7:0]
Display B-port GREEN Data
DBBLU [7:0]
Display B-port BLUE Data Total: Pins
2002/11/12
Rev.1.20
RTD2020
Miscellaneous Interface
Name REFCLK PWM_0 Type Description In/out Test DCLK; TCON_OCLK PWM_0 Output Total: Pins
Channel
Name DDCSDA DDCSCL Type Description Serial Control Data Input Serial Control Data Output Serial Control Clock Total: Pins
Power Ground
Name 3.3V Power Type 106,122 109,125 78,127 133,180 80,129 135,183 Description VCC3IO:
3.3V Ground
GNDO:
2.5V Power
VCCK:
2.5V Ground
GNDIK:
Total: Pins
2002/11/12
Rev.1.20
RTD2020
Interface
Name
PSEN# ROM_DATA [7:0] ROM_ADDR [15:9] ROM_ADDR [8:0] ROM_ADDR_BA GPIO_P0.4 EXT# GPIO_P1.0 GPIO_P1.1 GPIO_P1.2 GPIO_P1.3 GPIO_P1.4 GPIO_P1.5 GPIO_P1.6 GPIO_P1.7 GPIO_P2.0 GPIO_P2.1 GPIO_P2.2 GPIO_P2.3 GPIO_P2.4 GPIO_P2.5 GPIO_P2.6 GPIO_P2.7 (EXT# =0): PWDN# (EXT# =1): GPIO_P3.0 (EXT# =0): IRQ# (EXT# =1): GPIO_P3.1 GPIO_P3.2 GPIO_P3.3 (EXT# =0): SCSB (EXT# =1): GPIO_P3.4 (EXT# =0): SCLK (EXT# =1): GPIO_P3.5 (EXT# =0): (EXT# =1): GPIO_P3.6 (EXT# =0): (EXT# =1): GPIO_P3.7
104,105,107 108,110,111 112,113 134,132,131 130,128,126 123,121,120 119,118,117 116,115,114 Share Program Load Enable Data Input
Description
Address Output DDC_CA latch Address Output
XDATA/PROG# Bank Select GPIO_P0.4 External MCU, Internal Disable GPIO_P1.0 TCON_0 GPIO_P1.1 TCON_1 GPIO_P1.3 TCON_2 GPIO_P1.3 TCON_3 GPIO_P1.4 TCON_7 GPIO_P1.5 TCON_8 GPIO_P1.6 TCON_9 GPIO_P1.7 TCON_10 GPIO_P2.0 TCON_11 GPIO_P2.1 TCON_12 GPIO_P2.2 TCON_13 GPIO_P2.3 TCON_14 GPIO_P2.4 TCON_15 GPIO_P2.5 TCON_16 GPIO_P2.6 PWM1 GPIO_P2.7 PWM2 PowerDown# Controller GPIO_P3.0
Share
Controller's IRQ# output; GPIO_P3.1 INT1# GPIO_P3.2 INT0# GPIO_P3.3 Serial control chip select GPIO_P3.4 Serial control clock GPIO_P3.5 Serial control data GPIO_P3.6 Serial control data GPIO_P3.7
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Share
Share
Share
Total: pins share)
2002/11/12
Rev.1.20
RTD2020
Realtek Semiconductor Corp.
Headquarters Industry East Road Science-based Industrial Park, Hsinchu, 300, Taiwan, R.O.C. 886-3-5780211 886-3-5776047 WWW: www.realtek.com.tw
2002/11/12
Rev.1.20

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