BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS Intended originally dr
|
|
|
Top Searches for this datasheet
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
Intended originally drive thermal printheads, UCN5832A UCN5832EP have been optimized output-saturation voltage, high-speed operation, configurations most convenient tight space requirements high-resolution printheads. These integrated circuits also used drive multiplexed displays incandescent lamps peak current. combination bipolar technologies gives BiMOS arrays interface flexibility beyond reach standard buffers power driver circuits. devices each have bipolar open-collector saturated drivers, CMOS data latch each drivers, 16-bit CMOS shift registers, CMOS control circuitry. high-speed CMOS shift registers latches allow operation with most microprocessor based systems. these drivers with require input pull-up resistors ensure input logic high. serial data outputs permit cascading interface applications requiring additional drive lines. UCN5832A supplied 40-pin dual in-line plastic package with 0.600" (15.24 spacing. Under normal operating conditions, this device will allow outputs sustain continuously without derating. UCN5832EP supplied 44-lead plastic leaded chip carrier minimum area, surface-mount applications. Both devices also available operation from -40°C +85°C. order, change prefix from `UCN' `UCQ'. Similar 32-bit serial-input latched source drivers available UCN5818AF/EPF. Other high-voltage, high-current 8-bit devices available UCN5821A, UCN5841A/LW, UCN5842A.
Data Sheet 26185.10B
UCN5832A
LOGIC SUPPLY SERIAL DATA GROUND STROBE
REGISTER REGISTER LATCHES
CLOCK SERIAL DATA OUTPUT ENABLE
LATCHES
INTERNAL CONNECTION
Dwg. A-12,377A
ABSOLUTE MAXIMUM RATINGS
+25°C Free-Air Temperature
Output Voltage, VOUT Logic Supply Voltage, Input Voltage Range, -0.3 Continuous Output Current, lOUT Package Power Dissipation, Graph Operating Temperature Range, -20°C Storage Temperature Range, -55°C +150°C
Caution: CMOS devices have input-static protection susceptible damage when exposed extremely high static electrical charges.
FEATURES
Data Input Rate Low-Power CMOS Logic Latches Current Sink Outputs Saturation Voltage Automotive Capable
Always order complete part number: Part Number UCN5832A UCN5832EP Package 40-Pin 44-Lead PLCC
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
ALLOWABLE PACKAGE POWER DISSIPATION WATTS
FUNCTIONAL BLOCK DIAGRAM
SUFFIX 'A',
36°C/W
CLOCK 32-BIT SHIFT REGISTER
SERIAL DATA LATCHES
SERIAL DATA
SUFFIX 'EP', 46°C/W
STROBE
OUTPUT ENABLE BIPOLAR
OUT1 OUT2 OUT3 GROUND OUT30 OUT31 OUT32
AMBIENT TEMPERATURE
Dwg. GP-025A
UCN5832EP
SERIAL DATA GROUND
STROBE
OUTPUT ENABLE
LOGIC SUPPLY
SERIAL DATA
CLOCK
OUT32
OUT1
OUT31
SHIFT REGISTER
SHIFT REGISTER
LATCHES
LATCHES
OUT21
OUT12
Dwg. A-14,360
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright 1984, 1998, Allegro MicroSystems, Inc.
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS +25°C, (unless otherwise noted).
Characteristic Output Leakage Current Collector-Emitter Saturation Voltage Symbol ICEX VCE(SAT) Test Conditions VOUT 70°C lOUT lOUT package lOUT "EP" package Input Voltage VIN(1) VIN(0) Input Current lIN(1) lIN(0) Input lmpedance Serial Data Output Resistance Supply Current ROUT output lOUT outputs Output Rise Time Output Fall Time lOUT lOUT Min. -0.3 Limits Max. +0.8 -1.0 Units
NOTE: Positive (negative) current defined going into (coming specified device pin.
TYPICAL INPUT CIRCUIT
TYPICAL OUTPUT DRIVER
Dwg. A-12,379A
Dwg. A-12,380A
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
CLOCK DATA STROBE OUTPUT ENABLE OUTN
Dwg. A-12,276A
Serial Data present input transferred shift register logic logic transition CLOCK input pulse. succeeding CLOCK pulses, registers shift data information towards SERIAL DATA OUTPUT. SERIAL DATA must appear input prior rising edge CLOCK input waveform. Information present register transferred respective latch when STROBE high (serial-to-parallel conversion). latches will continue accept data long STROBE held high. Applications where latches bypassed (STROBE tied high) will require that OUTPUT ENABLE input during serial data entry. When OUTPUT ENABLE input low, output buffers disabled (OFF) without affecting information stored latches shift register. With OUTPUT ENABLE input high, outputs controlled state latches.
TIMING CONDITIONS
(VDD Logic Levels Ground)
Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) Minimum Data Active Time After Clock Pulse (Data Hold Time) Minimum Data Pulse Width Minimum Clock Pulse Width Minimum Time Between Clock Activation Strobe Minimum Strobe Pulse Width Typical Time Between Strobe Activation Output Transition
TRUTH TABLE
Serial Shift Register Contents Data Clock Input Input IN-1 RN-2 RN-1 RN-2 RN-1 RN-1 PN-1 Serial Data Strobe Output Input RN-1 RN-1
Logic Level High Logic Level Irrelevant
Latch Contents IN-1
Output Enable Input
Output Contents IN-1
RN-1 PN-1 PN-1
Present State
Previous State
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
UCN5832A
Dimensions Inches (controlling dimensions)
0.015 0.008
0.700
0.580 0.485
0.600
0.070 0.030
2.095 1.980
0.100
0.005
0.250
0.015
0.200 0.115 0.022 0.014
Dwg. MA-003-40
Dimensions Millimeters (for reference only)
0.381 0.204
17.78 14.73 12.32
15.24
1.77 0.77
53.2 50.3
2.54
0.13
6.35
0.39
5.08 2.93 0.558 0.356
Dwg. MA-003-40
NOTES: Lead thickness measured seating plane below. Lead spacing tolerance non-cumulative. Exact body lead configuration vendor's option within limits shown.
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
UCN5832EP
Dimensions Inches (controlling dimensions)
0.319 0.291 0.021 0.013 0.695 0.685 0.656 0.650 0.319 0.291 0.050
INDEX AREA
0.032 0.026
0.020
0.656 0.650 0.695 0.685
Dwg. MA-005-44A
0.180 0.165
Dimensions Millimeters (for reference only)
8.10 7.39 0.533 0.331 17.65 17.40 16.662 16.510
INDEX AREA
0.812 0.661
8.10 7.39 1.27
0.51
4.57 4.20
16.662 16.510 17.65 17.40
Dwg. MA-005-44A
NOTES: Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
5832 BiMOS 32-BIT SERIAL-INPUT, LATCHED DRIVERS
BiMOS (Series 5800) DABiC (Series 6800) INTELLIGENT POWER INTERFACE DRIVERS SELECTION GUIDE
Function
8-Bit (saturated drivers) 8-Bit 8-Bit 8-Bit 8-Bit 9-Bit 10-Bit (active pull-downs) 12-Bit (active pull-downs) 20-Bit (active pull-downs) 32-Bit (active pull-downs) 32-Bit 32-Bit (saturated drivers)
Output Ratings
SERIAL-INPUT LATCHED DRIVERS -120
Part Number
5895 5821 5822 5841 5842 5829 5810-F 6809/10 5811 6811 5812-F 6812 5818-F 6818 5833
PARALLEL-INPUT LATCHED DRIVERS 4-Bit 8-Bit 8-Bit 5800 5815 5801
SPECIAL-PURPOSE FUNCTIONS Unipolar Stepper Motor Translator/Driver Addressable 28-Line Decoder/Driver
1.25
5804 6817
Current maximum specified test condition, voltage maximum rating. specification sustaining voltage limits. Negative current defined coming (sourcing) output. Complete part number includes additional characters indicate operating temperature range package style. Internal transient-suppression diodes included inductive-load protection.
Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements design products. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringements patents other rights third parties which result from use.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
Other recent searches
SB320 - SB320 SB320 Datasheet
SB3100 - SB3100 SB3100 Datasheet
MPC603E7TEC - MPC603E7TEC MPC603E7TEC Datasheet
M74HCT646 - M74HCT646 M74HCT646 Datasheet
HY5PS2G431M - HY5PS2G431M HY5PS2G431M Datasheet
HY5PS2G831M - HY5PS2G831M HY5PS2G831M Datasheet
GP2W0004YP - GP2W0004YP GP2W0004YP Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
