PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT SCPS123A
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REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
FEATURES
Standby-Current Consumption Parallel-Port Expander Open-Drain Interrupt Output Compatible With Most Microcontrollers 400-kHz Fast Address Three Hardware Address Pins Eight Devices
DBQ, DGV, PACKAGE (TOP VIEW)
Latched Outputs With High-Current Drive Capability Directly Driving LEDs Latch-Up Performance Exceeds JESD Class Protection Exceeds JESD 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
PACKAGE (TOP VIEW)
PACKAGE (TOP VIEW)
PCF8575C PF575C PCF8575C PF575C PF575C PREVIEW PREVIEW
DESCRIPTION/ORDERING INFORMATION
This 16-bit expander two-line bidirectional (I2C) designed 4.5-V 5.5-V operation. ORDERING INFORMATION
QSOP TVSOP SOIC SSOP PACKAGE Reel 2500 Reel 2000 Tube Reel 2000 Tube Reel 2000 Tube TSSOP Reel 1200 Reel Reel 3000 Reel 1000 ORDERABLE PART NUMBER PCF8575CDBQR PCF8575CDGVR PCF8575CDW PCF8575CDWR PCF8575CDB PCF8575CDBR PCF8575CPW PCF8575CPWR PCF8575CPWT PCF8575CRGER PCF8575CRHLR TOP-SIDE MARKING
-40°C 85°C
Package drawings, standard packing quantities, thermal data, symbolization, design guidelines available www.ti.com/sc/package.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 2005, Texas Instruments Incorporated
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
PCF8575C provides general-purpose remote expansion most microcontroller families interface serial clock (SCL) serial data (SDA). device features 16-bit quasi-bidirectional input/output (I/O) port (P07-P00, P17-P10), including latched outputs with high-current drive capability directly driving LEDs. Each quasi-bidirectional used input output without data-direction control signal. power I/Os 3-state mode. strong pullup allows fast-rising edges into heavily loaded outputs. This device turns when output written high switched negative edge SCL. I/Os should high before being used inputs. After power I/Os 3-state, them used inputs. change setting I/Os either inputs outputs done with write mode. high applied externally that been written earlier low, large current (IOL) flows GND. PCF8575C provides open-drain interrupt (INT) output, which connected interrupt input microcontroller. interrupt generated rising falling edge port inputs input mode. After time (tiv), signal valid. Resetting reactivating interrupt circuit achieved when data port changed original setting, data read from written port that generated interrupt. Resetting occurs read mode acknowledge (ACK) after rising edge signal write mode after falling edge signal. Interrupts that occur during clock pulse lost very short), resetting interrupt during this pulse. Each change I/Os after resetting detected transmitted INT. Reading from writing another device does affect interrupt circuit. sending interrupt signal this line, remote inform microcontroller there incoming data ports, without having communicate bus. Thus, PCF8575C remain simple slave device. Every data transmission from PCF8575C must consist even number bytes. first data byte every pair refers port (P07-P00), second data byte every pair refers port (P17-P10). write ports (output mode), master first addresses slave device, setting last byte containing slave address logic PCF8575C acknowledges master sends first data byte P07-P00. After first data byte acknowledged PCF8575C, second data byte (P17-P10) sent master. Once again, PCF8575C acknowledges receipt data, after which this 16-bit data presented port lines. number data bytes that sent successively limited. After every bytes, previous data overwritten. When PCF8575C receives pairs data bytes, first byte referred P07-P00 second byte P17-P10. third byte referred P07-P00, fourth byte P17-P10, Before reading from PCF8575C, ports desired input should logic read from ports (input mode), master first addresses slave device, setting last byte containing slave address logic data bytes that follow values ports. data input port changes faster than master read, this data lost. When power applied VCC, internal power-on reset holds PCF8575C reset state until reached VPOR. that time, reset condition released, device I2C-bus state machine initializes default state. hardware pins (A0, used program vary fixed address, allow eight devices share same SMBus. fixed address PCF8575C same PCF8575, PCF8574, PCA9535, PCA9555, allowing eight these devices, combination, share same SMBus.
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
FUNCTIONS
DBQ, DGV, NAME FUNCTION Interrupt output. Connect through pullup resistor. Address input Connect directly ground. Pullup resistors needed. Address input Connect directly ground. Pullup resistors needed. P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output Ground P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output P-port input/output Address input Connect directly ground. Pullup resistors needed. Serial clock line. Connect through pullup resistor Serial data line. Connect through pullup resistor. Supply voltage
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
PCF8575C Interrupt Logic Filter
Input Filter I2C-Bus Control Shift Register Bits Port P17-P10 P07-P00
Write Pulse Power-On Reset Read Pulse
SIMPLIFIED SCHEMATIC DIAGRAM EACH P-PORT INPUT/OUTPUT
Write Pulse
IOHT Data From Shift Register Power-On Reset P07-P00 P17-P10
Read Pulse
Interrupt Logic
Data Shift Register
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
INTERFACE
bidirectional consists serial clock (SCL) serial data (SDA) lines. Both lines must connected positive supply pullup resistor when connected output stages device. Data transfer initiated only when busy. communication with this device initiated master sending start condition, high-to-low transition input/output while input high (see Figure After start condition, device address byte sent, first, including data direction (R/W). This device does respond general call address. After receiving valid address byte, this device responds with ACK, input/output during high ACK-related clock pulse. address inputs (A2-A0) slave device must changed between start stop conditions. data byte follows address ACK. high, data from this device values read from port. low, data from master, output port. data byte followed sent from this device. other data bytes sent from master, following ACK, they ignored this device. Data output only complete bytes received acknowledged. output data valid time (tpv) after low-to-high transition SCL, during clock cycle ACK. bus, only data transferred during each clock pulse. data line must remain stable during high pulse clock period, changes data line this time interpreted control commands (start stop) (see Figure stop condition, low-to-high transition input/output while input high, sent master (see Figure number data bytes transferred between start stop conditions from transmitter receiver limited. Each byte eight bits followed bit. transmitter must release line before receiver send bit. slave receiver that addressed must generate after reception each byte. Also, master must generate after reception each byte that been clocked slave transmitter. device that acknowledges pull down line during clock pulse that line stable during high pulse ACK-related clock period (see Figure Setup hold times must taken into account. master receiver must signal data transmitter generating acknowledge (NACK) after last byte that been clocked slave. This done master receiver holding line high. this event, transmitter must release data line enable master generate stop condition.
Start Condition
Stop Condition
Figure Definition Start Stop Conditions
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
Data Line Stable; Data Valid Change Data Allowed
Figure Transfer
Data Output Transmitter NACK Data Output Receiver
from Master Start Condition
Clock Pulse Acknowledgment
Figure Acknowledgement INTERFACE DEFINITION TABLE
BYTE slave address data data (MSB) (LSB)
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
Figure Figure show address timing diagrams write read modes, respectively.
Integral Multiples Bytes
Start Condition Slave Address (PCF8575C)
From Slave Data Port
From Slave Data Port
From Slave
Write Port
Data Output Voltage
Data Valid
Output Voltage Pullup Output Current
IOHT
Figure Write Mode (Output)
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
From Slave
From Master
From Master
Read From Port
Data Into Port
low-to-high transition while high defined stop condition (P). transfer data stopped moment stop condition. When this occurs, data present latest phase valid (output mode). Input data lost.
Figure Read Mode (Input) ADDRESS REFERENCE TABLE
INPUTS SLAVE ADDRESS (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal) (decimal), (hexadecimal)
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Supply voltage range Input voltage range Output voltage range package package package Package thermal impedance package package package package Tstg Storage temperature range Input clamp current Output clamp current Input/output clamp current Continuous output current Continuous output high current Continuous current through -0.5 -0.5 -0.5 ±400 ±100 °C/W UNIT
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. input negative-voltage output voltage ratings exceeded input output current ratings observed. package thermal impedance calculated accordance with JESD 51-7.
Recommended Operating Conditions
IOHT Supply voltage High-level input voltage Low-level input voltage P-port transient pullup current P-port low-level output current Operating free-air temperature SDA, P07-P00 P17-P10 SDA, P07-P00 P17-P10 -0.5 -0.5 UNIT
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOHT Input diode clamp voltage P-port transient pullup current port IIHL SCL, port Operating mode Standby mode Supply current increase port GND, GND, GND, fSCL fSCL High during VPOR Power-on reset voltage TEST CONDITIONS VPOR -0.5 ±400 -1.2 UNIT
input Other inputs
typical values 25°C. power-on reset circuit resets logic with VPOR sets I/Os logic high (with current source VCC).
Interface Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure
fscl tsch tscl tsds tsdh ticr ticf tocf tbuf tsts tsth tsps clock frequency 0.1Cb 0.1Cb
UNIT
clock high time clock time spike time serial-data setup time serial-data hold time input rise time input fall time output fall time (10-pF 400-pF bus) free time between stop start start repeated start condition setup start repeated start condition hold stop condition setup Valid-data time capacitive load output valid
total capacitance line
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
Switching Characteristics
over recommended operating free-air temperature range, (unless otherwise noted) (see Figure Figure
PARAMETER Interrupt valid time Interrupt reset delay time Output data valid Input data setup time Input data hold time FROM (INPUT) port port port (OUTPUT) port UNIT
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
TYPICAL OPERATING CHARACTERISTICS
25°C (unless otherwise noted)
Supply Current Temperature
Supply Current (µA) Temperature (°C) fSCL I/Os unloaded Supply Current (µA)
Standby Supply Current Temperature
I/Os unloaded Supply Current (µA) Temperature (°C)
Supply Current Supply Voltage
fSCL I/Os unloaded
Supply Voltage
Sink Current Output Voltage
Output Voltage Temperature
High Voltage Temperature
-40_C 25_C (mV) ISINK
ISINK (mA)
ISINK
125_C
ISOURCE
Temperature (°C)
Temperature (°C)
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION
LOAD CONFIGURATION
Bytes Complete Device Programming Stop Condition Start Address Address Condition (MSB) tscl tsch ticr tbuf ticf tsth Start Repeat Start Condition VOLTAGE WAVEFORMS BYTE DESCRIPTION address P-port data ticr tsds tsdh Repeat Start Condition tsps Stop Condition ticf tPHL tPLH tsts Address (LSB) Data (MSB) Data (LSB) Stop Condition
Figure Interface Load Circuit Voltage Waveforms
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION
INTERRUPT LOAD CONFIGURATION
From Slave Start Condition Slave Address (PCF8575) Bits Data Bytes) From Port Data
From Slave Data From Port Data
Data
Data Into Port Address Data Data tsps
Data
View
View
Figure Interrupt Load Circuits Voltage Waveforms
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
PARAMETER MEASUREMENT INFORMATION
LOAD CONFIGURATION
INTERRUPT LOAD CONFIGURATION
P-PORT LOAD CONFIGURATION
Slave
Write-Mode Timing (R/W
Read-Mode Timing (R/W
Figure P-Port Timing Waveforms
Unstable Data
Last Stable
PCF8575C REMOTE 16-BIT SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
THERMAL MECHANICAL DATA (S-PQFP-N24)
REMOTE 16-BIT
PCF8575C SMBus LOW-POWER EXPANDER WITH INTERRUPT OUTPUT
SCPS123A MARCH 2005 REVISED SEPTEMBER 2005
THERMAL MECHANICAL DATA (S-PQFP-N24)
PACKAGE OPTION ADDENDUM
8-Sep-2005
PACKAGING INFORMATION
Orderable Device PCF8575CDB PCF8575CDBE4 PCF8575CDBQR PCF8575CDBQRE4 PCF8575CDBR PCF8575CDBRE4 PCF8575CDGVR PCF8575CDGVRE4 PCF8575CDW PCF8575CDWE4 PCF8575CDWR PCF8575CDWRE4 PCF8575CPW PCF8575CPWE4 PCF8575CPWR PCF8575CPWRE4
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type SSOP SSOP SSOP/ QSOP SSOP/ QSOP SSOP SSOP TVSOP TVSOP SOIC SOIC SOIC SOIC TSSOP TSSOP TSSOP TSSOP
Package Drawing
Pins Package Plan Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU
Peak Temp Level-1-260C-UNLIM Level-1-260C-UNLIM Level-2-260C-1YEAR Level-2-260C-1YEAR Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br)
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS) Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature.
Addendum-Page
PACKAGE OPTION ADDENDUM
8-Sep-2005
Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MPDS006C FEBRUARY 1996 REVISED AUGUST 2000
(R-PDSO-G**)
PINS SHOWN 0,23 0,13
PLASTIC SMALL-OUTLINE
0,40
0,07
0,16 4,50 4,30 6,60 6,20
Gage Plane
0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,08
PINS
3,70 3,50
3,70 3,50
5,10 4,90
5,10 4,90
7,90 7,70
9,80 9,60
11,40 11,20
4073251/E 08/00 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion, exceed 0,15 side. Falls within JEDEC: 24/48 Pins MO-153 14/16/20/56 Pins MO-194
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E JANUARY 1995 REVISED DECEMBER 2001
(R-PDSO-G**)
PINS SHOWN 0,65 0,38 0,22 0,15
PLASTIC SMALL-OUTLINE
0,25 0,09 5,60 5,00 8,20 7,40
Gage Plane 0,25 0,95 0,55
Seating Plane 2,00 0,05 0,10
PINS
6,50
6,50
7,50
8,50
10,50
10,50
12,90
5,90
5,90
6,90
7,90
9,90
9,90
12,30 4040065 12/01
NOTES:
linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-150
POST OFFICE 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
POST OFFICE 655303
DALLAS, TEXAS 75265
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