Application Note 2094: 2003 Simple Comparison Matrix Maxim m

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Application Note 2094: 2003 Simple Comparison Matrix Maxim m

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CONVERSION/SAMPLING CIRCUITS HIGH-SPEED SIGNAL PROCESSING
Application Note 2094: 2003
Simple Comparison Matrix
Maxim manufactures analog-to-digital converters (ADCs) using popular architectures. Deciding correct requires tradeoffs between resolution, channel count, power consumption, size, conversion time, static performance, dynamic performance, price. Designers need know features, have basic understanding architectures their design limitations. This application note provides overview architectures. includes links application notes that provide more detail handy comparison table that compares features characteristics.
Integrating ADCs
Integrating ADCs provide high resolution provide good line frequency noise rejection. Having started with ubiquitous ICL7106, these converters have been around quite some time. integrating architecture provides novel straightforward approach converting bandwidth analog signal into digital representation. These type converters often include built-in drivers displays found many portable instrument applications, including digital panel meters digital multi-meters. View Specification Table
FLASH ADCs
Flash analog-to-digital converters, also known parallel ADCs, fastest convert analog signal digital signal. They suitable applications requiring very large bandwidths. However, flash converters consume power, have relatively resolution, quite expensive. This limits them high frequency applications that typically cannot addressed other way. Examples include data acquisition, satellite communication, radar processing, sampling oscilloscopes, high-density disk drives. View Specification Table
Pipelined ADCs
pipelined analog-to-digital converter (ADC) become most popular architecture sampling rates from megasamples second (MS/s) 100MS/s+, with resolutions from bits. They offer resolution sampling rate cover wide range applications, including imaging, ultrasonic medical imaging, digital receiver, base station, digital video (for example, HDTV), xDSL, cable modem, fast Ethernet. View Specification Table
(SAR) analog-to-digital converters (ADCs) frequently architecture choice medium-to-high-resolution applications, typically with sample rates fewer than megasamples second (Msps). ADCs most commonly range resolution from bits provide power consumption well small form factor. This combination makes them ideal wide variety applications, such portable/battery-powered instruments, digitizers, industrial controls, data/signal acquisition. View Specification Table
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Sigma Delta
Sigma Delta analog-to-digital converters (ADCs) used predominately lower speed applications requiring trade speed resolution oversampling, followed filtering reduce noise. Sigma Delta converters common Audio designs, instrumentation Sonar. Bandwidths typically less than 1MHz with range true bits. View Specification Table
Step
Step analog-to-digital converters (ADCs) also known subranging converters sometimes referred multi-step half flash (slower than Flash architecture). This cross between Flash pipeline achieve higher resolution smaller size power given resolution needed Flash ADC. Example MAX153.
Maxim Application Notes
Understanding Flash ADCs Understanding Integrating ADCs Pipeline ADCs Come Understanding ADCs Demystifying Sigma-Delta ADCs
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FLASH (Parallel) Ultra-High Speed when Pick This power Architecture consumptio want: primary concern? bits Comparators Conversion Caps Method increase factor each bit. Thermometer Encoding Code Method Encoding Sparkle codes metastability, Disadvantages high power consumption, large size, expensive. Conversion Time does change Conversion with Time increased resolution. Component matching typically limits resolution bits. 2^N-1 comparators, size power increases exponentially with resolution.
Medium high resolution 16bit), 5Msps under, power, small size. Binary search algorithm, internal circuitry runs higher speed.
DUAL SLOPE (Integrating ADC) Monitoring signals, high resolution, power consumption, good noise performance ICL7106. Unknown input voltage integrated value compared against known reference value.
PIPELINE High speeds, Msps 100+ Msps, bits bits, lower power consumption than flash.
SIGMA DELTA
High resolution, medium speed, precision external components, simultaneous 50/60Hz rejection, digital filter reduces anti-aliasing requirements.
Small parallel Oversampling ADC, 5-Hz 60Hz structure, each rejection programmable data stage works output. bits.
Successive Analog Approximation Integration Speed limited ~5Msps. require anti-aliasing filter. Slow Conversion rate. High precision external components required achieve accuracy.
Digital Over-Sampling Modulator, Correction Logic Digital Decimation Filter Parallelism increases Higher order (4th order higher) throughput multibit multibit expense power feedback DAC. latency.
Increases linearly with increased resolution. Component matching requirements double with every increase resolution.
Conversion time Increases linearly Tradeoff between data output rate doubles with with increased every increase noise free resolution. resolution. resolution. Component matching Component matching requirements requirements double with every double with every increase resolution. increase resolution.
Resolution
Component matching does increase with increase resolution.
Size
increases linearly with increase resolution.
Core size will materially change with increase resolution.
increases linearly with increase resolution.
Core size will materially change with increase resolution.
MORE INFORMATION ICL7106: QuickView MAX153: QuickView www.maxim-ic.com/an2094
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Application Note 2094: 2003 Simple Comparison Matrix Maxim m

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