Application Note 1870: 2003 Demystifying Sigma-Delta ADCs This in
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CONVERSION/SAMPLING CIRCUITS TEMPERATURE SENSORS
Application Note 1870: 2003
Demystifying Sigma-Delta ADCs This in-depth article covers theory behind Delta-Sigma analog-to-digital converter (ADC). specifically focuses difficult understand digital concepts over-sampling, noise shaping, decimation filtering. description converter, MAX1402, several applications Delta-Sigma converters included.
Sigma-delta converters offer high resolution, high integration, cost, making them good choice applications such process control weighing scales. Designers often choose classic instead, because they don't understand sigma-delta types. analog side sigma-delta converter 1-bit ADC) very simple. digital side, which what makes sigma-delta inexpensive produce, more complex. performs filtering decimation. understand works, must become familiar with concepts oversampling, noise shaping, digital filtering, decimation. This application note covers these topics. Oversampling First, consider frequency-domain transfer function traditional multi-bit with sine-wave input signal. This input sampled frequency According Nyquist theory, must least twice bandwidth input signal. When observing result analysis digital output, single tone lots random noise extending from Fs/2 (Figure Known quantization noise, this effect results from following consideration: input continuous signal with infinite number possible states, digital output discrete function whose number different states determined converter's resolution. conversion from analog digital loses some information introduces some distortion into signal. magnitude this error random, with values ±LSB.
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Figure diagram multi-bit with sampling frequency
divide fundamental amplitude frequencies representing noise, obtain signal noise ratio (SNR). N-bit ADC, 6.02N 1.76dB. improve conventional (and consequently accuracy signal reproduction) must increase number bits. Consider again above example, with sampling frequency increased oversampling ratio (Figure analysis shows that noise floor dropped. same before, noise energy been spread over wider frequency range. Sigma-delta converters exploit this effect following 1-bit with digital filter (Figure noise less, because most noise passes through digital filter. This action enables sigma-delta converters achieve wide dynamic range from low-resolution ADC.
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Figure diagram multi-bit with sampling frequency
Figure Effect digital filter noise bandwidth
Does improvement come simply from oversampling filtering? Note that 1-bit 7.78dB (6.02 1.76). Each factor-of-4 oversampling increases 6dB, each increase equivalent gaining bit. 1-bit with oversampling achieves resolution four bits, achieve 16-bit resolution must oversample factor 415, which realizable. But, sigma-delta converters overcome
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this limitation with technique noise shaping, which enables gain more than each factor oversampling. Noise Shaping understand noise shaping, consider block diagram sigma-delta modulator first order (Figure includes difference amplifier, integrator, comparator with feedback loop that contains 1-bit DAC. (This simply switch that connects negative input difference amplifier positive negative reference voltage.) purpose feedback maintain average output integrator near comparator's reference level.
Figure Block diagram sigma-delta modulator
density "ones" modulator output proportional input signal. increasing input comparator generates greater number "ones," vice versa decreasing input. summing error voltage, integrator acts lowpass filter input signal highpass filter quantization noise. Thus, most quantization noise pushed into higher frequencies (Figure Oversampling changed total noise power, distribution.
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Figure Affect integrator sigma-delta modulator
apply digital filter noise-shaped delta-sigma modulator, removes more noise than does simple oversampling (Figure This type modulator (first-order) provides improvement every doubling sampling rate. higher orders quantization, achieve noise shaping including more than stage integration summing sigma-delta modulator. example, second-order sigma-delta modulator Figure provides 15dB improvement every doubling sampling rate. Figure shows relationship between order sigma-delta modulator amount over-sampling necessary achieve particular SNR.
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Figure Effect digital filter shaped noise
Figure Using more than integrator summing stage achieve higher order quantization noise
Figure Relationship between order sigma-delta modulator amount over-sampling necessary achieve particular
Digital Decimation Filter
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output sigma-delta modulator 1-bit data stream sampling rate, which megahertz range. purpose digital-and-decimation filter (Figure extract information from this data stream reduce data rate more useful value. sigma-delta ADC, digital filter averages 1-bit data stream, improves resolution, removes quantization noise that outside band interest. determines signal bandwidth, settling time, stopband rejection.
Figure Digital side sigma-delta modulator
sigma-delta converters, widely used filter topology that performs lowpass function Sinc3 type (Figure 10). main advantage this filter notch response, which (for example) reject line frequency when that frequency. notch position directly related output data rate (1/data-word period). SINC3 filter settles three data-word periods. With 60Hz notch (60Hz data rate) settling time 3/60Hz 50ms. applications that require lower resolution faster settling time, consider MAX1400 family, which gives choice filter type (SINC1 SINC3).
Figure Low-pass function performed Sinc3 filter
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settling time SINC1 filter data word. example above, 1/60Hz 16.7ms. Because bandwidth reduced digital output filter, output data rate satisfy Nyquist criterion even though lower than original sampling rate. This accomplished preserving certain input samples discarding rest. This process known decimation factor (the decimation ratio). have integer value, provided that output data rate more than twice signal bandwidth (Figure 11). input been sampled filtered-output data rate therefore reduced fs/M without loss information.
Figure Decimation does cause loss information
Sigma-Delta ADCs from Maxim Recent highly integrated sigma-delta ADCs manage small signals with minimum number external components. example this generation, MAX1402 chip includes many functions that called system-on-a-chip (Figure 12). Drawing quiescent current 250µA operating mode (2µA power -down mode), provides 16-bit accuracy 480sps 12-bit accuracy 4800sps.
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Figure MAX1402 block diagram
MAX1402 signal chain consists following: flexible input multiplexer that manage three fully differential signals five pseudo-differential signals, chopper amplifiers, programmable (with gain from 128), coarse remove system offset, second-order sigma-delta modulator. 1-bit data stream then filtered with integrated digital filter configurable SINC1 SINC3. conversion result made available SPITM/QSPITM-compatible, 3-wire serial interface. chip also includes fully differential input channels calibration offset gain, matched 200µA transducer-excitation currents (suitable 3-wire 4-wire applications), "burn-out" currents testing integrity selected transducer. device programmed serial interface access eight internal registers that select mode operation. Setting SCAN control enables chip read input channel either demand continually, input channel identified 3-bit "channel identification" attached each conversion result. Figure establishes correct input voltage range, which defined U/B-bar bit, Vref, PGA, settings. offset action performed when code equals "0000." With Vref 2.5V, example, full scale accommodated setting "1110," "000," U/B-bar "0."
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Figure MAX1402 input voltage-range setting
calibration channels (CALOFF CALGAIN) used correct measurement. this purpose, CALOFF inputs connected ground CALGAIN inputs connected reference voltage. averaged measurements performed these channels used following interpolation formula: Voltage [Vref (Code-CALOFF code)]/[(CALGAIN code-CALOFF code) gain]. Application Sigma-Delta ADCs Thermocouple Measurement with Cold-Junction Compensation eliminate noise pickup from thermocouple leads, MAX1402 this application (Figure uses buffered mode allow large decoupling capacitors front end. reduced common-mode range available this mode, necessary bias AIN2
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input reference voltage (2.5V). Thermocouple measurements present problem thermoelectric potential, created connecting thermocouple probe measurement instrument. This potential introduces temperature-dependent error that must subtracted from temperature measurement obtain accurate result.
Figure Thermocouple measurement with cold-junction compensation
Voltage measured instrument expressed (T1-Tref), where Seebeck constant thermocouple, temperature being measured, Tref temperature junction block. compensate Seebeck coefficient, thermocouple output) portion temperature-dependent voltage developed diode, acquire junction-block temperature calculate compensation with software. that arrangement, pn-junction temperature measured differential input channel AIN3-AIN4, biased 200µA internal current generator. 3-Wire 4-Wire Configuration demanding temperature measurements required process control favor platinum resistance temperature detectors (RTDs) because their excellent accuracy interchangeability. platinum produces +266°C.
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sensitivity very /266°C), applied excitation current 200µA produces 20mV 40mV +266°C. These signal levels handled directly MAX1402's analog input. measurement accuracy affected errors wiring resistance. traditional 2-wire configuration when located near converter, when located remotely, wiring resistance cause significant error adding impedance. Three-wire 4-wire configurations should used these types installation. matched 200µA current sources enable compensation errors 3-wire 4wire configurations. 3-wire case (Figure 15), these current sources, flowing RL2, ensure that differential voltage AIN1-AIN2 affected lead resistance. This holds true provided both leads same material equal length (RL1 RL2), that current sources have finely matched tempcos (the MAX1402 tempco 5ppm/°C).
Figure 3-Wire application
4-wire configuration lead-resistance error because current flows measurement leads connected AIN1 AIN2 (Figure 16). Current source OUT1 provides excitation current RTD, current source OUT2 provides current generate reference voltage. ratiometric configuration ensures that tempco errors (due
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temperature drift current source) compensated variation reference voltage.
Figure 4-Wire application
Smart 4-20mA Transmitter old-fashioned 4-20mA transmitter, field-mounted device senses physical parameter such pressure temperature, generates standard 4-20mA range) current proportional measured variable. Current loops provide advantages: measurement signal insensitive noise, power derived from remotely supplied voltage. response industry demand, second generation 4-20mA transmitters (called "smart" transmitters) were developed condition signal remotely, using microprocessor data converters. Smart devices normalize gain offset, they linearize sensors such RTDs thermocouples converting digital, processing with arithmetic algorithms converting back analog, transmitting standard current loop (Figure 17). Thirdgeneration "smart intelligent" 4-20mA transmitters smart device) digital communications that share twisted-pair line with 4-20mA signal. This communication channel also allows transmission control diagnostic signals. low-power device such
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MAX1402 suitable because 250µA supply current saves considerable power remaining transmitter circuitry.
Figure Intelligent 4-20mA transmitter
communication standard smart transmitters HART protocol. Based Bell telephone communication standard, HART employs frequency shift keying (FSK) principle. digital signal consists frequencies representing (1200Hz 2200Hz). provide simultaneous analog digital communications, sine waves these frequencies superimposed analog-signal cables (Figure 18). Because average value signal always zero, does affect 4-20mA analog signal. Response time digital communication signal allows approximately data updates second without interrupting analog signal. minimum loop impedance required communication.
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Figure Simultaneous analog digital communication
Summary Before advent highly integrated conditioning systems, process control implemented using several independent chips signal conditioning processing. alternative, Sigma-Delta approach lowers cost while minimizing board space power supply requirements (many applications require only single supply). Single-supply operation particular suitable battery-powered portable systems, fewer components improves system reliability.
similar version this article appeared August 2002 issue Sensors magazine.
MORE INFORMATION MAX1400: QuickView Full (PDF) Data Sheet (504k) Free Sample MAX1402: QuickView Full (PDF) Data Sheet (504k) Free Sample
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