2002 Selecting Optimum Test Tones Test Equipment Successful High-

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

2002 Selecting Optimum Test Tones Test Equipment Successful High-

Datasheet Thumbnail

Top Searches for this datasheet

CONVERSION/SAMPLING CIRCUITS BASESTATIONS WIRELESS INFRASTRUCTURE HIGH-SPEED SIGNAL PROCESSING
2002
Selecting Optimum Test Tones Test Equipment Successful High-Speed Sinewave Testing
earlier application note Coherent Sampling Window Sampling", covered basics coherent sampling. showed differences between tests performed with coherent sampling windowed sampling conditions. following technical discussion follow-up note, which deals with proper selection test tones instruments successfully test evaluate high-speed ADC's performance. ALSO SEE:
Application Note: Coherent Sampling Calculator (CSC) Coherent Sampling Calculator (XLS, 81K)
discussed earlier application note "Coherent Sampling Window Sampling", variety approaches used evaluate dynamic performance parameters, such signal-to-noise ratio (SNR), signal-to-noise distortion (SINAD), total harmonic distortion (THD), intermodulation distortion (IMD) spurious-free dynamic range (SFDR) high speed data converters. However, concept coherent sampling, frequency-based sinewave test, yields more accurate repeatable test results than using windowing method. sinewave-testing high-speed analog-to-digital converter (ADC), only imperative sample applied waveform continuously avoid unwanted artifacts spectrum, precisely select sampling frequency (fSAMPLE), input test tone (fIN), size data record (NRECORD). given clock frequency there exist certain input test tones, which hide errors, while other frequencies reveal errors. These frequencies vary only fraction percent yield vastly different results. optimum input test tone for, which there NRECORD distinct phases sampled, which uniformly distributed between radians. Taking this knowledge into account, coherent sampling described sampling periodic signal, where integer number cycles into predefined sampling window. Mathematically, this expressed (NWINDOW NRECORD) fSAMPLE, where continuous sinusoidal input signal, fSAMPLE ADC's clock/sample frequency, NWINDOW represents integer number cycles within sampling window, NRECORD number data points targeted sampling window FFT. Additionally important choose NRECORD large enough produce least representative sample every frequency bin2 converter. Given that input tone chosen previously discussed, ideal converter's transfer curve (excluding random noise) requires minimum value NRECORD where resolution data converter under test. There common ways calculate desired input tone. Following examples these methods based coherent sampling. Assuming that ADC, such MAX1190, driven with 120MHz clock, near optimum input frequency 17MHz analyzed with 8192-point record, following steps provide guidance selecting appropriate input test tone.
Start with 17MHz fSAMPLE 120MHz determine window size NWINDOW (remember that according previous discussion, NWINDOW integer mutually prime number) 8192point data record NRECORD. NWINDOW (fIN fSAMPLE) NRECORD NWINDOW (17MHz 120MHz) 8192 1160 Based above result NWINDOW, next closest mutually prime (odd) number 1163 (1161). either these numbers compute final, near-optimum input test tone follows fSAMPLE (NWINDOW NRECORD) fIN(MUTUALLY_PRIME) 120MHz (1163 8192) 17.0361328MHz fIN(ODD) 120MHz (1161 8192) 17.0068359MHz Unfortunately, this very method will require high-resolution signal synthesizer capable supporting digits necessary accurate reading input frequency. different approach, which offsets clock frequency from exact value 120MHz, still, obeying rules coherent sampling, overcome such stringent demand. next five steps show that need high-resolution instrument relaxed 'distributing' number required digits between input sampling frequency. Determine resolution sampling frequency that fits into 8192-point record fSAMPLE NRECORD 120MHz 8192 14.6484375kHz Some commonly available signal generators market offer enough resolution offer this many digits accurately capture both input sampling frequency. bypass this requirement still meet coherent sampling condition, recommended select based next highest integer number. (fSAMPLE NRECORD) 15kHz Based exact sampling frequency computes fSAMPLE NRECORD fSAMPLE 15kHz 8192 122.880MHz also helps determine size NWINDOW. Again, next highest integer mutually prime) number, determined desired input test tone NWINDOW (fIN NWINDOW 17MHz 15kHz 1133 Based these findings, near optimum input test tone calculates follows fSAMPLE (NWINDOW NRECORD) 122.88MHz (1133 8192) 16.995MHz
Equipment Set-Up Recommendations Successful High-Speed Test
Table lists some recommended hardware instruments software products, which have proven quite valuable data capture analysis high-speed dynamic performance parameters. Table Equipment software tool recommendations high-speed testing
TYPE EQUIPMENT Synthesized Signal Generator: HP/Agilent 8662/3A (10kHz 1.28/2.56GHz, -139dBm +13dBm) HP/Agilent 8644A (252kHz 1.030GHz, -140dBm +20dBm) Logic Analyzer System: HP/Agilent 16500C mainframe similar) (1Gsps State Analyzer Card HP16517A optional ADCs with sampling speeds >100MHz only)
EQUIPMENT COUNT NOTES generators single-channel input clock generators test (single-channel ADC) generators dual-channel inputs clock generators test (dual-channel ADC) Logic analyzer default configuration, allows evaluate channels ADCs with 16-bit resolution)
Band-Pass Filters: Filter single-channel TTE's Q56/KC7 series frequencies Filters simultaneous evaluation dual-channel <100MHz/>100MHz (Other suitable filter suppliers Allen Avionics Microwave) Power Combiner: Mini-Circuits 15542 ZSC-2-1W similar) FrequencyBalun/Transformer: MA/COM H-9-SMA similar) GPIB-Compatible Interface Card: National Instruments GPIB/IEEE-488 Interface Card driver installation software (PC-/PCMCIA-card GPIB-to-USB port adapter) Combiner (used two-tone evaluation only) Baluns single-channel clock Baluns dual-channel clock Interface card Note: This card recommended fast data transfer between logic analyzer computer; requires Cbased software platform (e.g. LabWindows/CVI) control interface. Data also extracted from logic analyzer with floppy disk. License each software package Note: LabWindows/CVI provides C-based platform control interface between logic analyzer
Data Analysis Software: MATLAB from Math Works Inc. Measurement Studio with LabWindows/CVI from National Instruments
Probably most critical elements such test setup (Figure synthesized signal generators, used generate waveforms clock input frequencies. Suitable signal generators must feature phase noise; because measured dynamic parameters such will degrade dramatically with increase phase noise "Defining Testing Dynamic Parameters High-Speed ADCs, Part Furthermore, these signal synthesizers have provide adequate output power, must have phase locking capabilities, frequency resolution 0.1Hz better ensure accurate coherence. Although generators such HP8662A series from Hewlett-Packard/Agilent rather expensive have limited output amplitude range -139dBm +13dBm (0.025µVRMS 1VRMS into load), they satisfy other test requirements most suitable dynamic tests high-speed converters.
Figure further reduce harmonic distortion components synthesizer's output frequency recommended filter desired test tone applying high-quality bandpass between generator input drive. Clock signal inputs fast ADCs usually equipped with true differential input architectures, which require signal generator's single-ended output converted differential signal. This achieved using external balun off-the-shelf transformer with center isolation. Usually, latter surface-mount component should incorporated characterization board, used test ADC. Most Maxim's highspeed data converter evaluation kits feature such transformers emphasize impedance matched lines keep unwanted signal skew phase mismatch minimum. capture digital data parallel output ports high-speed fast Logic Analyzer will needed. excellent choice Hewlett-Packard/Agilent HP16500 Logic Analyzer mainframe. converter sampling/clock speeds greater than 100MHz, this system accepts high-speed data capture cards such HP16517A. system's mainframe features GPIB/HPIB bus, capable interfacing with PC-based GPIB transmit data from Logic Analyzer quickly. course floppy drive built into instrument store data, however depending size data record (number points FFT) this take significantly longer than just utilizing analyzer's GPIB interface. Once data been sent signal processing software such MATLAB used analyze data records from logic analyzer. following MATLAB sample code maybe used calculate basic specifications high-speed ADC.
%SOURCE CODE SAMPLE MAX144X FAMILY
%The following program code plots spectrum desired test tone. Test tone based coherent sampling criteria, %computes SNR, SINAD, SFDR. %Copyright Au/Hofner, Maxim Integrated Products, Gabriel Drive, Sunnyvale, CA94086 %This program believed accurate reliable. This program altered without prior notification.; disp('HP16500C 100/110 State Card'); filename=input('Enter file name press RETURN accept data from GPIB/HPIB): isempty(filename) filename 'listing'; fid=fopen(filename,'r'); numpt=input('Number Points FFT? fclk=input('Sampling Frequency (MHz)? numbit=input('ADC Resolution? %Discard first lines listing header), they don't contain valid data. i=1:13, fgetl(fid); fclose(fid); v1=v1'; code=v1(:,2); %Warning: output clipping reduce input amplitude (max(code)==2numbit-1) (min(code)==0) disp('WARNING: OUTPUT MAYBE CLIPPING CHECK INPUT AMPLITUDE!'); figure; plot([1:numpt],code); title('TIME DOMAIN') xlabel('SAMPLES'); ylabel('DIGITAL OUTPUT CODE'); Dout=code-(2^numbit-1)/2; Doutw=Dout; Dout_spect=fft(Doutw); Dout_dB=20 log10(abs(Dout_spect)); figure; maxdB=max(Dout_dB(1:numpt/2)); %Re-center digitized sinusoidal input
plot([0:numpt/2-1]. grid title('FFT PLOT'); xlabel('ANALOG INPUT FREQUENCY (MHz)'); ylabel('AMPLITUDE (dB)'); a1=axis; axis([a1(1) a1(2) -100 a1(4)]); span=max(round(numpt/200),5); spanh=2; spectP=(abs(Dout_spect)). (abs(Dout_spect)); Pdc=sum(spectP(1:span)); Fh=[]; Ph=[]; %Find signal represents bin=1) %Determine span input frequency each side %Search span harmonic distortion components each side %Determine power level %Determine offset power level %Determine signal power level %Vector storing frequency power components signal harmonics %HD1=signal, HD2=2nd harmonic, HD3=3rd harmonic, etc.
%Find harmonic frequencies/power within plot har_num=1:10 tone=rem((har_num (fin-1)+1)/numpt,1); tone>0.5 tone=1-tone; Fh=[Fh tone]; %For this method work properly, make sure that folded back high order harmonics overlap with signal %components lower order harmonics. har_peak=max(spectP(round(tone numpt)-spanh:round(tone numpt)+spanh)); har_bin=find(spectP(round(tone numpt)-spanh:round(tone numpt)+spanh)==har_peak); har_bin=har_bin+round(tone numpt)-spanh-1; Ph=[Ph Pd=sum(Ph(2:5)); format; A=(max(code)-min(code))/2numbit AdB=20 log10(A) SNR=10 log10(Ps/Pn) SNR=10 log10(Ps/Pn) SINAD=10 log10(Ps/(Pn+Pd)) disp('THD through HD5'); THD=10 log10(Pd/Ph(1)) SFDR=10 log10(Ph(1)/max(Ph(2:10))) %THD %SFDR %Analog input amplitude %Analog input amplitude %SNR %SINAD %Total distortion power level %Extract noise power level %Note: tones fSAMPLE aliased back
disp('SIGNAL HARMONIC POWER (dB)'); HD=10 log10(Ph(1:10)/Ph(1)) hold plot(Fh(2) fclk,0,'mo',Fh(3) fclk,0,'cx',Fh(4) fclk,0,'r+',Fh(5) fclk,0,'g ',Fh(6) fclk,0,'bs',Fh(7) fclk,0,'bd',Fh(8) fclk,0,'kv', Fh(9) fclk,0,'y^'); hold off;
Conclusion
This application note provides approach establishing dynamic performance parameters high-speed quickly precisely. Digital data also analyzed using high dynamic performance, high-resolution combination with output filter spectrum analyzer. However, that approach requires careful selection design reconstruction signal path avoid falsifying ADCs true dynamic performance. Some applications even prefer test system with built-in digital distortion analyzer. Even Logic Analyzer deliver quick, rather inaccurate analysis digital output signals. Just remember: Choosing appropriate configuration your test setup entirely depends type application, available hardware software resources, design time, quality dynamic performance results needed your application.
References
Coherent Sampling Window Sampling Defining Testing Dynamic Parameters High-Speed ADCs, Part Dynamic Testing High-Speed ADCs, Part
Notes
NRECORD power-of-two value, then number NWINDOW will meet coherent sampling requirement. size ideal frequency defined fSAMPLE NRECORD.
December 2002
More Information MAX1211: QuickView Full (PDF) Data Sheet Free Samples MAX1418: QuickView Full (PDF) Data Sheet Free Samples MAX1419: QuickView Full (PDF) Data Sheet Free Samples MAX1427: QuickView Full (PDF) Data Sheet Free Samples

2002 Selecting Optimum Test Tones Test Equipment Successful High-

Top Searches for this datasheet

Other recent searches