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Single-coil latching relays found applications including signal routin
Top Searches for this datasheetdrives four single-coil latching relays Single-coil latching relays found applications including signal routing, audio, automotive systems. These relays pose design challenge because coil current must flow both directions through single coil (Figure Current flowing from causes relay latch reset position, current flowing from latches relay position. relay maintains position even when coil current removed. Power saved removing coil current after relay latches. simple circuit that drives four single-coil latching relays (Figure includes parallelinterface relay driver (U1) with open-drain outputs (Figure inductive-kickback protection. Latch four relays their reset positions turning corresponding output (OUTX). That output selected asserting digital address pins while high. Activate output toggling (Figure Current flows into enabled open-drain output latches relay reset position, according direction coil current. Drive RESET turn enabled open-drain outputs, soon relays latch ensure lowest power consumption. Observe set/reset timing shown Figure pull RESET until required time (tSET/RESET) elapsed. Waiting tSET/RESET after last toggle ensures that selected relays will properly latch their intended positions. Clamping diodes each OUTX catch highvoltage transients that occur when coil current interrupted. Those diodes, shown Figure clamp OUTX voltage 0.7V. similar article appeared February, 2004 issue EET. RESET Figure Current flow single coil latches corresponding relay RESET position. RELAY AROMAT AGN210A4HZ 0.1µF OUT1 OUT2 OUT3 OUT4 RELAY AROMAT AGN210A4HZ MAX4821 OUT6 OUT7 RESET OUT8 PGND OUT5 RELAY AROMAT AGN210A4HZ RELAY AROMAT AGN210A4HZ Figure This circuit easily drives four, single-coil latching relays. OUT1 VOUT OUT2 RESET IOFF tSET/RESET 100ns tON, tOFF tSET/RESET GUARANTEED RESET TIME NEEDED RELAY LATCH (CONSULT RELAY DATA SHEET) Figure This diagram shows eight open-drain outputs from circuit Figure Figure Interface timing circuit Figure illustrates activated output. Other recent searchesXVB1LUY50D - XVB1LUY50D XVB1LUY50D Datasheet QRFL9804 - QRFL9804 QRFL9804 Datasheet TSOP48 - TSOP48 TSOP48 Datasheet PCE84C886 - PCE84C886 PCE84C886 Datasheet ERTEC - ERTEC ERTEC Datasheet Development - Development Development Datasheet Ethernet - Ethernet Ethernet Datasheet controller - controller controller Datasheet CY3650 - CY3650 CY3650 Datasheet CVS575S-500 - CVS575S-500 CVS575S-500 Datasheet
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