Tutorial In-Circuit Programming ACExFamily Microcontrollers ACE10

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Tutorial In-Circuit Programming ACExFamily Microcontrollers ACE10

Datasheet Thumbnail

Top Searches for this datasheet

AN-2001
Tutorial In-Circuit Programming ACExFamily Microcontrollers
ACE1001/8001, ACE1101, ACE1202, ACE1502
ACEx (Arithmetic Controller Engine) family programmable integrated circuits designed applications requiring high performance, power, small size. ACEx family supports in-circuit programming code EEPROM array, data EEPROM array, initialization registers In-circuit programming ACEx device accomplished through 4-pin interface. Data shifted serially device using 32-bit command/response word. This 32-bit command response word contains necessary information program data EEPROM arrays initialization register. This application note provides detailed description programming interface, 32-bit command/response word, programming procedures. addition, this application note also provides timing specifications programming signals.
Fairchild Note 2001 February 2003
Interface
4-pin interface designed simple in-circuit programming. simply shift data serially ACEx device through following externally controlled signals (see Figure LOAD control signal CLOCK signal serial data SHIFT_IN input signal serial data SHIFT_OUT output signal four interface pins multiplexed with particular yielding separate device pinout while programming mode. Table describes programming mode device pinout. Note: must either float held high board order read data from SHIFT_OUT. section gangprogramming more information about
Table Programming Signals Interface
LOAD CLOCK SHIFT_IN SHIFT_OUT High
Figure Programming Interface Diagram
LOAD CLOCK
Data
SHIFT_IN
ACE1001 ACE8001 ACE1101 ACE1202
SHIFT_OUT
Data
LOAD CLOCK
Opcode Data ACE1502
SHIFT_OUT
Data
SHIFT_IN
©2003 Fairchild Semiconductor Corporation
www.fairchildsemi.com
AN-2001 Rev.
AN-2001
Command Response Word
32-bit command response word shifted serially (SHIFT_IN) (SHIFT_OUT) ACEx device. When data being shifted into device referred 32-bit command word. Likewise, when data being shifted device referred 32-bit response word. command word first shifted into device following other (30, bits. command word shifted response word being shifted simultaneously. (The response word ACEx responding 32-bit command word shifted previously.) 32-bit command/response word uses simple format consisting control bits, read/write bit, address bits, data bits. Table details displayed bit-oriented format. Table displays same information byte-oriented format.
control bits (bit28, bit29) select memory. read/ write (bit24) selects whether reading writing memory address. address bits specify memory address read from write memory address bits wide ACExx01 devices bits wide ACExx02 devices. program 12-bit code space addresses, lower 10/11 bits memory-mapped addresses. Note: Currently, 12-bit address used without masking bits. Future devices work this way. When performing write, data bits specify data write memory address both command response word. However, when performing read, data bits command word contain different values than response word. When performing read, data bits command word should zeros, data bits response word contain data memory specified address location.
Table 32-bit Command Response Word, Layout
31-30 27-25 23-19 18-8
Input Command Word
Must addresses 0xFF, otherwise addresses 0xFF, otherwise Must read, write Must Address byte read written Data written zero data read
Output Response Word
Same input command word Data written data read specified address
Table 32-bit Command Response Word, Byte Layout Instruction
Read Code Memory Space
32-bit Command (MSB LSB) Byte Byte Byte Byte
00010001 00000UUU LLLLLLLL (0x11)
Operation
xxxxxxxx Read code memory space 0x7FF)1. Data will read next 32-bit Read Command value read following previous Read Command) Write Code 00010000 00000UUU LLLLLLLL dddddddd Write 8-bit data code memory space 0x7FF)1 Memory Space (0x10) Read Data Memory 00100001 00000000 bbbbbbbb xxxxxxxx Read data memory space 0xFF, data 0x40 (0x21) Space 0x7F). Data will read next 32-bit Read Command value read following previous Read Command) Write Data 00100000 00000000 bbbbbbbb dddddddd Write 8-bit data code memory space 0xFF, data Memory Space (0x20) 0x40 0x7F) Read Initialization 00100001 00000000 10111011 xxxxxxxx Read Initialization Register (0xBB). Data will read Register (0x21) (0xBB) next 32-bit Read Command value read following previous Read Command) Write Initialization 00100000 00000000 10111011 76543210 Write Initialization register (0xBB): Register (0x20) (0xBB) Osc. Option, Watchdog, Brownout, Varies2, Upper Block Disable, Write Disable, Read Disable. Read Internal 00100001 00000000 10111100 xxxxxxxx Read Internal Oscillator trimming register (0xBC) data will (0x21) (0xBC) Oscillator Register read next 32-bit Read Command value read following previous Read Command) Write Internal 00100000 00000000 10111100 dddddddd Write Internal Oscillator trimming register (0xBC) with (0x20) (0xBC) Oscillator Register
1The program code address space 0-0x3FF ACExx01 devices 0-0x7FF ACExx02 devices. During programming, 12-bit memory-mapped addresses masked their lower bits, respectively. data sheet details bit3 device's initialization register. used brown-out low-battery-detect settings. necessary preserve setting when writing value register.
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Programming Procedures
There several basic steps program memory ACEx device. process includes placing device programming mode, clocking 32-bit command word into device, providing additional clocks with control signal perform read write. following steps required program ACEx device's memory: Step device programming mode. There ways this, depending which ACEx device using: ACE1001/8001/1101/1202: Supply single supervoltage pulse LOAD signal ACE1502: Shift opcode into device during power-on-reset process with LOAD Vcc. (ACE1502 devices 3.3V devices will damaged supervoltage pulse.) Step LOAD Vcc. Step Shift 32-bit command word through SHIFT_IN pin. Continue shifting bits through Step Supply CLOCK pulse. Step Repeat Steps until bits command word shifted into device. previous command word contained read command, poll SHIFT_OUT tACCESS after rising edge CLOCK obtain 32-bit response word.
Step LOAD SHIFT_OUT goes Vcc. Step Supply CLOCK pulses perform read write. When performing write, SHIFT_OUT must before second CLOCK pulse provided. SHIFT_OUT BUSY signal during write process. Step Poll SHIFT_OUT READY signal. After second CLOCK pulse supplied write completed, SHIFT_OUT returns Vcc. SHIFT_OUT READY signal. READY signal must high before LOAD return Vcc. Step Repeat Steps through until bytes read from written memory. Step 10:Exit programming mode powering down device. Note: reads, data shifted comes from address shifted previous command word. example: order read bytes, three command words need shifted into device. first command words contain addresses read, third dummy using zero address. first data byte read will return random data discarded, next will data read from addresses first command words.
Figure Process Flow-diagram
Figure provides flow diagram general process entire ACEx family. Please refer specific data sheet details particular device.
Supply pulse LOAD ACE1001/8001/1101/1202 devices. Bring LOAD Vcc.
Bring LOAD Vcc.
Shift 10-bit opcode ACE1502 devices during reset
Supply command word SHIFT_IN serially.
Supply CLOCK.
32-bit response word SHIFT_OUT serially.
CLOCKs supplied?
Bring LOAD
Supply CLOCK pulses
SHIFT_OUT (READY)?
Bring LOAD Vcc.
Process Complete?
Power down device.
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Timing Specification
Figure shows programming protocol, including specific timing parameters defined Table
Figure Programming Protocol
Supervoltage Method: ACE1001/8001/1101/1202
tSV1 LOAD (G3) tSV2 tLOAD1 tLOAD2 tLOAD3 tLOAD4
clock pulses
tREADY CLOCK (G1)
BUSY dock pulse. READY
SHIFT_IN (G4)
SHIFT_OUT (G2)
BUSY
Opcode Method: ACE1502
Treset RESET tload1 LOAD (G3) CLOCK (G1) SHIFT_IN (G4) SHIFT_OUT (G2) write mode) SHIFT_OUT (G2) read mode)
BUSY clock pulse
tload2
tready
tload3
tload4
clock pulses
READY BUSY
Opcode 0x34B
start programming cycle
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Figures show serial data timing, including specific timing parameters defined Table
Figure ACE1001/ACE1101 Serial Data Timing
CLOCK (G1) tDIS SHIFT_IN (G4) tDIH Valid tDOS SHIFT_OUT (G2) tACCESS tDOH Valid
Figure ACE1202/ACE1502 Serial Data Timing
CLOCK (G1)
tDIS SHIFT_IN (G4)
tDIH Valid tDOS tDOH Valid tACCESS
SHIFT_OUT (G2)
Table Programming Electrical Characteristics Timing Parameters Parameter
tDIS tDIH tDOS tDOH tACCESS (ACE1101) tACCESS (ACE1202) tSV1, tSV2 tLOAD1, tLOAD2, tLOAD3, tLOAD4 VSUPERVOLTAGE TRESET (ACE1502 only)
*Supervoltage should used ACE1502
Description
CLOCK high time CLOCK time SHIFT_IN setup time SHIFT_IN hold time SHIFT_OUT setup time SHIFT_OUT hold time SHIFT_OUT access time SHIFT_OUT access time LOAD supervoltage timing* LOAD timing Supervoltage level* Power-On Reset
Min.
11.5
Max.
Units
12.5
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Gang Programming
This section describes mass-production programming process. Fairchild uses this special method during wafer-sort test large number ACEx units optimize testing time. programming procedures gang programming generally same those described earlier this application note. used chip select. When high, SHIFT_OUT enabled-allowing device read. When low, SHIFT_OUT disabled device cannot read. time-saving strategy writes parallel several devices same time. Then, using Mux, parts read-enabled one-by-one setting Vcc. Each device read write data verified. Since SHIFT_OUT disabled cannot polled detect when write completed, process must wait fixed delay time. ensure that devices have completed process, this time should equal maximum write time. Note: SHIFT_IN disabled with connected parts will programmed.
following steps show supervoltage pulse gang-program devices: Note: supervoltage pulses with ACE1502 device. Doing will damage device devices programming mode bringing signal LOAD +12V after having applied (4.5 5.5V). connected devices disable SHIFT_OUT (deselect external Mux.) Program desired locations without verifying READY status SHIFT_OUT. Wait 10ms before programming next location; devices connected will programmed simultaneously. Verify each device bringing respective high. (Refer interface shown Figure select device selection pins must 0000 select output on). gang program ACE1502 devices, them programming mode with opcode method after applying (3.3V). opcode method described "4.0 Programming Procedures" this application note. Then, follow steps through listed above.
Figure Gang Programming Interface:
Device
SHF_I SHF_O LOAD G5_1
Device
SHF_I SHF_O LOAD G5_2
Device
SHF_I SHF_O LOAD G5_16
Programming Interface
Figure Program-by-sixteen interface Figure shows simple hardware interface program sixteen devices simultaneously. digital multiplexer minimizes number wires needed select single device. signals properly buffered, number devices that programmed parallel virtually unlimited.
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Gang Programming Protocol:
+12V
LOAD
SHF_I
32-bit write addr.
32-bit write addr.
Read Device Command
Read Device Command
Read Device Command
Etc.
SHF_O
Data read Data read Data read From Device1 From Device2 From Device3
Etc.
G5_1
G5_2
G5_3
G5_4 Enter Progr. Mode
Write devices together
Verify each device
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
Trimming Internal Oscillator
Initialization Register used calibrate internal clock oscillator. default internal clock trimmed 2MHz during production. This recommended speed operating device. Just some users choose "overclock" their CPUs added performance, some ACEx device users need higher clock speeds their applications. example, ACE1502-based emulator board v2.0 ACE1502 BIOS devices. dedicated emulation second programming. Both these devices trimmed 8MHz enhance board's performance. There number facts about ACEx devices' internal oscillators know before experimenting with clock settings. When register production, there different standards different devices family. ACE1101/ 1202 devices specified with ±10% accuracy. ACE1001/8001 devices have improved accuracy ±4%, ACE1502 extremely accurate ±2%. Experience shown ACE1502 reliable 8MHz attained through trim register. tests have device 28-32MHz range when externally clocked. rest family should expected above 4-5MHz range, although individual parts faster. internal clock affected temperature voltage extremes. Please refer data sheets test information individual parts behave extremes their operating ranges. Testing determined safe emulator board devices higher clock speeds, because their environment normally room temperature with constant voltage. Various resistors connected disconnected individual bits trim register. This tends make value register have non-linear relationship with clock speed. wish experiment with Emulator board v2.0; trimming sample parts type chosen application. following example Emulator software trim oscillator. clock oscillator trimming feature found "Advanced Programmer" dialog Emulator software v8.0. Click "Oscillator" button open this dialog:
this example, ACE1202 trim register 0xFA. Testing found clock trimmed approximately 1949kHz; indicating 2.6% error from desired 2000kHz. Next, trim part 4MHz.
trim utility found setting 0xE7 best with measured frequency approximately 4015kHz. error dropped 0.375%. this example, device given 8MHz request find highest speed which this device will perform calibration test.
Even though ACE1202 should expected above 5MHz, this particular device test 7.3MHz. Notice "Aggressive" option selected. "Normal Search" tries reasonable range values found result speed requested. test process runs part each register setting measures timing. Because many settings cause part all, process timeout period. give utility better performance, only range expected produce success tried. This reduces time spent waiting series timeouts with unreasonable settings. remove doubt that "good" setting tried, "Aggressive" search option will every setting from 0xFF. However, testing shown that with current devices "Normal Search" will find same setting find quicker than "Aggressive" search option. table below shows ranges used utility: (Simplified condensed display here, actual table different breakpoints each device type.)
1900kHz
ACE1001 8001 ACE1101 1202 ACE1502 0xE0 0xFF 0xF0 0xFF 0xCB 0xFF
1900-2999kHz
0x83 0xF6 0xEC 0xFC 0x8D 0XF8
3000-3999kHz
0x7E 0x92 0xD5 0xF5 0x80 0xA7
4000-5000kHz
0x2E 0x7F 0xC4 0xE6 0x77 0xAD
5000kHz
0x00 0x69 0xC4 0xE6 0x00 0x7F
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
oscillator trim register during in-circuit programming, test method needs developed sure desired clock setting achieved. steps below describe procedure used trimming utility Emulator board. test program written first bytes code-space that generates 1kHz square wave Reset device place programming mode Save existing code first bytes device Write test code code space device Write test value oscillator trim register Power device exit programming mode Power device start normal mode Measure frequency wave from Save trim register value with best measurement test other values, reset device place programming mode. step repeat needed Write best value trim register Replace user code code space exit
Example Implementation
example in-circuit programmable board constructed using 1999 Fairchild ACEx Programmer board (ACESTART), v4.0. original BIOS device, labeled (circled), removed from board replaced with 14-pin socket. new, 14-pin DIP, ACE1202 device used this socket. This device programmed with assembled code from InCircuit.asm source file attached this application note. Devices programmed using adapter socket from Fairchild Programmer Emulator board. cable used connect board target application circuit. Example in-circuit programmable board:
Begin Programming Mode
Save Existing Code Write Test Code
Write Trim Test Value
Restart Device Normal Mode
Measure Frequency
Save Best Trim Value
More Test Values? Write Best Trim Value Replace User Code Exit
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
ACEx Programmable Board Schematic:
MAX232 10µF DB9E-F 10µF C1C2+ C2T2OUT T2IN R2IN R2OUT 10µF ACE1202N14 10µF LS26 LS26
+12V
PN2222 1N914 Socket Connector Load/G3 SFHT_I/G4 -CKI/G1 SFHT_O/G2
PN2222
Probe
MM74HC126 BUSY LM7805 10nF 10nF 10nF 1/2W LM78L12 +12V PN2222 LS26 LS26 FAIL PASS
Jack
Windows-executable file (ACExInCircuitProgrammer.exe) used communicate with board. This executable source files Visual project included with this application note. This program only programs code, DataEE initialization register. does read back display existing contents device. first menu this application displays message indicating baud been synchronized since board reset. Click "Synchronize Baud" synchronize 9600 baud. COM1 COM2 only choices available, these choices extended modifying included source code.
AN-2001 Rev.
www.fairchildsemi.com
AN-2001
software board agree that baud rate synchronized, button will change "Program Device" title will reflect that baud been synchronized.
Source Files
source files application included "VisualC_Project.zip." platform used Microsoft Visual 6.0. compiled executable file assembler source ACE1202 "InCircuitAsmSource.zip." Microsoft, Windows Visual registered trademarks Microsoft Corporation.
program device, follow these steps: Select location code data files from menu. Click both "Load" buttons. Check appropriate boxes initialization register settings. Click "Program Device" button begin programming. "Smart Programming" option tells programmer read each byte first value same, skip EEPROM write save time. board BIOS code uses detection method that tries place device programming mode first with ACE1502 procedure. this successful, supervoltage pulse skipped. This prevent damaging ACE1502 device event that incorrect device-type selected. This example implementation does adjust 3.3V ACE1502. actual implementation will intended target device.
Life Support Policy
Fairchild's products authorized critical components life support devices systems without express written approval President Fairchild Semiconductor Corporation. used herein: Life support devices systems devices systems which, intended surgical implant into body, support sustain life, whose failure perform, when properly used accordance with instructions provided labeling, reasonably expected result significant injury user.
Fairchild Semiconductor Americas Customer Response Center Tel. 1-888-522-5372 Fairchild Semiconductor Europe Fax: 1793-856858 Deutsch Tel: 8141-6102-0 English Tel: 1793-856856 Tel: 1-6930-3696 Italiano Tel: 2-249111-1
critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
Fairchild Semiconductor Hong Kong 8/F, Room 808, Empire Centre Mody Road, Tsimshatsui East Kowloon. Hong Kong Tel; +852-2722-8338 Fax: +852-2722-8383
Fairchild Semiconductor Japan Ltd. Natsume Bldg. 2-18-6, Yushima, Bunkyo-ku Tokyo, 113-0034 Japan Tel: 81-3-3818-8840 Fax: 81-3-3818-8841
AN-2001 Rev.
www.fairchildsemi.com

Tutorial In-Circuit Programming ACExFamily Microcontrollers ACE10

Top Searches for this datasheet

Other recent searches