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Aperture Uncertainty System Performance Brad Brannon Apertur
Top Searches for this datasheetAN-501 APPLICATION NOTE Aperture Uncertainty System Performance Brad Brannon Aperture Uncertainty concerns when performing sampling that aperture jitter aperture uncertainty. terms aperture jitter aperture uncertainty frequently interchanged text. this application, they have same meaning. Aperture uncertainty sample-tosample variation encode process. Aperture uncertainty three residual effects: first increase system noise, second uncertainty actual phase sampled signal itself third intersymbol interference. achieve required noise performance, aperture uncertainty less than required when sampling. terms phase accuracy intersymbol interference, effects aperture uncertainty small. worst case scenario MHz, phase uncertainty error 0.09 degrees rms. This quite acceptable even demanding specification such GSM. focus this analysis will therefore overall noise contribution aperture uncertainty. sine wave, maximum slew rate zero crossing. this point, slew rate defined first derivative sine function evaluated sin(2 evaluated cosine function evaluates equation simplifies JITTER units slew rate volts second yields fast signal slewing through zero crossing input signal. sampling system, reference clock used sample input signal. sample clock aperture uncertainty, error voltage generated. This error voltage determined multiplying input slew rate jitter. VERROR Slew Rate JITTER analyzing units, seen that this yields unit volts. Usually, aperture uncertainty expressed seconds and, therefore, error voltage would volts rms. Additional analysis Equation shows that analog input frequency increases, error voltage also increases direct proportion aperture uncertainty. ENCODE Figure Jitter Noise Contribution Overall System Performance sampling converters, clock purity extreme importance. with mixing process, input signal multiplied local oscillator this case, sampling clock. Since multiplication time convolution frequency domain, spectrum sample clock convolved with spectrum input signal. Since aperture uncertainty wideband noise clock, shows wideband noise sampled spectrum well. since sampling system, spectrum periodic repeated around sample rate. This wideband noise therefore degrades noise REV. AN-501 floor performance ADC. theoretical ADC, limited aperture uncertainty, determined following equation. fanalog JITTER rms) this high frequency, assume that jitter contributor noise. From previous data measurement know average quantization thermal noise; solve general form equation jitter shown. Equation evaluated analog input "jitter," theoretical limited Therefore, systems that require very high dynamic range very high analog input frequencies also require very jitter encode source. When using standard TTL/CMOS clock oscillators modules, been verified both oscillator. Better numbers achieved with noise modules. When considering overall system performance, more generalized equation used. This equation builds previous equation includes effects thermal noise differential nonlinearity. analog JITTER rms) noiseN JITTER -SNR high frequency number converter bits average from above thermal noise analog input frequency Putting Calculations Test following data collected using AD9042ST/ evaluation board. modifications were made. clock oscillator (M1280, manufactured Electronics) supplied with evaluation board used generate encode signal which delivered AD9042 differentially transformer (Mini-Circuits T1-1). analog input generated Rohde Schwarz synthesizer. more information about evaluation board, please AD9042 data sheet. 0.00 -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 -100.00 -110.00 fanalog tJITTER Vnoise analog Frequency aperture uncertainty average converter LSB) thermal noise LSBs number bits Although this simple equation, provides much insight into noise performance that expected from data converter. Measurement Sub-Picosecond Aperture Uncertainty Aperture uncertainty easily measured looking degraded performance function analog input frequency. Since degrades analog input frequency increases jitter, FFTs required calculation. first should done sufficiently analog frequency where effects aperture uncertainty negligible. Record excluding harmonics higher order spurs. Then solve Equation above, general converter performance assuming that thermal noise rolled into quantization noise jitter neglected. This gives equation below. Figure Figure AD9042 sampling sine wave 40.96 MSPS. Since must exclude higher order harmonics from calculation, represents unintegrated noise floor, mean noise floor. Instead integrating noise spikes, this number summed across entire spectrum, thus eliminating higher (and lower) order harmonics. Using Equation -SNR frequency number converter bits average thermal noise) Then done very high frequency. high frequency should chosen near bandwidth converter. Again, without harmonics should measured. -(-108 (8192)) found When this used solve Equation average (and thermal noise) this converter 0.4533 LSBs. REV. AN-501 0.00 -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 -100.00 -110.00 Table Jitter 74LS00 74ACT00 74HCT00 Equivalent 21.84 E01399-1-9/00 (rev. PRINTED U.S.A. 4.94 0.99 2.20 Figure Next, degradation must found function analog input frequency. Figure same AD9042 clock, running analog input frequency MHz. This time unintegrated noise floor risen almost Integrating with this value yields Using this previous solution jitter found follows using Equation 0.4533 Table shows that 74ACT00 gate delivers lowest jitter almost rms. many applications, even this unacceptable. receiver applications, equivalent noise figure shown reference (valid analog input only). Thus when using logic gates clock distribute, they must used minimally all. Recent developments require differential clock drive. With this comes ability drive encode with sinusoidal signal instead square wave. SINE SOURCE T1-1T ENCODE AD9042 ENCODE JITTER 0.74 Figure Transformer Differential Encode shown above, sine source distributed encode ADC. Sine sources easily distributed using power dividers transformers match impedances. Since encode pins high impedance, very little power required encode devices thus, when driving multiple devices, encode drive power required. Since sine source spectrally pure, fewer problems expected receiver applications with harmonics encode clock. chart following, Figure useful guide quickly determining jitter requirements based analog input frequency converter bits. This chart from Analog Devices' publication, High Speed Design Seminar (ISBN 0-916550-07-9). Therefore, combined aperture uncertainty AD9042 plus clock oscillator found less than three quarters picosecond rms. this time, possible determine which part from which from clock oscillator; however, these simple measurements indicate that possible measure very small aperture uncertainty numbers using readily available hardware simple numeric calculations. AD9042 EVALUATION BOARD AD9042ST/PCB ROHDE SCHWARZ BANDPASS FILTER HIGH SPEED CACHE MEMORY PROCESSOR Figure Aperture Uncertainty Measurement Setup Many applications require that master clock distributed many different sources. Many systems have multiple ADCs such cellular basestations ultrasound equipment. question quickly arises, however, much jitter introduced into system when placed distribution system. first option distributing clock logic gates encode signal, this rapidly increases amount jitter introduced into system. using technique described above, jitter gate (74xx00) several logic families measured summarized below. 0.5ps log10 10ps 50ps 250ps 1250ps FREQUENCY FULL SCALE SINE WAVE INPUT Figure Signal-to-Noise Ratio Aperture Jitter REV. ENOB Other recent searchesTS101-952-1-3 - TS101-952-1-3 TS101-952-1-3 Datasheet SHD280502 - SHD280502 SHD280502 Datasheet MKT-69 - MKT-69 MKT-69 Datasheet MJE3055T - MJE3055T MJE3055T Datasheet MD400-1A - MD400-1A MD400-1A Datasheet HAT3004R - HAT3004R HAT3004R Datasheet 1780170 - 1780170 1780170 Datasheet
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