APPLICATION NOTE USAGE Resin Seal Package Board (Organic) IN

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

APPLICATION NOTE USAGE Resin Seal Package Board (Organic) IN

Datasheet Thumbnail

Top Searches for this datasheet

AND8075/D Board Mounting Considerations FCBGA Packages
APPLICATION NOTE USAGE
Resin Seal Package Board (Organic)
INTRODUCTION (Ball Grid Array) packages often package choice optimizing device electrical performance. They lightweight, thin, minimize board space. take advantage packaging, special preparations guidelines have followed ensure proper mounting device onto PCB. This document outlines many processes board design considerations mounting devices. Package Overview
Package Interconnects
There many package types, types connected package substrate wirebond method (Figure flip-chip direct attachment method (Figure CSP, PBGA, FCBGA most common package types. Chip Scale Package (CSP) have either wirebond flip-chip interconnects. typical Plastic Ball Grid Array (PBGA) wirebond interconnects. typical Flip-Chip Ball Grid Array (FCBGA) flip-chip interconnects. Once connected substrate, package overmolded with plastic molding compound.
Package Ball Grid Arrays
solder ball grid array underside package used connect substrate. grid spacings have been standardized under JEDEC guidelines. most commonly used grid spacings 0.8, 1.0, 1.27
Semiconductor Components Industries, LLC, 2001
November, 2001 Rev.
Solder Ball
This application note provides overview some unique considerations related mounting packages PCB. sited references include information layout Systems Engineers, manufacturing processes Manufacturing Process Engineers.
Figure Cross-Section Wirebond PBGA
Mold Compound
Flip Chip Device
Eutectic Solder Balls
Glass Epoxy Substrate
Figure Cross-Section FCBGA
Publication Order Number: AND8075/D
AND8075/D
Printed Circuit Board (PCB) Design
NSMD Configurations
used surface mount packages. configurations shown below Figure
Solder Masked Defined (SMD) Non-Solder masked Defined (NSMD) configurations commonly
Solder Mask Defined (SMD)
Solder Mask Defined (NSMD)
Figure NSMD Configurations
With configured pads, solder mask covers outside perimeter circular contact pads. With this configuration, solder flows over surface contact pad, prevented from flowing along sides solder mask. With NSMD configured pads, there between solder mask circular contact (refer Figure With this configuration, solder flows over surface sides contact pad. additional NSMD soldering area results stronger mechanical bond. addition, additional area allows
Table Optimal Design Dimensions (mm)
NSMD pads smaller than pads. smaller size beneficial System Designers they allow more room escape trace routing.
Design Dimensions
Semiconductor recommends that solder mask opening size equal package ball size package escape trace routing constraint. Refer Table optimal design dimensions. refers dimensions given Figure
Package Ball Size 0.40 0.55 0.40 0.50 0.55 0.45 0.40 0.55 0.40 0.50 0.65 0.50 Solder Diameter Solder Mask Opening
Dimension
0.80 Ball Pitch
1.00 Ball Pitch
package escape trace routing constraint, solder mask opening size solder size decreased optimal sizes. Refer Table
Table Minimal Design Dimensions (mm)
optimal design dimensions. refers dimensions given Figure
Package Ball Size 0.40 0.44 0.32 0.50 0.44 0.36 0.40 0.44 0.32 0.50 0.52 0.40 Solder Diameter Solder Mask Opening
Dimension
0.80 Ball Pitch
1.00 Ball Pitch
http://onsemi.com
AND8075/D
NSMD Design Dimensions
Semiconductor recommends that solder size equal package ball size package escape trace
Table Optimal NSMD Design Dimensions (mm)
routing constraint. Refer Table optimal NSMD design dimensions. refers dimensions given Figure
Package Ball Size 0.40 0.40 0.55 0.50 0.45 0.55 0.40 0.40 0.55 0.50 0.50 0.65 Solder Diameter Solder Mask Opening
NSMD Dimension
0.80 Ball Pitch
1.00 Ball Pitch
package escape trace routing constraint, solder size solder mask opening size decreased package ball size. Refer Table
Table Minimal NSMD Design Dimensions (mm)
optimal NSMD design dimensions. refers dimensions given Figure
Package Ball Size 0.40 0.32 0.44 0.50 0.36 0.44 0.40 0.32 0.44 0.50 0.40 0.52 Solder Diameter Solder Mask Opening
NSMD Dimension
0.80 Ball Pitch
1.00 Ball Pitch
Trace Tapering Dimensions
surface traces often vary width over their length impedance routing considerations. Trace tapering dimensions must meet certain design rules incorrect solder flow result. Trace tapering dimensions described below Figure illustrated with NSMD design.
derived from design rule that entering trace width must equal less than one-half diameter. Dimension derived from design rule that wide trace close solder pad, trace will pull solder away from solder during reflow.
Ball Collapse Dimensions
Solder ball collapse dimensions predictable defined solder paste reflow process place. cross section assembled package described below Figure
Typical Overall Height <1.3 max.
Figure Trace Taper Dimensions
Table lists trace tapering dimensions printed circuit boards with NSMD configured pads. Dimensions refer Figure Dimension
Table Trace Tapering Dimensions (mm)
(Not scale)
Figure Ball Collapse Dimensions
Package Ball Size 0.40 0.15 0.15 0.50 0.18 0.15 0.40 0.15 0.15 0.50 0.20 0.15 Maximum Trace Width Minimum Trace Length
Description
0.80 Ball Pitch
1.00 Ball Pitch
http://onsemi.com
AND8075/D
Escape Trace Routing Contacts Plating
variety escape trace routing methods used including tapering escape vias. Figure illustrates techniques routing from package PCB. technique uses Plated Through Hole (PTH) connect inner-power inner-signal balls PCB. Another technique uses escape traces connect outer-signal balls PCB. Signal integrity must ensured when laying escape routing. This especially critical devices where high-speed signals have been routed inner-signal balls.
There common plated solderable metallizations which used surfaces mount devices. both cases imperative that plating uniform, conforming, free impurities insure consistent solderable system. first metallization consists plating electroless nickel over copper pad, then plating again with immersion gold. allowable stresses temperature excursions board will subjected throughout lifetime will determine thickness electroless nickel layer. Gold thickness recommended 0.15 0.05 Having excessive gold solder joint create gold embrittlement which effect reliability joint. second recommended solderable metallization Organic Solderability Preservative coating (OSP) over copper plated pad. organic coating assists preserving copper metallization soldering.
Solder Screening
solder typically patterned onto using 0.127 0.152 (0.005 0.006 thick screen. screen designed manufactured only allow specific amount solder placed contact pads. recommended that side walls screen openings tapered approximately degrees facilitate release paste when screen removed from PCB.
Figure Escape Trace Routing Solder Paste Type
Process Recommendations
Process Flow
Type solder paste recommended.
Package Placement
following processes must defined controlled order establish process: Plating contacts package. Screening/stenciling solder paste onto PCB. Choosing proper solder paste. Placing package onto PCB. Reflowing solder paste. Final solder joint inspection. Rework process necessary).
Pick place equipment with standard tolerance "0.10 better recommended. packages exhibit excellent self-alignment properties during solder reflow. ball misaligned will still self-align.
http://onsemi.com
AND8075/D
Solder Paste Reflow Solder Joint Inspection
standard surface mount reflow process used once package solder paste placed PCB. example standard reflow profile shown Figure exact recommended reflow profile determined manufacturer paste since chemistry viscosity flux matrix will vary. These variations will require small changes profile order achieve optimized process. general, temperature part should raised less than equal 2°C/sec during initial stages reflow profile. soak zone then occurs when part approximately 150°C should last seconds. temperature then raised will above liquidus solder seconds depending mass board. peak temperature profile should between 225°C.
inspection solder joints commonly performed with X-ray inspection system. X-ray system used locate open contacts, shorts between pads, solder voids, extraneous solder.
Rework Process
DEGREES (°C)
packages solder balls interconnects, therefore entire package must removed from rework required. important minimize chance overheating neighboring packages during removal package close proximity adjoining packages. Standard rework systems recommended this procedure since airflow temperature gradients carefully controlled. nitrogen atmosphere typically used prevent solder ball oxidation during rework. also recommended that board placed oven 125°C hours prior heating parts remove excess moisture from packages. package removed after solder been heated above liquidus temperature. pads must then thoroughly cleaned, solder paste dispensed. device then reflowed onto board. References SM-782A. Surface Mount Design Land Pattern Standard. 7095. Design Assembly Process Implementation Ball Grid Arrays. JEDEC J-STD-013. Implementation Ball Grid Array Other High Density Technologies.
MINUTES
Figure Typical Reflow Profile Eutectic Sn/Pb Solder
http://onsemi.com
AND8075/D
Notes
http://onsemi.com
AND8075/D
Notes
http://onsemi.com
AND8075/D
Semiconductor trademarks Semiconductor Components Industries, (SCILLC). SCILLC reserves right make changes without further notice products herein. SCILLC makes warranty, representation guarantee regarding suitability products particular purpose, does SCILLC assume liability arising application product circuit, specifically disclaims liability, including without limitation special, consequential incidental damages. "Typical" parameters which provided SCILLC data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. SCILLC does convey license under patent rights rights others. SCILLC products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure SCILLC product could create situation where personal injury death occur. Should Buyer purchase SCILLC products such unintended unauthorized application, Buyer shall indemnify hold SCILLC officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that SCILLC negligent regarding design manufacture part. SCILLC Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center Semiconductor P.O. 5163, Denver, Colorado 80217 Phone: 303-675-2175 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com Semiconductor Website: http://onsemi.com additional information, please contact your local Sales Representative.
http://onsemi.com
AND8075/D

APPLICATION NOTE USAGE Resin Seal Package Board (Organic) IN

Top Searches for this datasheet

Other recent searches