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Inverting Schmitt Trigger CD74AC14 CD74ACT14 each contain inverti
Top Searches for this datasheetCD74AC14, CD74ACT14 Inverting Schmitt Trigger CD74AC14 CD74ACT14 each contain inverting Schmitt Triggers package. These devices Harris Advanced CMOS Logic technology. September 1998 Features Operates with Much Slower than Standard Input Rise Fall Slew Rates Exceptionally High Noise Immunity Exceeds Protection MIL-STD-883, Method 3015 SCR-Latchup-Resistant CMOS Process Circuit Design Speed Bipolar FASTTM/AS/S with Significantly Reduced Power Consumption Balanced Propagation Delays Types Feature 1.5V 5.5V Operation Balanced Noise Immunity Supply ±24mA Output Drive Current Fanout FASTICs Drives Transmission Lines Greater Noise Immunity Than Standard Inverters Ordering Information PART NUMBER CD74AC14 CD74ACT14 CD74AC14 CD74ACT14 NOTES: When ordering, entire part number. suffix obtain variant tape reel. Wafer this part number available which meets electrical specifications. Please contact your local sales office Harris customer service ordering information. TEMP. RANGE (oC) PACKAGE PDIP PDIP SOIC SOIC PKG. E14.3 E14.3 M14.15 M14.15 /Title (CD74 AC14, CD74 ACT14 /Subject (Hex Inverting Schmit Trigger) /Autho /Keywords (Harris Semiconductor, Advan CMOS Harris Semiconductor, Advan TTL) Pinout CD74AC14, CD74ACT14 (PDIP, SOIC) VIEW Functional Diagram TRUTH TABLE INPUTS OUTPUTS FIGURE HYSTERESIS DEFINITION CHARACTERISTIC CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. FASTis Trademark Fairchild Semiconductor. Copyright Harris Corporation 1998 File Number 1984.1 CD74AC14, CD74ACT14 Absolute Maximum Ratings Supply Voltage, -0.5V Input Diode Current, -0.5V 0.5V .±20mA Output Diode Current, -0.5V 0.5V .±50mA Output Source Sink Current Output Pin, -0.5V 0.5V .±50mA Ground Current, IGND (Note .±100mA Thermal Information Thermal Resistance (Typical, Note (oC/W) PDIP Package SOIC Package Maximum Junction Temperature (Plastic Package) 150oC Maximum Storage Temperature Range .-65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC Operating Conditions Temperature Range, -55oC 125oC Supply Voltage Range, (Note Types. .1.5V 5.5V Types .4.5V 5.5V Input Output Voltage, Input Rise Fall Slew Rate, dt/dv (Note Types, 1.5V 5.5V 150ms (Max) Types, 4.5V 5.5V. 20ns (Max) CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied. NOTES: outputs device, ±25mA each additional output. Unless otherwise specified, voltages referenced ground. measured with component mounted evaluation board free air. Outputs switching: Load 500, 50pF; Full Temperature Range 5.5V sawtooth; ACT, sawtooth. Electrical Specifications TEST CONDITIONS PARAMETER TYPES Positive-Going Threshold Voltage Negative-Going Threshold Voltage Hysteresis Voltage High Level Output Voltage -0.05 -0.05 -0.05 (Note (Note 2.58 3.94 2.48 3.85 3.85 SYMBOL (mA) 25oC -40oC 85oC -55oC 125oC UNITS CD74AC14, CD74ACT14 Electrical Specifications (Continued) TEST CONDITIONS PARAMETER Level Output Voltage SYMBOL (mA) 0.05 0.05 0.05 (Note (Note Input Leakage Current Quiescent Supply Current, TYPES Positive-Going Threshold Voltage Negative-Going Threshold Voltage Hysteresis Voltage High Level Output Voltage -0.05 (Note (Note Level Output Voltage 0.05 (Note (Note Input Leakage Current Quiescent Supply Current, Additional Supply Current Input Inputs High Unit Load NOTES: Test output time 1-second maximum duration. Measurement made forcing current measuring voltage minimize power dissipation. Test verifies minimum transmission-line-drive capability 85oC, 125oC. -2.1 3.94 0.36 ±0.1 3.85 0.44 1.65 3.85 1.65 25oC 0.36 0.36 ±0.1 -40oC 85oC 0.44 0.44 1.65 -55oC 125oC 1.65 UNITS Input Load Table INPUT UNIT LOAD 0.21 NOTE: Unit load limit specified Electrical Specifications Table, e.g., 2.4mA 25oC. CD74AC14, CD74ACT14 Switching Specifications Input 3ns, 50pF (Worst Case) -40oC 85oC PARAMETER TYPES Propagation Delay, Input Output Input Capacitance Power Dissipation Capacitance TYPES Propagation Delay, Input Output Input Capacitance Power Dissipation Capacitance NOTES: Limits tested 100%. 5.5V, 4.5V. used determine dynamic power consumption gate. VCC2 (CPD ACT: VCC2 (CPD where input frequency, output load capacitance, supply voltage. INPUT LEVEL -55oC 125oC UNITS SYMBOL tPLH, tPHL (Note (Note 10.5 tPLH tPHL (Note (Note 13.2 14.5 OUTPUT (NOTE) OUTPUT LOAD 50pF NOTE: Series Only: When 1.5V, CD74AC Input Level Input Switching Voltage, Output Switching Voltage, CD74ACT 1.5V tPHL tPLH FIGURE FIGURE PROPAGATION DELAY TIMES IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof. Copyright 1999, Texas Instruments Incorporated Other recent searchesSN74HC573A - SN74HC573A SN74HC573A Datasheet SN54HC573A - SN54HC573A SN54HC573A Datasheet KMM5324000CK - KMM5324000CK KMM5324000CK Datasheet KMM5324100CK - KMM5324100CK KMM5324100CK Datasheet AT-22V10 - AT-22V10 AT-22V10 Datasheet ADC0831 - ADC0831 ADC0831 Datasheet ADC0832 - ADC0832 ADC0832 Datasheet ADC0834 - ADC0834 ADC0834 Datasheet ADC0838 - ADC0838 ADC0838 Datasheet
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