Very Power Consumption Capable Operation Astable Mode CMOS Output
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TLC555 LinCMOS TIMER
Very Power Consumption
Capable Operation Astable Mode CMOS Output Capable Swinging Rail Rail High Output-Current Capability Sink Source Output Fully Compatible With CMOS, TTL, Supply Current Reduces Spikes During Output Transitions Single-Supply Operation From Functionally Interchangeable With NE555; Same Pinout Protection Exceeds 2000 MIL-STD-883C, Method 3015.2 Available Q-Temp Automotive High Reliability Automotive Applications Configuration Control/Print Support Qualification Automotive Standards
PACKAGE (TOP VIEW)
TRIG RESET
DISCH THRES CONT
PACKAGE (TOP VIEW)
TRIG
DISCH THRES RESET
PACKAGE (TOP VIEW)
description
TLC555 monolithic timing circuit fabricated using LinCMOS process. timer fully compatible with CMOS, TTL, logic operates frequencies MHz. Because high input impedance, this device uses smaller timing capacitors than those used NE555. result, more accurate time delays oscillations possible. Power consumption across full range power supply voltage.
TRIG RESET
CONT
DISCH THRES CONT
internal connection
Like NE555, TLC555 trigger level equal approximately one-third supply voltage threshold level equal approximately two-thirds supply voltage. These levels altered control voltage terminal (CONT). When trigger input (TRIG) falls below trigger level, flip-flop output goes high. TRIG above trigger level threshold input (THRES) above threshold level, flip-flop reset output low. reset input (RESET) override other inputs used initiate timing cycle. RESET low, flip-flop reset output low. Whenever output low, low-impedance path provided between discharge terminal (DISCH) GND. unused inputs should tied appropriate logic level prevent false triggering. While CMOS output capable sinking over sourcing over TLC555 exhibits greatly reduced supply-current spikes during output transitions. This minimizes need large decoupling capacitors required NE555.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. LinCMOS trademark Texas Instruments.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
Copyright 1983-2005, Texas Instruments Incorporated
products compliant 38535, parameters tested unless otherwise noted. other products, production processing does necessarily include testing parameters.
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TLC555 LinCMOS TIMER
description (continued)
TLC555C characterized operation from 70°C. TLC555I characterized operation from -40°C 85°C. TLC555Q characterized operation over automotive temperature range -40°C 125°C. TLC555M characterized operation over full military temperature range -55°C 125°C.
AVAILABLE OPTIONS PACKAGED DEVICES 70°C -40°C 85°C -40°C 125°C RANGE SMALL OUTLINE TLC555CD TLC555ID TLC555QD SSOP (DB) TLC555CDB CHIP CARRIER (FK) CERAMIC (JG) PLASTIC TLC555CP TLC555IP TSSOP (PW) TLC555CPW
-55°C 125°C TLC555MD TLC555MFK TLC555MJG TLC555MP most current package ordering information, Package Option Addendum this document, site www.ti.com. This package available taped reeled. suffix device type (e.g., TLC555CDR). FUNCTION TABLE RESET VOLTAGE <MIN >MAX >MAX TRIGGER VOLTAGE Irrelevant <MIN >MAX THRESHOLD VOLTAGE Irrelevant Irrelevant >MAX OUTPUT DISCHARGE SWITCH
>MAX >MAX <MIN previously established conditions shown MAX, appropriate value specified under electrical characteristics.
functional block diagram
CONT THRES RESET
TRIG
DISCH
numbers packages except package. RESET override TRIG, which override THRES.
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TLC555 LinCMOS TIMER
DISCH
COMPONENT COUNT
Transistors Resistors
TRIG RESET
equivalent schematic (each channel)
THRES
CONT
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, (see Note Input voltage range, (any input) -0.3 Sink current, discharge output Source current, output, Continuous total power dissipation Dissipation Rating Table Operating free-air temperature range, C-suffix 70°C I-suffix -40°C 85°C Q-suffix -40°C 125°C M-suffix -55°C 125°C Storage temperature range -65°C 150°C Case temperature seconds: package 260°C Lead temperature (1/16 inch) from case seconds: package 300°C Lead temperature (1/16 inch) from case seconds: package 260°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTE voltage values with respect network GND. DISSIPATION RATING TABLE PACKAGE 25°C POWER RATING 1375 1050 1000 DERATING FACTOR ABOVE 25°C mW/°C mW/°C 11.0 mW/°C mW/°C mW/°C mW/°C 70°C POWER RATING 85°C POWER RATING 125°C POWER RATING
recommended operating conditions
Supply voltage, TLC555C Operating free-air temperature range, TLC555I TLC555Q TLC555M UNIT
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electrical characteristics specified free-air temperature, TLC555C, TLC555I
PARAMETER VI(TRIG) II(TRIG) VI(RESET) II(RESET) Threshold voltage Threshold current Trigger voltage Trigger current Reset voltage Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-stage voltage Discharge switch off-stage current High-level output voltage Low-level output voltage Supply current Note TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C Full range 25°C Full range 0.07 0.35 0.07 66.7% 0.03 0.25 2.85 66.7% 0.03 0.375 TLC555C 0.95 0.85 0.67 0.95 1.05 0.71 0.61 1.33 1.65 1.75 1.29 1.39 TLC555I UNIT
Full range 70°C TLC555C -40°C 85°C TLC555I. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
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electrical characteristics specified free-air temperature,
PARAMETER TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 0.08 0.13 0.21 0.35 0.08 0.13 0.21 0.35 0.08 0.13 66.7% 1.36 1.26 66.7% TLC555C 1.66 1.96 2.06 1.36 1.26 5000 66.7% 1.66 1.96 2.06 1.36 1.26 5000 TLC555I TLC555Q, TLC555M 5000 1.66 1.96 2.06 UNIT
VI(TRIG)
Threshold voltage
Threshold current
Trigger voltage
II(TRIG)
Trigger current
VI(RESET)
Reset voltage
II(RESET)
Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current
0.14
0.14
0.14
0.21 0.45
High-level output voltage
Low-level output voltage
Supply current
Note
Full range 70°C TLC555C, -40°C 85°C TLC555I, -40°C 125°C TLC555Q, -55°C 125°C TLC555M. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
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TLC555 LinCMOS TIMER
electrical characteristics specified free-air temperature,
PARAMETER TEST CONDITIONS 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C 25°C Full range 25°C High-level output voltage Low-level output voltage Supply current Note 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 25°C Full range 0.12 0.63 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.12 0.63 14.9 14.6 14.2 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.12 0.63 14.9 14.6 66.7% 0.77 14.2 12.5 12.5 13.5 13.5 14.2 14.2 1.28 0.45 1000 14.9 14.6 4.65 4.55 66.7% 0.77 14.2 TLC555C 9.45 9.35 5.35 5.45 4.65 4.55 5000 66.7% 0.77 10.55 10.65 9.45 9.35 5.35 5.45 4.65 4.55 5000 TLC555I 10.55 10.65 TLC555Q, TLC555M 9.45 9.35 5000 5.35 5.45 10.55 10.65 UNIT
VI(TRIG) II(TRIG) VI(RESET) II(RESET)
Threshold voltage
Threshold current
Trigger voltage
Trigger current
Reset voltage
Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current
Full range 70°C TLC555C, -40°C 85°C TLC555I, -40°C 125°C TLC555Q, -55°C 125°C TLC555M. conditions shown MAX, appropriate value specified recommended operating conditions table. NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
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operating characteristics, 25°C (unless otherwise noted)
PARAMETER Initial error timing interval Supply voltage sensitivity timing interval fmax Output pulse rise time Output pulse fall time Maximum frequency astable mode Note TEST CONDITIONS Note UNIT
Timing interval error defined difference between measured value average value random sample from each process run. NOTE defined Figure
electrical characteristics 25°C
PARAMETER VI(TRIG) II(TRIG) VI(RESET) II(RESET) Threshold voltage Threshold current Trigger voltage Trigger current Reset voltage Reset current Control voltage (open circuit) percentage supply voltage Discharge switch on-state voltage Discharge switch off-state current High-level output voltage 1.36 TEST CONDITIONS 1.66 66.7% 0.14 0.21 0.13 0.08 1.96 UNIT
Low-level output voltage
Supply current Note NOTE These values apply expected operating configurations which THRES connected directly DISCH TRIG.
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TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIMES DISCHARGE OUTPUT FROM TRIGGER THRESHOLD SHORTED TOGETHER SUPPLY VOLTAGE
Propagation Delay Times IO(on) 25°C
DISCHARGE SWITCH ON-STATE RESISTANCE FREE-AIR TEMPERATURE
Discharge Switch On-State Resistance
tPHL tPLH
Free-Air Temperature Supply Voltage effects load resistance these values must taken into account separately.
Figure
Figure
APPLICATION INFORMATION
THRES TRIG tPLH TRIGGER THRESHOLD VOLTAGE WAVEFORM tPHL Output tc(L)
tc(H)
CONT RESET TLC555 DISCH
numbers shown packages except package. CIRCUIT
Figure Astable Operation
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APPLICATION INFORMATION
Connecting TRIG THRES, shown Figure causes timer multivibrator. capacitor charges through threshold voltage level (approximately 0.67 VDD) then discharges through only value trigger voltage level (approximately 0.33 VDD). output high during charging cycle (tc(H)) during discharge cycle (tc(L)). duty cycle controlled values shown equations below. 0.693) c(H) c(L) Period c(H) c(L) c(L) Output driver duty cycle c(H) c(L) c(H) Output waveform duty cycle c(H) c(L)
0.1-µF capacitor CONT Figure decreases period about 10%. formulas shown above allow propagation delay times from TRIG THRES inputs DISCH. These delay times directly period create differences between calculated actual values that increase with frequency. addition, internal on-state resistance during discharge adds provide another source timing error calculation when very very high. equations below provide better agreement with measured values. c(H) -exp
c(L)
-exp
These equations those given earlier similar that time constant multiplied logarithm number function. limit values logarithmic terms must between frequencies extremely high frequencies. duty cycle close 50%, appropriate constant logarithmic terms substituted c(H) require that c(H) possibly ron. These with good results. Duty cycles less than c(L) c(H) c(L) conditions difficult obtain. monostable applications, trip point TRIG voltage applied CONT. input voltage between supply voltage from resistor divider with least 500-µA bias provides good results.
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PACKAGE OPTION ADDENDUM
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31-Jan-2006
PACKAGING INFORMATION
Orderable Device 5962-89503012A 5962-8950301PA TLC555CD TLC555CDG4 TLC555CDR TLC555CDRG4 TLC555CP TLC555CPE4 TLC555CPSR TLC555CPW TLC555CPWG4 TLC555CPWR TLC555CPWRG4 TLC555ID TLC555IDG4 TLC555IDR TLC555IDRG4 TLC555IP TLC555IPE4 TLC555MFKB TLC555MJG TLC555MJGB TLC555MP TLC555QDR
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE
Package Type LCCC CDIP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC PDIP PDIP LCCC CDIP CDIP PDIP SOIC
Package Drawing
Pins Package Plan 2500 Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish
Peak Temp
POST-PLATE Type SNPB NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS)
2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS)
POST-PLATE Type SNPB SNPB Call NIPDAU Type Type Call Level-1-220C-UNLIM
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Addendum-Page
PACKAGE OPTION ADDENDUM
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31-Jan-2006
Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
Addendum-Page
MECHANICAL DATA
MCER001A JANUARY 1995 REVISED JANUARY 1997
(R-GDIP-T8)
0.400 (10,16) 0.355 (9,00)
CERAMIC DUAL-IN-LINE
0.280 (7,11) 0.245 (6,22)
0.065 (1,65) 0.045 (1,14)
0.063 (1,60) 0.015 (0,38)
0.020 (0,51)
0.310 (7,87) 0.290 (7,37)
0.200 (5,08) Seating Plane 0.130 (3,30)
0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20)
0°-15°
4040107/C 08/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with ceramic using glass frit. Index point provided terminal identification. Falls within 1835 GDIP1-T8
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MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
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MECHANICAL DATA
MPDI001A JANUARY 1995 REVISED JUNE 1999
(R-PDIP-T8)
0.400 (10,60) 0.355 (9,02)
PLASTIC DUAL-IN-LINE
0.260 (6,60) 0.240 (6,10)
0.070 (1,78) 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) Seating Plane 0.125 (3,18) 0.010 (0,25) Gage Plane
0.020 (0,51)
0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25)
0.430 (10,92)
4040082/D 05/98 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Falls within JEDEC MS-001
latest package information,
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MECHANICAL DATA
MTSS001C JANUARY 1995 REVISED FEBRUARY 1999
(R-PDSO-G**)
PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65
0,30 0,19
0,10
0,15 4,50 4,30 6,60 6,20 Gage Plane 0,25 0,75 0,50
Seating Plane 1,20 0,15 0,05 0,10
PINS
3,10
5,10
5,10
6,60
7,90
9,80
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: linear dimensions millimeters. This drawing subject change without notice. Body dimensions include mold flash protrusion exceed 0,15. Falls within JEDEC MO-153
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