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105K MUSIC SYNTHESIZER GENERAL DESCRIPTION SPF30A1 fully CMOS int
Top Searches for this datasheetSPF30A1 105K MUSIC SYNTHESIZER GENERAL DESCRIPTION SPF30A1 fully CMOS integrated circuit. uses advanced design process technology combine 8-bit RISC processor, 4-channel music synthesizer, 7.5K-byte program ROM, 160-byte working SRAM, timer/counter, I/Os, 630K-bit sound expandable memory interface single chip. sound processing logic unique design achieve high quality melody effect. simulate types musical instruments programming tone controlling envelope slope each channel. Every channel also defined speech channel provide percussion, animal sounds, fire, explosions other special sound effects accompany with main music rhythm. FEATURES 8-bit RISC controller Built-in speech/melody channels music BLOCK DIAGRAM OSCI synthesis programmable music tones provide compressed speech around seconds (7KHz sample/3-bit ADPCM) provide non-compressed speech around seconds (7KHz sample/6-bit PCM) Provide audio pins stereo sound Provide bytes SRAM Provide 7.5K bytes program Provide 105K voice Provide Power Down mode 8-bit counter, sources general I/Os input pins Crystal R-osc. code option XTAL OSCO 8-bit RISC controller 7.5K-byte Music Synthesizer AUD1 160-byte SRAM AUD2 Speech Memory 105K PORT I/Os, Inputs IOAB7-0 (I/O) IOCD1-0, (I/O) IOCD2, (INPUT) IEFB7-0 (INPUT) Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 FUNCTION DESCRIPTION INTERNAL MEMORY $0000 SRAM $0200 TEST PROGRAM $0600 USER'S PROG $1FFF User's program contains user's control program functions, channel speech/melody generations, calculations other control functions. rest area could used store speech data melody chord. GENERATION SPEECH MELODY fixed address area $0080-$00A3 designed address pointers data buffer channel speech/melody generation. When channel defined speech, user sets 17-bit address pointer point VOICE area. data fetched buffer normal mode directly sent direct output mode. register used control volume speech each output. channel defined melody channel, user should channel normal speech mode, fetch chord decode note first. After that, user should that channel melody mode select tone TONE ROM, thus programming A19-16 controlling envelope choose instrument. Then play data buffer synchronous rhythm with change time base (tempo). STOP CLOCK MODE SPF30A1 supports power saving mode those applications needing very stand-by current. user simply enables wake-up sources stop clock writing SLPSTAR register($02A). Thus will stand-by mode remain their previous state until awakened. There three sources wake-up this chip: PORT wake-up, counter wake power wake wake source read after reset reading SLEEPR ($0016) register. Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 DESCRIPTION Mnemonic CPUVDD AVSS OSCI OSCO RESET TEST AUD2 IEFB7 IOAB7 IOCD1 IOCD3 IOCD7 IOCD5 14-21 22-29 13-12 30-31 Type Ground reference logic pins Ground reference analog circuit CRYSTAL CRYSTAL RESET TEST MODE AUDIO OUTPUT INPUT PROGRAMMABLE PROGRAMMABLE INPUT PROGARMMABLE Description Positive supply logic pins ABSOLUTE MAXIMUM RATINGS Characteristics Supply Voltage Input Voltage Range Operating Temperature Storage Temperature Symbol TSTO Ratings 7.0V -0.5V 0.5V +150 Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device. normal operational conditions AC/DC Electrical Characteristics. Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 ELECTRICAL CHARACTERISTICS Limit Characteristics Operating Voltage Operating Current Standby Current Frequency Audio Output Current Input High Level Input Level Output High IOAB7-0,IOCD0 Output Sink IOAB7-0,IOCD1-0 Output Sink IOCD7-4 Input Resistor IEFB7-0 Clock Symbol Min. ISTBY FOSC2 IAUD -1.0 Typ. 3.58 -2.0 Max. 4-battery Fcpu 4.0MHz load 4.2V 0.8V 0.8V Pull FCPU FOSC Unit Test Condition 12.0 FCPU Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 Speaker 200K DIODE RESET IEFB7 IEFB6 IEFB5 IEFB4 IEFB3 IEFB2 IEFB1 IEFB0 TEST OSCO OSCI CPUVD AVSS AUD1 AUD2 IOAB0 IOAB1 IOAB2 IOAB3 IOAB4 IOAB5 IOAB6 IOAB7 IOCD7 IOCD6 IOCD5 IOCD4 IOCD3 IOCD2 IOCD1 IOCD0 Sunplus Technology Co., Ltd. 8050 8050 0.01 Crystal SPF30A1 APPLICATION NOTES SPF30A1 Application circuit Rev.: 1999.12.13 SPF30A1 Current Mode Speaker Driver RB1: 1.5K RB1: RB2: 1.5K 8050 8050 Figure RB1: 2K~10K; RB2: ~1K; ~0.1 Figure RB1: 2K~10K; RB2: ~1K; ~0.1 Enable 8050 8050 Figure RB1: (Vol) RB2: 1N4148 Figure Power 8050 LM386 AUDP Figure Figure Figure simplest uses with impedance speaker. high operation current, cost cheapest. Figure same Figure high impedance speaker used. Figure pass filter. provide higher speech quality, always takes high operation current. Figure Improved version Figure standby current controlled enable pin. Figure current mirror mode. able control volume. addition, more stable lower operation current than Figure 1-3. Figure High quality, operation current CKT, more expensive. Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 ASSIGNMENT LOCATIONS Assignment Chip Size: 2800 3350 This substrate should connected Note: ensure function properly, please bond VDD, VSS, AVDD AVSS pins. Ordering Information Product Number SPF30A1-nnnnV-C Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999); version Package Type Chip form NOTE: SUNPLUS TECHNOLOGY CO., reserves right make changes time without notice order improve design performance supply best possible product. Sunplus Technology Co., Ltd. Rev.: 1999.12.13 SPF30A1 Locations Name IOCD0 IOCD1 OSCO AVSS AUD1 AUD2 OSCI RESET TEST IOCD2 IOCD3 IEFB7 IEFB6 IEFB5 IEFB4 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 -1206 1213 1213 1213 1213 1453 1256 1045 -407 -548 -801 -971 -1194 -1485 -1493 -1239 -1099 -846 Name IEFB3 IEFB2 IEFB1 IEFB0 IOAB7 IOAB6 IOAB5 IOAB4 IOAB3 IOAB2 IOAB1 IOAB0 IOCD7 IOCD6 CPUVDD IOCD5 IOCD4 1213 1213 1213 1213 1213 1213 1213 1213 1213 1215 1023 -542 -806 -705 -452 -312 1145 1354 1447 1447 1447 1447 1402 1447 1446 DISCLAIMER information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication regarding freedom described chip(s) from patent infringement. FURTHER, SUNPLUS MAKES WARRANTY MERCHANTABILITY FITNESS PURPOSE. SUNPLUS reserves right halt production alter specifications prices time without notice. Accordingly, reader cautioned verify that data sheets other information this publication current before placing orders. Products described herein intended normal commercial applications. Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. reference purposes only. Please note that application circuits illustrated this document Sunplus Technology Co., Ltd. Rev.: 1999.12.13 Other recent searchesSTP3NA50 - STP3NA50 STP3NA50 Datasheet STP3NA50FI - STP3NA50FI STP3NA50FI Datasheet ST7-40 - ST7-40 ST7-40 Datasheet SS6104 - SS6104 SS6104 Datasheet ON1110 - ON1110 ON1110 Datasheet MT9HVF6472 - MT9HVF6472 MT9HVF6472 Datasheet MT9HVF12872 - MT9HVF12872 MT9HVF12872 Datasheet HX8002 - HX8002 HX8002 Datasheet AM6T-Z - AM6T-Z AM6T-Z Datasheet
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