MATRIX DRIVER GENERAL DESCRIPTION SPLD80A5, matrix common/segment
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SPLD80A5
MATRIX DRIVER
GENERAL DESCRIPTION SPLD80A5, matrix common/segment driver, fabricated power CMOS technology. This includes 80-bit shift register, 80-bit data latch 80-bit 4-level driver. converts serial data parallel data outputs waveform LCD.
FEATURES Supply voltage: 2.4V 3.4V 3.6V 5.5V driver voltage: Bias voltage supplied externally Built-in double triple voltage converters Serial data input Chain function Four types driving configurations Mode Common segment
BLOCK DIAGRAM
FUNCTION DESCRIPTION SPLD80A5 provides four types driving configurations various applications: MODE SEGMENT COMMON O[80:1] C[80:1] O[48:1] S[48:1]; O[80:49] C[32:1] O[32:1] S[32:1]; O[80:33] C[48:1] O[80:1] S[80:1]
MODE
O[16:1]
O[32:17]
O[48:33]
O[64:49]
O[80:65]
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
COM/SEG Data COMMON SEGMENT Display Output Level
DESCRIPTION Mnemonic data shift clock also used clock double/triple voltage generator. data shifted 80-bit latch falling edge data setup time data hold time required between DIN` alternate signal data load. When LOAD` HIGH` shift register contents transferred driver through level shifter. When LOAD` Type Segment/Common output Description
LOW` last display data which transferred when LOAD` high, held. data input (mode=0);segment data input(mode=1) data applied this shifted transferred driver. DO80 data output(mode=0);common data input(mode=1). When MODE` LOW` 80th shift register content output from DO80` When MODE` HIGH` data applied DO80` will shifted bit-33 bit-49 depends state VDD(*2) VSS(GND) Ground input Common/Segment select Power input reference voltage input highest:V1 lowest:V5
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
Mnemonic CUP1 CUP2 VSS2 Type Coupling capacitor Coupling capacitor Double voltage output, 'MEN' assigned LOW', VSS2 will grounded. Master enable: generate -voltage tripler disable This should controlled CPU. Before entering standby mode, MEN` must programmed LOW` turn double/triple voltage generator. Only driver programmed master. Triple voltage output, MEN` assigned LOW` will grounded. MODE Mode select, combined with com/seg, modes selected. MODE selects pure driver. MODE indicates combined driver. Description
ABSOLUTE MAXIMUM RATINGS Characteristics Supply Voltage Supply Voltage Input Voltage Range Symbol VDD+IVEEI Ratings -0.5V VDD+0.5V
Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device. normal operational conditions AC/DC Electrical Characteristics.
ELECTRICAL CHARACTERISTICS Limit Characteristics Operating Voltage Symbol Min. Operating Current Standby Current Input High Level Input Level Output High Output Sink ISTBY -100 Typ. Max. 2-battery 3-battery Unit Test Condition
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
VSS2
LCDEN
(P34P)
MODE
CUP1 CUP2 VSS2
Sunplus Technology Co., Ltd.
SPL512A
LD(LOAD)
(P35P) (P33P)
SPLD80A5
DO80
SPLD80A5
SPLD80A5
VSS2 MODE
(P32P)
RESBP
O80-1
MODE
O80-1
O80-1
RESBP Rosc Suggest 50KHz~200KHz
APPLICATION NOTES
SEG[160-81] SEG[80-1]
SEG160-1
COM80-1
Panel
SPLD80A5 Application circuit
Rev.:1.1
2000.02.23
SPLD80A5
VSS2
doubler- short VSS2 tripler short
MODE DO80 SPLD80A5 O[48:1] O[80:49] CUP1 VSS2 CUP2
Note Connect substrate floating.
COM[32:1]
Sunplus Technology Co., Ltd.
SEG[48:1] COM[32:1]
Device
SPLD80A5 1/32duty, segments application circuit
SEG[48:1]
Rev.:1.1
2000.02.23
SPLD80A5
Timing Panel Dimension Segments Commons) Assignments: DO112 MODE[1,0] [High, High] SEGMENTS[80.1] O[80.1] COMMONS[32.1] O[112.81]
Voltage Define: DF=1 COMMON-Selection Alternative Voltage COMMON-NonSelection Alternative Voltage SEGMENTS Turn Voltage SEGMENTS Turn Voltage Pixel Turn Differential Voltage (VDD DF=0
Note: Data COM1 Should shifted SPLD80A5 before Change High. (which indicate Start Frame).
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
Frame Duty
COM1 Selected Period COM2 Selected Period
COM1
COM2
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
Timing Characteristic Operation (Operation Condition: Voltage Frequency 5MHz) Parameter Data Latch Setup Time Data Latch Hold Time High High Width Common-Outputs High Segment-Outputs transition High (Hold Time) Symbol TWLD TLCOM TLSEG TDFFP TLDFP Min. Max. Unit
Depend Load Depend Load
Note that Signal must "NonOverlap"
TWCP CP80
TWLD
TLSEG
TLCOM
SEGMENTS
COMMONS
TLDFP
TDFFP
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
ASSIGNMENT LOCATIONS Assignment
Chip Size: 5560 3350 This substrate should connected
Note: ensure function properly, please bond VDD, VSS, AVDD AVSS pins.
Ordering Information Product Number SPLD80A5-nnnnV-C Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999) version Package Type Chip form
NOTE: SUNPLUS TECHNOLOGY CO., reserves right make changes time without notice order improve design performance supply best possible product.
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
SPLD80A5
Assignment Name -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2605 -2411 -2250 -2100 -1954 -1810 -1675 -1540 -1403 -1268 -1128 -993 -852 -717 -577 1408 1238 1069 -204 -357 -497 -632 -773 -908 -1053 -1209 -1363 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 Name MODE DO80 CUP2 CUP1 VSS2 -442 -301 -166 1057 1192 1327 1471 1616 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 2605 Rev.:1.1 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1518 -1451 -1290 -1133 -982 -830 -695 -556 -421 -281 -146 2000.02.23
Sunplus Technology Co., Ltd.
SPLD80A5
Name 2605 2605 2605 1625 1480 1336 1201 1066 -160 1088 1233 1378 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 Name -295 -436 -571 -711 -846 -986 -1121 -1262 -1397 -1537 -1672 -1813 -1957 -2101 -2263 -2425 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517 1517
DISCLAIMER information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication regarding freedom described chip(s) from patent infringement. FURTHER, SUNPLUS MAKES WARRANTY MERCHANTABILITY FITNESS PURPOSE. SUNPLUS reserves right halt production alter specifications prices time without notice. Accordingly, reader cautioned verify that data sheets other
information this publication current before placing orders. Products described herein intended normal commercial applications. Applications involving unusual environmental reliability requirements,
e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. reference purposes only. Please note that application circuits illustrated this document
Sunplus Technology Co., Ltd.
Rev.:1.1
2000.02.23
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