DRIVER WITH 80-CHANNEL GRAY LEVEL OUTPUTS GENERAL DESCRIPTION SPL
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SPLD801A
DRIVER WITH 80-CHANNEL GRAY LEVEL OUTPUTS
GENERAL DESCRIPTION SPLD801A, 4-gray-level matrix driver with high voltage CMOS technology from SUNPLUS, able provide varieties common/segment combinations applications. Four types combinations provided: segments, SEG, SEG. operating voltage SPLD801A from through with maximum 5.0MHz working frequency (@3.3V). addition, this includes 160-bit shift register, 160-bit data latch, 80-bit 4-level driver, built-in resisters bias charge pump VLCD voltage. converts serial data parallel data outputs waveform LCD.
FEATURES 4-gray-level capability selected from gray scale software programming Operating Voltage: 3.0V 6.0V Maximum working Frequency: 5.0MHz 3.3V driver voltage (VDD VSS3) Built-in voltage converter (Double/Triple Negative Voltage generator) Bias voltage supplied externally Serial data input Chain function (for segment only) Interface compatible with SPLXXX controller Provide 1-bit mode gray level mode Built-in bias 1/12 bias selected software programming Built-in different brightness selected software programming types combinations: segments, SEG, SEG,
BLOCK DIAGRAM
PGMB
2-bit shift Register
31-bit Control Register
2-bit Latch
Gray scale control Decoder
Level Shifter selector
driver 80-bit (SEG/COM)
VDD, V5.V1
Bias Voltage Control
VSS3 BIASEN CUP1 CUP2
[80.1]
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
REGISTER DESCRIPTION PGMB controlled controller through I/O. When PGMB FP='1', SPLD801A starts shift command register content. side when PGMB '0', shifts common data when PGMB '1', shifts data. inputs common data when PGMB '0'. inputs segment data when PGMB '1'.
PGMB PGMB Start shift command register content Common Data
Shift command data Shift data
Input Common data Input segment data
REGISTER (When PGMB "LOW" "HIGH", represents command data) COM0 $0x00 $0x01 $0x02 $0x03 COM1 BIT1 LUT33 LUT13 CKSEL LUT32 LUT12 LUT31 LUT11 LUT30 LUT10 DATA VSEL GCP3 LUT23 LUT03 GCP2 LUT22 LUT02 GCP1 LUT21 LUT01 GCP0 LUT20 LUT00
DATA
DISPLAY BUFFER Users able select 4-level gray scale from SPLD801A. Each gray scale ranges from levels) that indicates level gray color, from light dark. Position DB0[3.0] DB0[7.4] DB1[3.0] DB1[7.4] Symbol LUT0 LUT1 LUT2 LUT3 Description gray scale gray scale gray scale gray scale
GCP[0.3]: Pre-set value Pre-scale counter generate gray scale clock source.
Divider Total number segment (number gray-level)/16 (number scale) pre-set value GCP[3.0] (divider Sunplus Technology Co., Rev.: 2000.07.10
SPLD801A
When gray level driver used, Register from SPLXXX must ensure clock source truly duty cycle square wave. gray level clock source isn't exactly duty cycle square wave, will appropriate gray level pulse width signals. pulse width defined Register will skip some combinations miss some colors because Register `0'. Therefore, sure Register when using gray level driver.
Example Common Segment panel, total segment number Divider
GCP[3.0] [3.0] [0101]
Frame Rate: 60Hz Clock 184KHz Clock (for SPLXXX) 1.5MHz (For example N=3)
Frame Rate: 80Hz Clock 246KHz Clock (for SPLXXX) 2.0MHz(For example N=3)
Clock selected between 1.5MHz 2.0MHz, Frame Rate panel will between 60Hz 80Hz.
Example Common Segment panel, total segment number
GCP[3.0] 10-1 GCP[3.0] [1001]
Frame Rate: 60Hz Clock 768KHz Clock N(for SPLXXX) 1.5MHz (For example N=1) 3.0MHz (For example N=2)
Frame Rate: 80Hz Clock 1.0MHz Clock N(for SPLXXX) 2.0MHz(For example N=1) 4.0MHz(For example N=2)
Clock selected between 1.5MHz 2.0MHz(3.0MHz 4.0MHz), Frame Rate panel will between 60Hz 80Hz.
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
BS[0.2]: bits bias selections Bias Bias 1/12 Bias; totally options selected. [0.2] Bias 1/10 1/11 1/12
BIT1: Gray Level Mode Gray Level Mode Selections ($0x01.7) Gray Level Mode, gray scales selected (each gray scale ranges levels). Gray Level Mode
BR[0.2]: bits brightness selections ($0x00.[2:0]). Brightness adjust; options selected
Vsel: Register selecting triple double negative voltage (0x00.3). double negative voltage triple negative voltage
SC[0.1]: 2-bit register programming number Commons Segments (0x00.[5.4]) bits number commons segments.
Segments
Commons
CKSEL: select clock source CK1) generate gray level scale (DB3 [6]) (SPLXXX CPF2 registers must "0") (When number segment larger than 128, clock source generate gray level scale need select ck1)
Clock number 16*N, [3:0] Sunplus Technology Co., Rev.: 2000.07.10
SPLD801A
DESCRIPTION Mnemonic Type Segment/Common output data shift clock. data shifted 160-bit latch falling edge "CP". data setup time data hold time required between "DIN" "CP". alternate signal Common data input data load. When "LD" "HIGH", shift register contents transferred driver through level shift. When "LD" "LOW", last display data that transferred when "LD" high, will held. Segment data input. data applied this shifted transferred driver. DOUT When number segments greater then SPLD801A used. segment data will transferred from DOUT next SPLD801A. BIASEN CUP1 CUP2 VSS2 VSS3 Coupling capacitor charge pump Double voltage output when "MEN" "HIGH". Triple voltage output when "MEN" "HIGH". This clock needed double/triple voltage generator. frequency suggested approx. 200KHz. PGMB When "FP" "HIGH" "PGMB" "LOW" data input "DIN" program some functions driver status. clock source generate gray level when segment number larger than 128. enable internal make bias. enable internal charge pump VLCD voltage. Digital power input Ground input reference voltage; highest:V1 lowest Description
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
ABSOLUTE MAXIMUM RATINGS Characteristics Supply Voltage Input Voltage Range Operating Temperature Storage Temperature Symbol TSTO
Ratings 7.0V -0.5V 0.5V +150
Note: Stresses beyond those given Absolute Maximum Rating table cause operational errors damage device. normal operational conditions AC/DC Electrical Characteristics.
ELECTRICAL CHARACTERISTICS Limit Characteristics Operation Voltage Voltage Operation Current Operation Frequency Level Input Level Level Output Level Driver Resistance Bias Driving Current IBIAS VDD-0.4 DOUT K-Ohm VLCD 10V, Load current Symbol Min. VLCD Typ. Max. 3.3V, 1.0MHz 3.3V 3.3V, CK1, DIN, CKV, LCDEN, MEN, PGMB Unit Test Condition
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
TIMING CHARTS APPLICATION EXAMPLE SEGMENTS COMMONS
frame
COM0
Selected period (one horizontal period)
SEG0
Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level Gray level LUT:<1011> LUT:<1100> LUT:<1101> LUT:<1110> LUT:<1111>
Active pulse width= 6/16 period 3/16
LUT:<0000> LUT:<0001> LUT:<0010> LUT:<0011> LUT:<0100> LUT:<0101>
D148 D149 D150 D151 D152 D153 D154 D155 D156 D157 D148 D159
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
Charge Pump Bias Voltage Generator
Output) Charge CUP1 Common/Segment Voltage
Pump VSS2 VSS3 Vsel CUP2
Brightness Control Bias elect 100K BIASEN Description Charge Pump Off, Bias connect Charge Pump Off, Bias Charge Pump Bias OFF, Output -State Charge Pump Bias
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
Command COM0
Display
PGMB
Data
Common Data
Command
Common Data
Sunplus Technology Co.,
Rev.:
Timing Diagram Gray Level Driver
2000.07.10
SPLD801A
Memory Mapping
Command Display Data Command Display Data
(D7-0)
COM0 COM1
(D7-0)
COM0 COM1
(D7-0)
(D7-0)
Controller Buffer
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
O[80:49]
PANEL
O[48:1]
SPLD801A
LCDCKV LCDEN O[80:1] CUP1 CUP2 VSS2 VSS3 O[80:1]
SPL130A
PGMB
BIASEN DOUT
APPLICATION CIRCUIT
Fig(1): SPLD801A Double Negative Voltage
Sunplus Technology Co.,
Rev.:
Common Segment
2000.07.10
SPLD801A
COM[1:80] O[80:1]
D080 MODE CUP2
Common Segment PANEL
SPLD80A
VSS2 CUP1
SEG[1:80]
SPLD801A
LCDCKV LCDEN
O[80:1] CUP1 CUP2 VSS2 VSS3 O[80:1]
Fig(2): SPLD801A Double Negative Voltage
Sunplus Technology Co.,
PGMB
DOUT
BIASEN
SPL130A
Rev.:
2000.07.10
SPLD801A
COM[1:80] D080 MODE CUP2 O[80:1]
LCDEN
PANEL
SPLD80A
VSS2
CUP1
SEG[1:80]
SPLD801A
LCDCKV LCDEN
O[80:1] CUP1 CUP2 VSS2
O[80:1]
SPL130A
VSS3
Fig(3): SPLD801A Triple Negative Voltage
Sunplus Technology Co.,
PGMB
BIASEN
DOUT
Rev.:
Common Segment
2000.07.10
SPLD801A
SPLD801A
O[80:1]
COM[47:0]
Common Segment PANEL
SEG[111:80] SEG[79:0]
VSS2 VSS3 PGMB
BIASEN
DOUT
SPLD801A
LCDCKV LCDEN
SPL130
CUP1 CUP2 VSS2 VSS3
O[80:1]
DOUT
Fig(4): SPLD801AX2 Common*112 Segment Panel
Sunplus Technology Co.,
PGMB
BIASEN
Rev.:
CUP1 CUP2
2000.07.10
SPLD801A
COM[1:80]
Common Segment PANEL
LCDCKV
O[80:1] MODE
SPLD80A
VSS2
DO80 CUP2
SEG[159:80]
CUP1
SEG[79:0]
LCDCKV LCDEN
SPL130
DOUT
DOUT
Fig(5): SPLD80A SPLD801AX2 Common*160 Segment Panel
Sunplus Technology Co.,
CUP1 CUP2 VSS2 VSS3 PGMB
O[80:1]
SPLD801A
O[80:1]
LCDCKV LCDEN CUP1 CUP2 VSS2 VSS3 PGMB
SPLD801A
BIASEN
BIASEN
Rev.:
2000.07.10
SPLD801A
ASSIGNMENT LOCATIONS ASSIGNMENT
Chip Size: 4190 3820 This substrate should connected floating
Note: ensure function properly, please bond pins.
Ordering Information Product Number SPLD801A-nnnnV-C
Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999); version
Package Type Chip form
NOTE: SUNPLUS TECHNOLOGY CO., reserves right make changes time without notice order improve design performance supply best possible product.
Sunplus Technology Co.,
Rev.:
2000.07.10
SPLD801A
LOCATIONS Name PGMB BIASEN DOUT VSS2 VSS3 CUP1 CUP2 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1909 -1744 -1592 -1457 -1322 -1187 -1052 -917 -782 -647 -512 1738 1595 1451 1308 1164 1020 -136 -279 -423 -567 -710 -854 -997 -1141 -1285 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 Name -377 -242 -107 1108 1243 1378 1513 1648 1783 1918 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 1920 Rev.: -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1507 -1277 -1134 -990 -846 -703 -559 -416 -272 -128 2000.07.10
Sunplus Technology Co.,
SPLD801A
Name
1920 1920 1920 1920 1920 1920 1920 1918 1783 1648 1513 1378 1243 1108
1020 1164 1308 1451 1595 1738 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958
Name
-107 -242 -377 -512 -647 -782 -917 -1052 -1187 -1322 -1457 -1592 -1743 -1900
1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958 1958
DISCLAIMER information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication regarding freedom described chip(s) from patent infringement. FURTHER, SUNPLUS MAKES WARRANTY MERCHANTABILITY FITNESS PURPOSE. SUNPLUS reserves right halt production alter specifications prices time without notice. Accordingly, reader cautioned verify that data sheets other information this publication current before placing orders. Products described herein intended normal commercial applications. Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. reference purposes only. Please note that application circuits illustrated this document
Sunplus Technology Co.,
Rev.:
2000.07.10
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