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80-CHANNEL SEGMENT DRIVER GENERAL DESCRIPTION SPLC063A driver whi
Top Searches for this datasheetSPLC063A 80-CHANNEL SEGMENT DRIVER GENERAL DESCRIPTION SPLC063A driver which fabricated power CMOS technology. Basically consists 40-bit bi-directional shift registers, data latch flip-flops liquid crystal display driver circuits. 80-channel outputs applied segment driver. SPLC063A receives serial display data from display control LSI, converts into parallel data supplies liquid crystal display waveforms liquid crystal. interface compatible with SPLC100. reduces number LSI's lowers cost module. FEATURES Liquid crystal display driver with serial/parallel BLOCK DIAGRAM Part1 Part2 conversion function. Interface compatible with SPLC100; connectable with SPLC780. Internal output circuits driver: Internal serial/parallel conversion circuits: 40-bit bi-directional shift register 40-bit latch Power supply: Internal logic: 2.7V 5.5V Liquid crystal display driver circuit: 3.0V 11.0V CMOS process. DRIVER DRIVER Data Latch(40bit) Data Latch(40bit) Bidirectional Shift Register(40bit) Bidirectional Shift Register(40bit) CONTR LOGIC SHL1 SHL2 Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A FUNCTION DESCRIPTION matrix driver with channel outputs. Input Output signal Output: channel waveform driving Input: -Serial display data control pulse from controller LSI. -Bias voltage OUTPUT Waveform OUTPUT DATA OUTPUT (Y80 selected level Non-selected level BLOCK FUNCTION DRIVER Select four levels voltage driving transfer output terminals according combination data latch circuit. DATA LATCH Latches data input from bi-directional shift register fall transfer outputs driver circuits. Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A BI-DIRECTIONAL SHIFT REGISTER Shifts serial data fall transfers output each register latch circuit. When SHL1/SHL2=GND, data input from DL1/DL2 shifts from order entry. other hand, when SHL1/SHL2=VDD, data shifts from bit-1. data last register latched output from DR1/DR2 rise CL2, when SHL1/SHL2=GND. data last register latched output from DL1/DL2 rise when SHL1/SHL2=VDD. SHL1/SHL2=GND driver outputs Data Latch DL1/DL2 DR1/DR2 SHL1/SHL2=V Shift register driver outputs Data Latch DR1/DR2 DL1/DL2 Shift register Relation between SHL1/SHL2 Shift Direction Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A DESCRIPTION PIN(No.) VDD(59) VSS(GND)(55) VEE(50) (51, (53, SHL1(57) Output Input Part1 driver Data Interface Input Input driver Power Input Output Name Operating Voltage Negative Supply Voltage Desperation logical circuit(2.7V 5.5V) (GND) driver circuit Bias voltage level driver output (Select level) Bias voltage level driver (Nonselect level) driver output Selection shift direction shift register SHL1 Power Power Supply Interface voltage level DL1, (61, SHL2(58) Input Output Output Input Part2 driver Data Interface Data input/output shift register (part1) Controller SPLC063A driver output Selection shift direction shift register SHL2 DL2, (63, M(65) Input Output Input Alternated signal driver output Data input/output shift register (part alternating signal convert driver waveform CL1: Data latch clock CL2: Data shift clock Controller SPLC063A Controller CL1, (56, Input Data shift/latch clock Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A ABSOLUTE MAXIMUM RATINGS Characteristic Operation Voltage Driver Supply Voltage Input voltage Input voltage Symbol VIN1 VIN2 Value -0.3 +7.0 VDD-12V VDD+0.3V -0.3 +0.3 VDD+0.3 VEE-0.3 Unit Input Voltage applies Input Voltage applies other pins. CHARACTERISTICS (VDD 10%,VEE Symbol ILKG 10%, 0V,TA Test Condition 400KHZ fCL1 1KHZ Min. 0.7VDD -5.0 Max. -1.0 0.3VDD Unit CL1,CL2,DL1, DL2,DR1,DR2, SHL1,SHL2,M Applicable VDD, Characteristic Operating Current Supply Current Input High Voltage Input Voltage Input Leakage Current Output High Voltage Output Voltage Voltage Descending -0.4mA +0.4mA 0.1mA VDD-0.4 DL1,DL2, DR1,DR2 V(V4 1)-Y(Y80 0.05mA each Leakage Current (Output ;floating) Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A CHARACTERISTICS (VDD Characteristic Data shift frequency Clock High level Width Clock level Width Data set-up time Clock set-up time Clock set-up time Clock rise/fall time Date delay time Date hold time 10%,VEE 10%,VSS 0V,TA -20~+75 Min. Max. CL1,CL2 DL1,DL2,DR1,DR2 DL1,DL2,DR1,DR2 Unit Test Condition (CL2 CL1) (CL1 CL2) 15pF Symbol TWCKH TWCKL TR/TF Application CL1,CL2 DL1,DL2,DR1,DR2 TIMING CHARACTERISTIC tWCKH tWCKL Data (DL1,DL2) (DR1,DR2) tWCKH Data (DL1,DL2) (DR1,DR2) Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A APPLICATIONS NOTES COM16-1 Segment SEG40-1 SPLC780A Other Negative Voltage Y80-1 SHL1 SHL2 SPLC063A SHL1 SHL2 SPLC063A Signal Y80-1 OPEN Application circuit 1/16 Duty, Bias COM16-1 SEG40-1 SPLC780A Other Negative Voltage Y80-1 SHL1 SHL2 SPLC063A Segment Signal Y80-1 SHL1 SHL2 SPLC063A OPEN Application circuit Duty, Bias Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A Timing Chart Input Waveforms (Shift Clock) Input Data SEG80 SEG79 SEG78 SEG3 SEG2 SEG1 (Display Data) 1:on 0:off (Latch Clock) OUTPUT DATA Driver output Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A ASSIGNMENT LOCATIONS ASSIGNMENT Chip Size: 4450 2910 This IC's substrate should connected Note: ensure function properly, please bond VDD, AVDD AVSS pins. Ordering Information Product Number SPLC063A-nnnnV-C Note1: Code number (nnnnV) assigned customer. Note2: Code number (nnnn 0000 9999); version Package Type Chip form NOTE: SUNPLUS TECHNOLOGY CO., reserves right make changes time without notice order improve design performance supply best possible product. Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A LOCATIONS Name -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -2057 -1921 -1783 -1646 -1509 -1372 -1235 -1097 -960 -823 -686 -549 -411 -274 -138 1283 1096 -137 -275 -412 -548 -686 -823 -961 -1097 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 Name SHL1 SHL2 1096 1233 1371 1507 1645 1782 1919 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 2056 1919 Rev.: -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1284 -1097 -961 -823 -686 -548 -412 -275 -137 1096 1283 1283 2000.02.23 Sunplus Technology Co., Ltd. SPLC063A Name 1782 1645 1507 1371 1233 1096 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 Name -138 -274 -411 -549 -686 -823 -960 -1097 -1235 -1372 -1509 -1646 -1783 -1921 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 1283 Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A PACKAGE CONFIGURATION 100L View SPLC063 SHL1 SHL2 Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A PACKAGE INFORMATION 100L Outline Dimensions Unit: inch/mm Sunplus Technology Co., Ltd. Rev.: 2000.02.23 SPLC063A DISCLAIMER information appearing this publication believed accurate. Integrated circuits sold Sunplus Technology covered warranty patent indemnification provisions stipulated terms sale only. SUNPLUS makes warranty, express, statutory implied description regarding information this publication regarding information this publication regarding freedom described chip(s) from patent infringement. FURTHER, SUNPLUS MAKES WARRANTY MERCHANTABILITY FITNESS PURPOSE. SUNPLUS reserves right halt production alter specifications prices time without notice. Accordingly, reader cautioned verify that data sheets other information this publication current before placing orders. Products described herein intended normal commercial applications. Applications involving unusual environmental reliability requirements, e.g. military equipment medical life support equipment, specifically recommended without additional processing SUNPLUS such applications. Please note that application circuits illustrated this document reference purposes only. Sunplus Technology Co., Ltd. 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