Designer's Guide (Preliminary) Order 1101 Rev. October 1996

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Designer's Guide (Preliminary) Order 1101 Rev. October 1996

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WaveArtist010 Audio System Device
Designer's Guide (Preliminary)
Order 1101 Rev. October 1996
WaveArtist010 Audio System Device Designer's Guide
NOTICE
Information furnished Rockwell International Corporation believed accurate reliable. However, responsibility assumed Rockwell International use, infringement patents other rights third parties which result from use. license granted implication otherwise under patent rights Rockwell International other than circuitry embodied Rockwell products. Rockwell International reserves right change circuitry time without notice. This document subject change without notice.
WaveArtist trademark Rockwell International. Microsoft MS-DOS registered trademarks Microsoft Corporation. Windows, Windows Windows Sound System, DirectSound trademarks Microsoft Corporation. Sound Blaster trademark Creative Technology Ltd.
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WaveArtist010 Audio System Device Designer's Guide
Table Contents
INTRODUCTION .1-1 Summary.1-1 Features.1-2 DESCRIPTION .2-1 General .2-1 2.1.1 Sample Rate Conversion .2-1 Synthesis .2-1 Stereo Codec/Mixer.2-1 Host Software .2-1 Music Processor (RWA030 Option) .2-1 2.1.2 Hardware Signal Interfaces .2-1 2.1.3 Host Software .2-1 Specifications .2-2 HARDWARE INTERFACE.3-1 Interface Signals, Assignments, Signal Descriptions.3-1 Hardware Interface Circuits 3-10 3.2.1 Host Plug Play (PnP) Interface. 3-10 3.2.2 Serial EEPROM Interface 3-10 3.2.3 Audio Interface 3-10 3-11 Line 3-11 Input 3-12 Input 3-12 Mono 3-12 Line 3-13 Mono 3-14 3.2.4 Enhanced CD-ROM Interface. 3-15 3.2.5 Joystick/MIDI Interface 3-16 Joystick Interface 3-16 MIDI Interface 3-17 3.2.6 Modem Interface. 3-17 3.2.7 RWA030 Music Processor Interface. 3-17 3.2.8 Crystal Interface Circuit. 3-18 INTERFACE TIMING WAVEFORMS .4-1 Timing.4-1 Serial EEPROM Interface Timing .4-5 MIDI Serial Interface Timing .4-6 HOST SOFTWARE INTERFACE.5-1 Interface Register Map.5-1 PLUG-AND-PLAY INTERFACE.6-1 Resource Data .6-1
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WaveArtist010 Audio System Device Designer's Guide
DESIGN CONSIDERATIONS .7-1 BOARD LAYOUT GUIDELINES .7-1 7.1.1 General Principles.7-1 7.1.2 Component Placement.7-1 7.1.3 Signal Routing .7-2 7.1.4 Power .7-3 7.1.5 Ground Planes.7-3 7.1.6 Crystal Circuit .7-3 CRYSTAL/OSCILLATOR SPECIFICATIONS .7-5 PACKAGE DIMENSIONS .7-6
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WaveArtist010 Audio System Device Designer's Guide
List Figures
Figure 1-1. RWA010 with RWA030 Block Diagram.1-4 Figure 3-1. RWA010 Interface Signals .3-2 Figure 3-2. RWA010 Signals 144-Pin PQFP .3-3 Figure 3-3. Typical EEPROM Interface Connection 3-10 Figure 3-4. Typical Microphone Interface Circuit. 3-11 Figure 3-5. Typical Line Interface Circuit 3-11 Figure 3-6. Typical Input Interface Circuit 3-12 Figure 3-7. Typical Input Interface Circuit 3-12 Figure 3-8. Typical Mono Interface Circuit 3-13 Figure 3-9. Typical Line Interface Circuit 3-13 Figure 3-10. Typical Mono Interface Circuit 3-14 Figure 3-11. Typical CD-ROM Interface Circuit (RWA010) 3-15 Figure 3-12. Typical Joystick/MIDI Interface Circuit 3-16 Figure 3-13. Typical Modem Interface Circuit 3-17 Figure 3-14. Typical Crystal Interface Circuit 3-18 Figure 4-1. Waveforms Timing System Write.4-2 Figure 4-2. Waveforms Timing System Read.4-2 Figure 4-3. Waveforms Timing ~Chip Select Throughput Delay .4-3 Figure 4-4. Waveforms Timing Throughput Delay .4-3 Figure 4-5. Waveforms Timing Throughput Delay.4-4 Figure 4-6. Waveforms Timing DACK Throughput Delay .4-4 Figure 4-7. Waveforms Timing Serial EEPROM Interface.4-5 Figure 4-8. Waveforms Timing Serial EEPROM Interface.4-6 Figure 4-9. Waveforms Timing MIDI Interface .4-6 Figure 7-1. Package Dimensions 144-Pin TQFP .7-6
List Tables
Table 1-1. Models Functions .1-3 Table 2-2. Current Power Requirements .2-2 Table 2-3. Recommended Operating Conditions .2-2 Table 2-4. Absolute Maximum Ratings.2-2 Table 3-1. RWA010 Hardware Interface Signal Definitions .3-4 Table 3-2. Input/Output Type Descriptions .3-7 Table 3-3. Digital Electrical Characteristics.3-8 Table 3-4. Analog Performance .3-9 Table 3-5. Analog Performance .3-9 Table 4-1. Timing Serial EEPROM Interface .4-5 Table 5-1. Interface Register .5-1 Table 7-1. RWA010 Noise Characteristics.7-4 Table 7-2. Crystal Specifications 50.8032 .7-5
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WaveArtist010 Audio System Device Designer's Guide
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WaveArtist010 Audio System Device Designer's Guide
INTRODUCTION
Summary
Rockwell WaveArtist010 (RWA010) WaveArtist030 (RWA030) audio system devices small, profile, PQFP/TQFP packages. These devices provide increasing functionality from synthesis (RWA010), high quality music wavetable synthesis (RWA010 RWA030), high quality music wavetable synthesis with optional effects processor upgrade (RWA010, RWA030, RWA035). (See Table 1-1.) RWA010 Audio System Controller Codec supports synthesis, 16-bit stereo audio with simultaneous record playback, Plug-and-Play (PnP) interface with 16-bit (RWA010) 12-bit (RWA011) address cost effective, expandable audio audio/modem system designs. RWA010 also compatible with applications that Sound Blaster Pro, Yamaha OPL3, AdLib, MPU-401 interfaces. Also supported game port with internal timers, RWA011 only, enhanced CD-ROM interface. General MIDI compatible wavetable synthesis provided adding RWA030 Music Processor (Figure 1-1). Unless otherwise noted, references RWA010 also include RWA011. RWA010 packaged 144-pin TQFP. This document describes RWA010 RWA011. RWA010, when used with Rockwell modem, provides seamless integration high speed data/fax modem, voice/audio, AudioSpan simultaneous voice data, speakerphone functions. RWA030 Music Processor, featuring Audio Kurzweil special audio effects, 80-pin PQFP, supports high quality sound designs either RWA010 external interface configuration. connects RWA010 other controller, wavetable ROM, optional downloadable sound sample DRAM 8MB), optional RWA035. RWA030 RWA035 described RWA030 Music Processor Designer's Guide (Order 1103). RWA035 Effects Processor Upgrade, 80-pin PQFP, adds professional quality sound processing such concert hall other spatial features RWA030. RWA035 connects external DRAM. Host software, compatible with Windows Sound System (WSS), provided Windows Windows 3.1x, Windows DirectSound environments. software utility also available configure interface MS-DOS environment. part part approved reference hardware designs available.
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WaveArtist010 Audio System Device Designer's Guide Features
RWA010 Audio System Controller Codec 16-bit stereo audio single mixed-signal device 16-bit delta sigma codec with Sound Blaster compatible Simultaneous (full-duplex) record playback 8-bit 16-bit sample record playback from 44.1 Digital sample rate conversion with resolution Integrated OPL3/OPL2 AdLib compatible synthesis with external required external analog input channels stereo, mono) Independent left right channel mixers each with external inputs internal input (digitally summed optional wavetable, signals) external analog output channels stereo, mono) Uses single crystal oscillator Integrated hardware interfaces MPU-401 MIDI UART compatible Enhanced CD-ROM compatible (RWA011) Joystick with internal timers (game port compatible) interface Programmable resource data RWA030 Music Processor 80-pin PQFP General MIDI compatible wavetable synthesis supports voices 44.1 Basic effects reverb, chorus, spatialization Treble bass equalization Interface wavetable Interface sound sample DRAM 8MB) Interface RWA035 Effects Processor Upgrade RWA035 Effects Processor Upgrade 80-pin PQFP Full effects reverb, chorus delay Spatial placement effects Interface DRAM profile, small footprint packages RWA010: 144-pin TQFP RWA030: 80-pin PQFP Power management Applications Integrated audio/telephony cards Motherboards, notebooks, add-on cards audio/games Windows Sound System (WSS) DirectSound
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WaveArtist010 Audio System Device Designer's Guide
Table 1-1. Models Functions
Required Devices Functions RWA010/RWA011 (Note RWA010/RWA011 (Note RWA030, RWA031/RWA032 (Note RWA010/RWA011 (Note RWA030, RWA031/RWA032 (Note RWA035
Synthesis High Quality Wavetable Synthesis Spatialization Effects (Reverb Chorus) Equalization (Treble Bass) Professional Quality Effects Processing (Reverb, Chorus, Delay, Concert, Auditorium, etc.) Notes:
RWA010 supports 16-bit address CD-ROM interface; RWA011 supports 12-bit address CD-ROM interface. RWA031/RWA032 optional 1MB/2MB wavetable RWA030.
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WaveArtist010 Audio System Device Designer's Guide
CONTROL, ADDRESS, DATA
ROCKWELL MODEM (e.g., RC366ACF/SP) TYPICAL MODEM CONNECTION
TELEPHONE LINE INTERFACE
TELEPHONE LINE
CONTROL DATA
RWA011 ONLY
CD-ROM SIGNALS
ENHANCED CD-ROM INTERFACE
CD-ROM
CONTROL, ADDRESS, DATA RWA010/RWA011 AUDIO SYSTEM CONTROLLER CODEC [144-PIN TQFP]
MONOIN MONOOUT MICROPHONE (LMIC, RMIC) LINE (LLINE, RLINE) LINEOUT (LOUT, ROUT) (LAUX1, RAUX1) (LAUX2, RAUX2)
MIDI JOYSTICK SIGNALS
GAME PORT
WAVETABLE EEPROM (256B) RWA030 MUSIC PROCESSOR [80-PIN PQFP]
OPTIONAL DRAM
RWA035 EFFECTS PROCESSOR UPGRADE [80-PIN PQFP] [OPTIONAL)
DRAM 256KB)
MD152F1 RWA010/RWA030
Figure 1-1. RWA010 with RWA030 Block Diagram
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WaveArtist010 Audio System Device Designer's Guide
DESCRIPTION
General
2.1.1 Sample Rate Conversion Analog inputs outputs sampled 44.1 kHz. internal sample rate converter converts samples sample rates ranging from 44.1 kHz. sample rate converter eliminates need external synthesis. also allows single crystal support sample rates. Synthesis internal OPL3 OPL2 compatible synthesis engine operate either 2-operator 4-operator mode. Address, data, status registers provided compatibility with AdLib/Sound Blaster interfaces. Stereo Codec/Mixer integrated 16-bit delta sigma stereo codec simultaneously mixes, records, plays with high fidelity. record multiplexer stereo input selects from four external stereo inputs, external mono input, internal mixer. mixer combines external inputs into stereo input record multiplexer. playback, separate stereo mono outputs provided. samples digitally mixed with wavetable synthesizer samples, then converted analog outputs. Volume controls provided input output paths. Host Software Windows Sound System (WSS) compatible recording playback 16-bit 8-bit audio supported Rockwellprovided host driver software which controls WaveArtist using WaveArtist command/status registers. Music Processor (RWA030 Option) RWA030 supports 32-voice polyphony General MIDI wavetable synthesis 44.1 kHz. provides several basic audio effects, including reverb, chorus, sound spatialization (reverb chorus available during wavetable synthesis operation). Additionally, treble/bass equalization PCM, wavetable synthesis signals. external used store wavetable sounds. Sound samples loaded into optional external DRAM played back with internal synthesis engine. This interface also supports multiple hardware static buffers, allowing games written DirectSound playback sounds more efficiently more than sample mixed same time. additional high quality effects, interface provided RWA035 Effects Processor Upgrade device. RWA035 programmed with additional sound delay processing algorithms such concert hall other spatial effects. 2.1.2 Hardware Signal Interfaces 3.2. 2.1.3 Host Software Host software provided Windows Windows 3.1x (WSS), Windows Windows Windows 3.11, Hardware Installation Module (HIM) assists installation Ring driver (MIDI/FM I/O, wave I/O, mixer/volume control, wave sample download), Ring (virtual device driver allocation physical resources). Windows .INF file works conjunction with install Ring driver (wave I/O, mixer/volume control, wave sample download), Ring (resource management). DirectSound also supported Windows utility available configure interface MS-DOS environment.
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WaveArtist010 Audio System Device Designer's Guide Specifications
power requirements listed Table 2-2. recommended operating conditions listed Table 2-3. absolute maximum ratings listed Table 2-3.
Table 2-2. Current Power Requirements
Current (ID) Model RWA010 Normal Mode Power Down Mode Typical Current (mA) Maximum Current (mA) Power (PD) Typical Power (mW) Maximum Power (mW) 50.8032
Notes: Test conditions: typical values; 5.25 maximum values.
Table 2-3. Recommended Operating Conditions
Rating Supply Voltage Units
Table 2-4. Absolute Maximum Ratings
Parameter Supply Voltage Input Voltage Operating Temperature Range Storage Temperature Range Analog Inputs Voltage Applied Outputs High Impedance (Off) State Input Clamp Current Output Clamp Current Static Discharge Voltage (25°C) Latch-up Current (25°C) Symbol TRIG Limits -0.5 +7.0 -0.5 (+5VD +0.5) +125 -0.3 (+5VA 0.3) -0.5 (+5VD 0.5) ±2500 ±200 Units
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WaveArtist010 Audio System Device Designer's Guide
HARDWARE INTERFACE
Interface Signals, Assignments, Signal Descriptions
RWA010 interface signals shown Figure 3-1. RWA010 assignments 144-pin TQFP shown Figure 3-2. RWA010 signals described Table 3-1. hardware input/output interface circuit type described Table 3-2. digital interface signal characteristics described Table 3-3. analog-to-digital (ADC) interface signal characteristics described Table 3-4. digital-to-analog (DAC) interface signal characteristics described Table 3-5.
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WaveArtist010 Audio System Device Designer's Guide
MIDI_RX MIDI_TX
GAME PORT (JOYSTICK MIDI) INTERFACE
CRYSTAL CIRCUIT
XTLI XTLO
MIRQ MSEL# RESET#
MODEM INTERFACE
CDIRQ CDDRQ SD[15:0] SA[15:0 11:0]* IOR# IOW# RESET IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 RLINE LLINE CDDACK# CDSEL# CDSEL0# CDSEL1#
CD-ROM INTERFACE (RWA011 ONLY)
INTERFACE
IRQ10 IRQ11 IRQ15 DRQ1 DRQ5 DRQ6 DRQ7 DACK1# DACK5# DACK6# DACK7# IOCS16# SBHE#
WaveArtist (RWA010)/ WaveArtist (RWA011)
RAUX1 LAUX1 RAUX2 LAUX2 RMIC LMIC MONOIN ROUT LOUT MONOOUT VREF
AUDIO INTERFACE
RMIXOUT0 RMIXOUT1 LMIXOUT0 LMIXOUT1 0.47 0.47
SERIAL EEPROM (256B)
XCLK (MHZ50) YCLK (MHZ25) HSIFI HSIFO SADATAI SADATAO BCLK LRCLK SDOUT
RWA030 INTERFACE
XCLK YCLK HSIFI HSIFO SADATAI SADATAO BCLK LRCLK SDIN RESETP
*SA[15:0] RWA010 SA[11:0] RWA011
WRESET#
MD152F2 RWA010
Figure 3-1. RWA010 Interface Signals
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WaveArtist010 Audio System Device Designer's Guide
RESET# MSEL# MIRQ MIDI_TX MIDI_RX SADATAI SADATAO HSIFI SKYRX2 HSIFO CDIRQ**/SA14* CDDRQ**/SA15* XCLK (MHZ50) YCLK (MHZ25) XTLO XTLI CDDACK#**/SA13* CDSEL1# CDSEL0# CDSEL#**/SA12* IOCS16# DRQ7 DRQ6 DRQ5 DRQ1
IA_FS IA_SLEEP IA_TX IA_SCLK IA_RX IA_CTRL IA_FSYNC WRESET# CLKIN AGND AGND CTRLSIN TXSIN SDOUT BCLK LRCLK SLEEP RMIC RMIXOUT1 RMIXOUT0 RAUX1 RAUX2 AGND
RLINE AVDD ROUT VREF MONOOUT LOUT AVDD LLINE LAUX2 LAUX1 MONOIN AGND AGND LMIC LMIXOUT0 LMIXOUT1 AVDD TEST IRQ15 IRQ11 IRQ10 IRQ9 IRQ7 IRQ5 IRQ4 IRQ3
DACK7# DACK6# DACK5# DACK1# SBHE#
SA10
SA11 IOR#
IOW#
RESET SD15
SD14
SD13 SD12
SD11 SD10
RWA010 ONLY. RWA011 ONLY.
MD152F3 144TQFP
Figure 3-2. RWA010 Signals 144-Pin PQFP
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WaveArtist010 Audio System Device Designer's Guide
Table 3-1. RWA010 Hardware Interface Signal Definitions
Label Type General XTLI XTLO 124, 101, 8-9, 123, 95-96, 109, 121, Ixtl, Oxtl Crystal Input, Crystal Output. Connect 50.8032 crystal circuit. Digital Power. Connect VDC. Signal/Definition
AVDD
Analog Power. Connect Digital Ground. Connect digital ground.
AGND SKYRX2 TEST
Itpd Itpd
Analog Ground. Connect analog ground. Test. Host Interface Host Address Enable. Active high input asserted during cycle. logic responds host address command signal lines (IOR# IOW#) when low. Host Address Lines. Host address lines used ADDRESS, WRITE_DATA, READ_DATA ports Port Base decoding. registers decoded with bits (RWA010) bits (RWA011).
SA[15:12] (RWA010 only), SA[11:0]
18-17, 55-54, 5243
SD[15:0]
60-61, 6364, 66-69, 79-76, 7471 88-85, 8380 36-33 41-38
It/Ot12
Host Data Lines. Host bidirectional data lines used transfer data between host RWA010.
IOR# IOW# IRQ[15, DRQ1, DRQ5, DRQ6, DRQ7 DACK1#, DACK5#, DACK6#, DACK7# RESET
Itst Itst Otts8 Otts8
Host Read. Active input asserted strobe read data from RWA010 onto host data (SD[15:0]). This internal 100k pull-up resistor. Host Write. Active input asserted strobe write data from host data (SD[15:0]) into RWA010. This internal 100k pull-up resistor. Interrupt Request. Active high output asserted indicate interrupt request RWA010. Request. Active high output asserted request data transfer. Request Acknowledge. Active input asserted acknowledge corresponding request.
Itst
Host Reset. Active high input asserted reset RWA010. When asserted, internal registers reset their hardware default states. must asserted least before being deasserted. While reset state, host activity ignored. Active output asserted during read write operation. This open collector output driver. System High Enable. Active input asserted when high-order byte host accessed.
IOCS16# SBHE#
Otod12
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WaveArtist010 Audio System Device Designer's Guide
Table 3-1. RWA010 Hardware Interface Signal Definitions
Label Serial EEPROM Interface It/Otod2 Serial EEPROM Clock. clock timing output 24C02 serial EEPROM. Serial EEPROM Address/Data I/O. Bidirectional data from 24C02 serial EEPROM. Connect this external pull-up resistor (e.g., VCC. Serial EEPROM Write Control. Active output allow writing into EEPROM memory. Modem Controller Interface MSEL# Modem Chip Select. Active output modem controller asserted whenever valid address present host address bus, i.e., address which falls within range written host Space Configuration Register. Modem Interrupt Request. Active high input from modem's HINT pin. Modem Reset. Active output; inverse RESET from host bus. This signal used reset modem controller CD-ROM interface. Game Port MIDI Port Interface MIDI_RX MIDI_TX LAUX1 RAUX1 LAUX2 RAUX2 LLINE RLINE LMIC RMIC LOUT ROUT MONOIN MONOOUT VREF LMIXOUT0 LMIXOUT1 RMIXOUT0 RMIXOUT1 Itpu1k Ia/Ocod12 Itpu1k Ia/Ocod12 Itpu Joystick Switch Inputs Binary inputs used determine state Joystick switches These ports each have built-in pull-up resistor. Joystick Position. Analog inputs used determine position Joystick potentiometer. Joystick Switch Inputs Binary inputs used determine state Joystick switches These ports each have built-in pull-up resistor. Joystick Position. Analog inputs used determine position Joystick potentiometer. MIDI Receive. MIDI serial input data from MPU-401 UART compatible interface. This built-in pull-up resistor. MIDI Transmit. MIDI serial output data MPU-401 UART compatible interface. Audio Interface Auxiliary Input Left Right. Auxiliary Input Left Right. Line-Level Input Left Right. Microphone Input Left Right. Line-Level Output Left Right. Monaural Input. Monaural Output. Audio Interconnect Reference Voltage Centerpoint Voltage. Connect analog ground through capacitor capacitor parallel. Reference Voltage. Connect analog ground through parallel. Mixer Coupling Left. Connect LMIXOUT0 LMIXOUT1 though external 0.47 capacitor. Mixer Coupling Right. Connect RMIXOUT0 RMIXOUT1 though external 0.47 capacitor. Signal/Definition
MIRQ RESET#
Itpd
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WaveArtist010 Audio System Device Designer's Guide
Table 3-1. RWA010 Hardware Interface Signal Definitions
Label CDSEL# CDSEL0# CDSEL1# CDIRQ CDDRQ CDDACK# SLEEP TXSIN CLKIN CTRLSIN IA_SLEEP IA_TX IA_FS IA_CTRL IA_FSYNC IA_RX IA_SCLK XCLK (MHZ50) YCLK (MHZ25) SADATAI SADATAO LRCLK BCLK HSIFI HSIFO SDOUT WRESET# Notes: I/O: Input, Output, Device Interconnect. Type: Table 3-2. connection (NC) means external connection allowed (pin connected internal circuitry). Type CD-ROM Interface (RWA011 Only) Itpd Itpd Itpd Itpd CD-ROM Chip Select. CD-ROM Chip Select CD-ROM Chip Select CD-ROM Interrupt Request. CD-ROM Request. CD-ROM Request Acknowledge. RWA010 Interconnect Connect IA_SLEEP. Connect IA_TX. Connect IA_FS. Connect IA_CTRL. Connect SLEEP. Connect TXSIN. Connect CLKIN. Connect CNTLSIN. Connect LRCLK. Connect SDOUT. Connect BCLK. Clock. Connect RWA030 XCLK. Clock. Connect RWA030 YCLK. Serial Audio Data Connect RWA030 SADATAI input. Serial Audio Data Out. Connect RWA030 SADATAO output. Left/Right Clock Serial Audio Data. Connect RWA030 LRCLK RWA010 IA_FSYNC. Clock Serial Audio Data. Connect RWA030 BCLK RWA010 IA_SCLK. High Speed Serial Interface Input. Connect RWA030 HSIFI. High Speed Serial Interface Output. Connect RWA030 HSIFO. Sampled Data Out. Connect RWA030 SDIN RWA010 IA_RX. Reset. Active low. Connect RWA030 RESET. Signal/Definition
RWA030 Interface Associated RWA010 Interconnect
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WaveArtist010 Audio System Device Designer's Guide
Table 3-2. Input/Output Type Descriptions
Type Itpd Itpu Itpu1k Itst Ocod12 Otod2 Otod12 Otts8 Description Device interconnect, electrical characteristics stated. Analog input. Digital input, compatible. Digital input, compatible, internal (typical) pull-down resistor ground. externally driven, input assumes state. Digital input, compatible, internal (typical) pull-up resistor VDD. externally driven, input assumes high state. Digital input, compatible, internal pull-up resistor (typically 50K) VDD. externally driven, input assumes high state. Digital input, compatible, schmitt trigger. Analog output, signal analog characteristics. Digital output, CMOS compatible, Digital output, CMOS compatible, open drain, limited slew rate. Digital output, compatible, Digital output, compatible, Digital output, compatible, open drain, Digital output, compatible, open drain, Digital output, compatible, tristate, external connection allowed (pin connected internal circuitry).
Notes: electrical characteristics Table (digital signals), Table (analog input signals), Table (analog output signals). compatible inputs will accept voltage volts logic level voltage volts logic zero level.
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WaveArtist010 Audio System Device Designer's Guide
Table 3-3. Digital Electrical Characteristics
Parameter Input High Voltage Input Voltage Input High Current Input Current Input Leakage Current Output High Voltage Output Voltage Table 3-2. LOAD ±2.5 LOAD -0.3 µADC 0.8V (VDD-1V) 5.25V, 5.25V, 5.25V Symbol Min. Typ. Max. Units Test Conditions1
Notes: Test Conditions: 70°C, (unless otherwise stated).
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WaveArtist010 Audio System Device Designer's Guide
Table 3-4. Analog Performance
Symbol Resolution bits Instantaneous Dynamic Range LINE Input (typ.) Input (typ.) Total Harmonic Distortion (THD) LINE Input (typ.) Input (typ.) Channel Isolation LINE-to-LINE (min.) LINE-to-MIC, LINE-to-AUX LINE-to-AUX (min.) Channel Gain Mismatch LINE input ±0.5 (max.) input ±0.5 (max.) Input Gain 22.5 (typ.) steps] Path Offset Voltage (typ.) Gain Error (max.) Gain Drift ppm/°C Full Scale Input LINE, MONOIN Vp-p (max.) input Vp-p (max.) input (±20 mVp-p (max.) Input Resistance (min.), (max) Input Capacitance (typ.) Test Conditions: 25°C; Input: sine wave; Conversion rate 44.1 kHz; measurement bandwidth kHz; 16-bit linear coding; dynamic range measured input; measured Vrms input; nominal gain Parameter
Table 3-5. Analog Performance
Parameter Symbol Resolution bits Differential Non-linearity (max.) Total Dynamic Range (typ.) Total Harmonic Distortion (THD) Bypassing Mixer (typ.) Channel Isolation LOUT ROUT >-90 Reference Voltage Voltage (reference (Typ.) 4.0V 2.5V) Load Current (max.) Offset Voltage (typ.), (max.) Full Scale Output Voltage Vp-p (max.) Gain Drift 3000 ppm/°C Deviation from Linear Phase (max.) Output Load Resistance LOUT ROUT (min.) MONOOUT (min.) Mute Attenuation (min.) [for signal level] Pass-band Ripple ±0.1 (max.) Out-of-Band Energy (0.6*FS MHz) (max.) Audible Out-of-Band Level (0.6*FS kHz) (max.) Test Conditions: 25°C; Output: sine wave; Conversion rate 44.1 kHz; measurement bandwidth kHz; 16-bit linear coding; dynamic range measured input; measured Vrms output; nominal gain
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WaveArtist010 Audio System Device Designer's Guide Hardware Interface Circuits
This section describes typical WaveArtist interface circuits connections. Consult following AccelerATor Kits reference designs full schematics typical applications: AK28-D680: ACFSP RWA010/RWA011 Audio/Telephony Internal Card 3.2.1 Host Plug Play (PnP) Interface interface supports logical devices with programmable base address assignments. logical devices typically assigned WaveArtist command/status registers, Sound Blaster Pro, MPU-401, modem, CD-ROM (RWA011 only), game port. address assignment, IRQ, DRQ, DACK signal routing established software driver writing configuration registers after successful isolation. Control lines supported are: Read (IOR#), Write (IOW#), Address Enable (AEN), Reset (RESET), System High (SBHE#) inputs, (IOCS16#) output. Interrupt servicing supported eight Interrupt Request outputs (IRQ[15, 3]). Direct memory access (DMA) supported four Request outputs (DMA[7, four Acknowledge inputs (DACK#[7,6,5,1]). RWA010 address, data, control signals connect directly host without need external glue logic. 3.2.2 Serial EEPROM Interface 3-line serial interface XICOR X24C02 compatible serial EEPROM supported. interface signals Data Clock (SCK) Write Control (WC#) outputs bidirectional Serial Data (SDA) line. Since interface open collector, external pullup resistor required. utility available programming EEPROM from host bus. typical EEPROM interface connection shown Figure 3-3.
WAVEARTIST
Figure 3-3. Typical EEPROM Interface Connection 3.2.3 Audio Interface Stereophonic signals supported are: Microphone (RMIC, LMIC), Line (RLINE, LLINE), Audio (RAUX1, LAUX1), Auxiliary (RAUX2, LAUX2) inputs Audio (ROUT, LOUT) outputs. Monophonic signals supported are: Mono (MONOIN) input Mono (MONOOUT) output.
3-10
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WaveArtist010 Audio System Device Designer's Guide
microphone input signals (LMIC RMIC) supported. typical microphone interface shown Figure 3-4. Figure 3-4, signal from microphone receptacle coupled capacitor LMIC RMIC pins provide input both channels. signal LMIC RMIC optionally routed modem voice input (MIC_V) through isolation capacitor C136. This configuration supports both electret microphone Plantronics headset. external amplifier needed boosting microphone level since provided codec. enabled software control. bias electret microphone provided R123, R124, C143, C144 circuit. side R124 provides filtered bias microphone C143 C144 provide decoupling. bias current should less than 0.65 Plantronics headsets. High frequency noise filtered microphone receptacle capacitor noise suppression provided ferrite inductor
WAVEARTIST
Figure 3-4. Typical Microphone Interface Circuit Line line-level input signals (LLINE RLINE) supported. typical Line interface circuit shown Figure 3-5. Figure 3-5, left channel input voltage divided resistors R114 reduce input voltage VRMS (2.0 VP-P) maximum input level then coupled capacitor LLINE input pin. Similarly, right channel input voltage divided resistors R115 then coupled RLINE input pin. High frequency noise filtered Line receptacle capacitors C117 C118. noise suppression provided ferrite inductors L21.
WAVEARTIST
Figure 3-5. Typical Line Interface Circuit
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WaveArtist010 Audio System Device Designer's Guide
Input auxiliary input signals (LAUX1 RAUX1) supported. typical Input interface circuit CD-ROM shown Figure 3-6. Figure 3-6, left channel input voltage divided resistors reduce input voltage VRMS maximum input level then coupled capacitor LAUX1 input pin. Similarly, right channel input voltage divided then coupled RAUX1 input pin.
WAVEARTIST
Figure 3-6. Typical Input Interface Circuit Input auxiliary input signals (LAUX2 RAUX2) supported. typical Input interface circuit modem/telephone line/telephone handset interface shown Figure 3-7. Figure 3-7, left channel input from modem output coupled capacitor LAUX2 input pin. Similarly, right channel input from modem voice speaker output (SPK_V) coupled RAUX2 input pin.
WAVEARTIST
Figure 3-7. Typical Input Interface Circuit Mono monaural input (MONOIN) supported. typical Mono interface circuit shown Figure 3-8. modem voice application, Mono input typically coupled through modem voice speaker output. speaker application, Mono input typically coupled speaker output from motherboard. speaker output signal from motherboard disconnected from speaker connected through voltage divider MONOIN pin. this application, MONOOUT then routed speaker connector, MONOUT description).
3-12
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WaveArtist010 Audio System Device Designer's Guide
WAVEARTIST
Modem Voice Speaker Interface
WAVEARTIST
Speaker Interface
Figure 3-8. Typical Mono Interface Circuit Line line-level output signals (LOUT ROUT) supported. typical Line interface circuit shown Figure 3-9. Figure 3-9., LOUT output coupled through capacitor left channel line receptacle left channel headset receptacle through attenuator resistor Likewise, ROUT output coupled through right channel line receptacle headset receptacle through attenuator resistor signals routed through ferrite inductors suppression filtered output receptacle capacitors chassis ground.
WAVEARTIST
Figure 3-9. Typical Line Interface Circuit 1101 3-13
WaveArtist010 Audio System Device Designer's Guide
Mono monaural output (MONOOUT) supported. MONOOUT signal left right line channels independently muted. Typical Mono interface circuits supporting connection speaker input modem music input shown Figure 3-10. modem music hold application, MONOOUT coupled through music hold circuit. speaker connection, MONOOUT signal coupled through amplifier circuit which drives speaker through 4-pin header motherboard connection speaker lines. this application, MONOIN connected speaker output signal from motherboard, MONOIN description).
WAVEARTIST
Music Hold Interface
WAVEARTIST
Speaker Interface
Figure 3-10. Typical Mono Interface Circuit
3-14
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WaveArtist010 Audio System Device Designer's Guide
3.2.4 Enhanced CD-ROM Interface supported signals CD-ROM Select output (CDSEL#), programmable address chip select outputs (CDSEL0# CDSEL1#), CD-ROM Interrupt Request output (CDIRQ), CD-ROM Request output (CDDRQ), CD-ROM Request Acknowledge input (CDDACK#). address base signal assignments established setup. typical CD-ROM interface circuit 40-pin CD-ROM header shown Figure 3-11. CD-ROM data lines (CD15:0]) routed from header host data (SD[15:0]) through transceivers (lower bits [7:0]) (upper bits [15:8]). lower data byte from CD-ROM enabled onto host through transceiver when CDSEL# DIOR# (buffered host read, IOR#, through buffer U1). upper data byte from CD-ROM enabled onto host through transceiver when ENHI# DIOR# low. CDSEL0#, CDSEL1#, CDIRQ, CDDACK# RESET#, CDDRQ routed directly header. Pull down resistor connected CDDRQ.
WAVEARTIST
Figure 3-11. Typical CD-ROM Interface Circuit (RWA010)
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3-15
WaveArtist010 Audio System Device Designer's Guide
3.2.5 Joystick/MIDI Interface Eight joystick MIDI signals supported. These signals typically routed standard 15-pin DB-15 game port connector. Only external passive components required complete game port interface circuit. Joystick Interface four timer input pins (JAX, JAY, JBX, JBY) support joysticks four paddles. four button input pins (JA1, JA2, JB1, JB2) support buttons joystick. external timer device required. typical joystick/MIDI interface shown Figure 3-12. Figure 3-12, timer input signal, provide timer debounce period time constant. provide high frequency noise suppression, needed. JAY, JBX, signal interface circuits operate identically. When host writes game port, timer pins discharge external capacitors internal flip-flop output When capacitor charges internal threshold voltage (0.63 time constant), internal flip-flop reset capacitor charging time constant determined joystick potentiometer value external circuit. timer output discharge 0.1µF capacitor from falling edge internal decoded game write signal within host will periodically read game port address push button status calculate coordinate based duration timer flip-flop output being high. switch input routed directly from DB-15 connector, i.e., external pullup resistors required. Capacitor provides switch overshoot protection. JB1, JA2, signal interface circuits operate identically.
WAVEARTIST
Figure 3-12. Typical Joystick/MIDI Interface Circuit
3-16
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WaveArtist010 Audio System Device Designer's Guide
MIDI Interface MIDI serial interface receive transmit serial data logic levels. External hardware required connect signals, MIDI Receive (MIDI_RX) input MIDI Transmit (MIDI_TX) output, interface with other MIDI compatible components. serial data character format consists start (logical eight data bits (LSB shifted first), stop (logical data rate complies with standard MIDI specification. Figure 3-12, MIDI_TX MIDI_RX signals routed directly DB-15 game connector. ferrite inductor each line needed suppression. Each line must connected chassis ground through 1200 capacitor. 3.2.6 Modem Interface Only three signals needed connect WaveArtist Rockwell modem: Modem Reset (RESET#) Modem Chip Select (MSEL#) outputs Modem Interrupt Request (MIRQ) input. typical modem connection shown Figure 3-13. RESET# output connects Modem ~RESET input, MSEL# output connects modem ~HCS input modem data transceiver (U1) input, MIRQ input connects modem HINT output. MSEL# output pulled deselect modem disconnect (provide high impedance) modem data lines from host through transceiver (U1) when WaveArtist active. external pulldown resistor needed MIRQ input. Note that modem data lines normally connected directly data transceiver (U1), however, series resistor required each modem data line some computers reduce signal reflections/switching transients data lines. modem host address inputs (HA2:0], host read (~HRD), host write (~HWT) connect directly host connector. address lines connected through capacitors noise suppression.
MODEM
WAVEARTIST
Figure 3-13. Typical Modem Interface Circuit 3.2.7 RWA030 Music Processor Interface RWA010 controls optional RWA030 Music Processor using Clock (XCLK), Left/Right Clock (LRCLK), Clock (BCLK), Reset (WRESET#) outputs. Digital audio data transferred from RWA030 over Serial Audio Data (SADATAO) Serial Audio Data (SADATAI) lines. Additional control/status/MIDI information transferred from RWA030 over High Speed Interface (HSIFO) High Speed Interface (HSIFI) serial lines. Digital samples analog audio input signals also sent RWA030 using Sampled Data Output (SDOUT) line.
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3-17
WaveArtist010 Audio System Device Designer's Guide
3.2.8 Crystal Interface Circuit Figure 3-14.
WAVEARTIST
Figure 3-14. Typical Crystal Interface Circuit
3-18
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WaveArtist010 Audio System Device Designer's Guide
Interface Timing Waveforms
Timing
system interface timing shown Figure (host write) Figure (host read). chip select signal throughput timing shown Figure 4-3. signal throughput timing shown Figure 4-4. signal throughput timing shown Figure 4-5. DACK signal throughput timing shown Figure 4-6.
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WaveArtist010 Audio System Device Designer's Guide
IOW# tsas taens Timing Requirements IOW# pulse width setup hold setup hold setup hold tsas tsah taens taenh
1104F4-1
tsah
taenh
data input
Figure 4-1. Waveforms Timing System Write
IOR# tsas taens tsrd Timing Requirements IOR# pulse width setup hold setup hold delay hold tsas tsah taens taenh tsrd tsrh @150 loading data output tsrh taenh tsah
1104F4-2-HRD
Figure 4-2. Waveforms Timing System Read
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WaveArtist010 Audio System Device Designer's Guide
valid address
tcsd MSEL# CDSEL# CDSEL0# CDSEL1# Timing Requirements MSEL# delay CDSEL# delay CDSEL0# delay CDSEL1# delay tcsd
tcsd
loading
1104F4-3-HCS
Figure 4-3. Waveforms Timing ~Chip Select Throughput Delay
MIRQ CDIRQ tirqd IRQn tirqd
Timing Requirements IRQn delay tirqd @150 loading
1104F4-4
Figure 4-4. Waveforms Timing Throughput Delay
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WaveArtist010 Audio System Device Designer's Guide
CDDRQ tdrqd DRQn tdrqd
Timing Requirements DRQn delay tdrqd @150 loading
1104F4-5
Figure 4-5. Waveforms Timing Throughput Delay
~DACKn tdackd CDDACK# tdackd
Timing Requirements CDDACK# delay tdackd @150 loading
1104F4-6 CDDACK
Figure 4-6. Waveforms Timing DACK Throughput Delay
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WaveArtist010 Audio System Device Designer's Guide Serial EEPROM Interface Timing
serial EEPROM interface timing shown Figure Table 4-1. Serial EEPROM format shown Figure 4-8.
SCLK
Output
Input
Notes Numbers refer timing requirements listed associated timing table. load: Device EEPROM
1104F4-7 EEPROM
Figure 4-7. Waveforms Timing Serial EEPROM Interface
Table 4-1. Timing Serial EEPROM Interface
Item Definition SCLK time SCLK high time SCLK clock period Start hold after SCLK Data output delay (rising) Data output delay (falling) Stop hold after SCLK Data setup SCLK Data hold after SCLK Min. 1260 1260 2520 Max. Units Figure 4-7, Note Figure 4-7, Note Notes Max. load Max. load Max. load
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WaveArtist010 Audio System Device Designer's Guide
ACTIVITY: MASTER
START
SLAVE ADDRESS
STOP
LINE
DATA
ACTIVITY: EEPROM
Current Address Read
ACTIVITY: MASTER
START
SLAVE ADDRESS
WORD ADDRESS
START
SLAVE ADDRESS
STOP
LINE
DATA
ACTIVITY: EEPROM
Random Read 1104F4-8 EEPROM
Figure 4-8. Waveforms Timing Serial EEPROM Interface
MIDI Serial Interface Timing
MIDI interface waveforms timing shown Figure 4-9.
MIDI_RX MIDI_TX START
STOP
11581F4-9
Figure 4-9. Waveforms Timing MIDI Interface
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WaveArtist010 Audio System Device Designer's Guide
HOST SOFTWARE INTERFACE
This section describes, from orientation interfaces their relative functions,. These interfaces categorized according registers shown Table Sound Blaster Pro, MPU-401, (OPL3), WaveArtist. Each category described separate section within this document.
Interface Register
Table 5-1. Interface Register
Address (Hex) SB+0, SB+8, SB+0, SB+8, SB+1, SB+9, SB+2, SB+8, SB+3, SB+8, SB+4 SB+5 SB+6 SB+A SB+C SB+C SB+E MB+0 MB+1 MB+1 WB+0, WB+2, WB+4 WB+5 WB+6 WB+7 WB+8,9 WB+A,B 3F8-3FF 2F8-2FF 3E8-3EF 2E8-2EF Bits Game Port Music Address Music Status Music Data Music Address Music Data Sound Blaster Mixer Address Sound Blaster Mixer Data Sound Blaster Reset Sound Blaster Data Sound Blaster Data Sound Blaster Write Status Sound Blaster Read Status Data Register Command Register Status Register WaveArtist Command Register Byte WaveArtist Command Register High Byte WaveArtist Data Register Byte WaveArtist Data Register High Byte WaveArtist Control Register (CTRLR) WaveArtist Status Register (STATR) WaveArtist Expansion Control Register WaveArtist Expansion Control Register WaveArtist Expansion Data Register WaveArtist Expansion Data Register Communications Port (COM1) Communications Port (COM2) Communications Port (COM3) Communications Port (COM4) Function
Notes: Sound Blaster interface base register (typically assigned setup). MPU-401 interface base register (typically assigned setup). WaveArtist interface base register (typically between 0250 03F0 assigned setup).
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WaveArtist010 Audio System Device Designer's Guide
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WaveArtist010 Audio System Device Designer's Guide
PLUG-AND-PLAY INTERFACE
interface supported with logical devices. IRQ3 programmable base address assignments available logical devices. Address assignment, IRQ, DRQ, DACK signal routing done software driver writing configuration registers after successful isolation. Plug-and-Play specification.
Resource Data
example resource data shown below.
Address (Dec.) Data (Dec.) Data (Hex.) Description Vendor Name Vendor Product Number 5000 Serial Number: 00000001
Checksum (LFSR) Version Card String Rockwell Identifier string ANSI length length Logical Device Logical Device Wave Artist Wave Audio 5000 Range Check Enabled boot Dependent Function Port Descriptor address decode base base high (0250) base base high (03F0) Alignment base address Range length Format Channel bit, count word
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WaveArtist010 Audio System Device Designer's Guide
Dependent Function Logical Device Logical Device Sound Blaster 5001 Range Check Enabled boot Dependent Function Format Channel bit, count byte Port Descriptor address decode base base high (0220) base base high (0240) Alignment base address Range length Port Descriptor address decode base base high (0388) base base high (0388) Alignment base address Range length Format Dependent Function Logical Device Logical Device MPU401 5002 Range Check Enabled boot Dependent Function Preferred Configuration Port Descriptor address decode address base base high (0330) base base high (0330) Alignment base address Range length Format Dependent Function Acceptable Configuration Port Descriptor address decode address base base high (0300) base base high (0300) Alignment base address Range length Format Dependent Function Suboptimal Configuration Port Descriptor address decode address
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WaveArtist010 Audio System Device Designer's Guide
base base high (0300) base base high (0330) Alignment base address Range length Format Dependent Function Logical Device Logical Device Modem RC288ACF/SP 0160 Range Check Enabled boot Compatible device ID:PNPC11E
Dependent Function COM3 more Most preferred Port Descriptor address decode base base high (03E8) base base high (03E8) Alignment base address Range length Format 5,7,10,11,15 Dependent Function COM4 more Most preferred Port Descriptor address decode base base high (02E8) base base high (02E8) Alignment base address Range length Format 5,7,10,11,15 Dependent Function COM1 Acceptable Port Descriptor address decode base base high (03F8) base base high (03F8) Alignment base address Range length Format 4,5,7,10,11,15 Dependent Function COM2 Acceptable Port Descriptor address decode base base high (02F8)
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WaveArtist010 Audio System Device Designer's Guide
13933 base base high (02F8) Alignment base address Range length Format 3,5,7,10,11,15 Dependent Function COM3 Acceptable Port Descriptor address decode base base high (03E8) base base high (03E8) Alignment base address Range length Format 4,5,7,10,11,15 Dependent Function COM4 Acceptable Port Descriptor address decode base base high (02E8) base base high (02E8) Alignment base address Range length Format 3,5,7,10,11,15 Dependent Function Logical Device Logical Device CD-ROM Dummy placer with resource requested 5003 Range Check Enabled boot Dependent Function real resources Format Dependent Function Logical Device Logical Device Game Port 5004 Range Check Enabled boot Port Descriptor address decode base base high (0201) base base high (0201) Alignment base address Range length Check
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WaveArtist010 Audio System Device Designer's Guide
DESIGN CONSIDERATIONS
Good engineering practices must followed when designing printed circuit board (PCB) containing audio device. This especially important considering record/play analog speech music audio. Suppression noise essential proper operation performance audio device interfacing audio circuits. aspects noise board design containing audio device must considered: on-board/off-board generated noise that affect analog signal levels analog-to-digital conversion (ADC)/digital-to-analog conversion (DAC), on-board generated noise that radiate off-board. Both on-board off-board generated noise that coupled on-board affect interfacing signal levels quality, especially level analog signals. particular concern noise frequency ranges affecting audio circuit performance. On-board generated electromagnetic interference (EMI) noise that radiated conducted off-board separate, equally important, concern. This noise affect operation surrounding equipment. Most local governing agencies have stringent certification requirements that must specific environments. order minimize contribution circuit design layout EMI, designer must understand major sources reduce them acceptable levels. Proper board layout (component placement orientation, signal routing, trace thickness geometry, etc.), component selection (composition, value, tolerance), interface connections, shielding required board design achieve desired audio performance attain certification. aspects proper engineering practices beyond scope this designer's guide. designer should consult noise suppression techniques described technical publications journals, electronics electrical engineering text books, component supplier application notes. Seminars addressing noise suppression techniques often offered technical professional associations well component suppliers. following guidelines offered specifically help achieve stated audio device performance minimize generation.
BOARD LAYOUT GUIDELINES
7.1.1 General Principles Provide separate digital analog sections board. Keep digital analog components their corresponding traces separate possible minimum) confined defined sections. Keep high speed digital traces short possible. Keep sensitive analog traces short possible. Provide proper power supply distribution, grounding, decoupling. Provide separate filtered/regulated analog power supply. Provide separate digital ground, analog ground, chassis ground appropriate) planes. Provide wide traces power critical signals. Position interface circuits near corresponding off-board connectors.
7.1.2 Component Placement From system circuit schematic, Identify digital analog circuits their components, well external signal power connections. Identify digital, analog, mixed digital/analog components within their respective circuits. Note location power signals pins each device (IC).
Roughly position digital analog circuits separate sections board. Keep digital analog components their corresponding traces separate possible confined their respective sections board. Typically, digital circuits will cover one-half board, analog circuits will cover one-half board. Once sections have been roughly defined, place components starting with connectors jacks.
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WaveArtist010 Audio System Device Designer's Guide
Allow sufficient clearance around connectors jacks mating connectors plugs. Allow sufficient clearance around components power ground traces. Allow sufficient clearance around sockets allow component extractors.
First, place mixed analog/digital components (e.g., converter, converter). Orient components pins carrying digital signals extend onto digital section pins carrying analog signals extend onto analog section much possible. Position components straddle border between analog digital sections.
Place analog components. Place analog circuitry same area PCB. Place analog components close side board containing RLINE, LLINE, RAUX1, LAUX1, RAUX2, LAUX2, RMIC, LMIC, MONOIN, MONOOUT signals. Avoid placing noisy components traces near RLINE, LLINE, RAUX1, LAUX1, RAUX2, LAUX2, RMIC, LMIC, MONOIN, MONOOUT lines.
Place active digital components/circuits decoupling capacitors. Place digital components close together order minimize signal trace length. Place decoupling (bypass) capacitors close pins (usually power ground) they decoupling. Make smallest loop area possible between capacitor power/ground pins reduce EMI. Place host interface components close edge connector accordance with applicable interface standard, e.g., 2.5-in maximum trace length bus. Place crystal circuit close possible audio device
Provide "connector" component, usually zero resistor ferrite bead more points connect section's ground another.
7.1.3 Signal Routing Route audio signals provide maximum isolation between noise sources noise sensitive inputs. When layout requirements necessitate routing these signals together, they should separated neutral signals. noise source, neutral, noise sensitive pins listed Table 7-1. Keep digital signals within digital section analog signals within analog section. (Previous placement isolation traces should prevent these traces from straying outside their respective sections.) Route digital traces perpendicular analog traces minimize signal cross coupling. Provide isolation traces (usually ground traces) ensure that analog signals confined analog section digital traces remain analog section. trace have narrowed route though mixed analog/digital keep trace continuous. Route analog isolation ground trace, least wide. Route digital isolation ground trace, least wide.
Keep host control signals (e.g., IOR#, IOW#, RESET) traces least thick (preferably mil). Keep analog signal (e.g., RMIC, LMIC, LLINE, RLINE) traces least thick (preferably mil) short possible. Keep other signal traces wide possible, least (preferably mil).Route signals between components shortest possible path (the components should have been previously placed allow this). Route traces between bypass capacitors pins, least wide; avoid vias possible. Gather signals that pass between sections (typically speed control status signals) together route them between sections through path isolation ground traces (preferred) points only. path made side only, then isolation trace kept contiguous briefly passing other side jump over signal traces. Avoid right angle degree) turns high frequency traces. smoothed radiuses degree corners. 1101
WaveArtist010 Audio System Device Designer's Guide
Minimize number through-hole connections (feedthroughs/vias) traces carrying high frequency signals. Keep signal traces away from crystal circuit. Distribute high frequency signals continuously single trace rather than several traces radiating from point. Eliminate ground loops, which unexpected current return paths power source. 7.1.4 Power Identify digital power (VDD) analog power (AVDD) supply connections. Where main power enters (edge connector power connector), place electrolytic tantalum capacitor parallel with ceramic capacitor between power ground. These capacitors help supply current surge demands prevent those surges from generating noise power lines that affect other circuits. Provide voltage regulator supply clean analog power (+5VA) AVDD pins. Generally, route power traces before signal traces.
7.1.5 Ground Planes 2-layer design, provide digital analog ground plane areas unused space around under digital analog circuit components, respectively, both sides board, connect them such manner avoid small islands. Connect each ground plane area like ground plane areas same side several points like ground plane areas opposite side through board several points. Connect DGND pins digital ground plane area AGND pins analog ground plane area. Typically, separate collective digital ground plane area from collective analog ground plane area fairly straight gap. There should inroads digital ground plane area extending into analog ground plane area visa versa. 4-layer design, provide separate digital analog ground planes covering corresponding digital analog circuits, respectively. Connect DGND pins digital ground plane AGND pins analog ground plane. Typically, separate digital ground plane from analog ground plane fairly straight gap. design which needs filtering, define additional "chassis" section adjacent bracket plug-in card. Most components (usually ferrite beads/capacitor combinations) positioned this section. Fill unused space with chassis ground plane, connect metal card bracket connector shields/grounds. Keep current paths separate board functions isolated, thereby reducing current's travel distance. Separate board functions are: host interface, audio interface, CD-ROM interface, game port/MIDI interface, modem interface, memory (ROM, DRAM). Power ground each these functions should separate islands connected together power ground source points only. Connect grounds together only point, possible, using ferrite bead. Allow other points grounds connected together necessary suppression. Keep ground traces wide possible, least mil. Keep traces connecting decoupling capacitors power ground their respective short direct (i.e., going through vias) possible.
7.1.6 Crystal Circuit Keep traces component leads connected crystal input output pins (i.e., XTLI XTLO) short order reduce induced noise levels minimize stray capacitance that could affect crystal oscillator. Keep XTLO trace extremely short with bends greater than degrees containing vias since XTLO connected fast rise time, high current driver. Where ground plane available, such 2-layer design, crystal capacitors ground paths using separate short traces wide possible) with minimum angles vias directly corresponding device digital ground nearest crystal pins. Connect crystal cases(s) ground applicable). Connect crystal capacitor ground connections directly audio device. common ground plane ground trace route capacitor corresponding pin.
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WaveArtist010 Audio System Device Designer's Guide
Table 7-1. RWA010 Noise Characteristics
Device VDD, Function Noise Source Neutral 3-4, 8-9, 2530-31, 123124, 96-96, 101, 107, 109, 121-122, 23-24 17-17, 32-36, 38-53,54-61, 63-64, 66-69, 71-74, 76-83, 85-88, 32-36, 38-53,54-61, 63-64, 66-69, 71-74, 76-83, 85-88, 1-2, 17,-18, 26-29 136-143 94-114, 12-14, 20-21116-118, 15,90, 115, 119-120, 125, 127134 10-11 92-94, 97-100, 102106, 108, 110-114, Noise Sensitive
AVDD, AGND Crystal Interface (RWA010) RWA010/ RWA011 Interface (RWA011) EEPROM CD-ROM (RWA011) Game port/MIDI Interface Audio Interface RWA030 interface Modem interface Control, device interconnect, connection
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WaveArtist010 Audio System Device Designer's Guide CRYSTAL/OSCILLATOR SPECIFICATIONS
specifications recommended suppliers crystal listed Table 7-2.
Table 7-2. Crystal Specifications 50.8032
Characteristic Rockwell Part Electrical Frequency Frequency Tolerance Frequency Stability Temperature Aging Oscillation Mode Calibration Mode Load Capacitance, Shunt Capacitance, Series Resistance, Drive Level Operating Temperature Storage Temperature Mechanical Dimensions Mounting Holder Suggested Suppliers Dimensions Mounting Holder 333R45-005 50.8032 nom. 11.5 (0°C 70°C) over years Third overtone Parallel resonant nom. max. max. Drive Level correlation; max. 70°C -40°C 85°C 11.05 4.65 13.46 Through Hole HC-49/U America, Inc. Toyocom U.S.A., Inc. Hy-Q International (USA), Inc. Value
Notes: Characteristics 25°C unless otherwise noted. Supplier Information: Hy-Q International (USA), Inc. Enlanger, (606) 283-5000 America, Inc. Fountain Valley, (714) 557-7833 Toyocom U.S.A., Inc. Costa Mesa, (714) 668-9081
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WaveArtist010 Audio System Device Designer's Guide PACKAGE DIMENSIONS
package dimensions shown Figure 7-1.
DETAIL
Dim.
Millimeters Max. Min. 0.15 0.05 22.25 21.75 20.0 17.5 0.75 0.50 0.17 0.27 0.17 0.11 0.08
Inches* Max. Min. 0.0630 0.0020 0.0059 0.0551 0.8563 0.8760 0.7874 0.6890 0.0197 0.0295 0.0394 0.0197 0.0067 0.0043 0.0106 0.0067
Coplanarity
0.0031
Ref: 144-PIN TQFP (GP00-D252)
DETAIL
Metric values (millimeters) should used layout. English values (inches) converted from metric values include round-off errors.
PD-TQFP-144 (040395)
Figure 7-1. Package Dimensions 144-Pin TQFP
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INSIDE BACK COVER NOTES
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more information: Call 1-800-854-8099 International information: Call 1-714-833-6996 Address: http://www.nb.rockwell.com E-Mail Address: literature@nb.rockwell.com
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©1996, Rockwell International Corporation Printed U.S.A. Rights Reserved

Designer's Guide (Preliminary) Order 1101 Rev. October 1996

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