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Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Current: (typ.
Top Searches for this datasheetMCP6241/2 Rail-to-Rail Gain Bandwidth Product: (typ.) Supply Current: (typ.) Supply Voltage: 1.8V 5.5V Rail-to-Rail Input/Output Extended Temperature Range: -40°C +125°C Available 5-pin SC-70 SOT-23 packages Description Microchip Technology Inc. MCP6241/2 operational amplifiers amps) provide wide bandwidth quiescent current. MCP6241/2 Gain Bandwidth Product (GBWP) (typ.) phase margin. This family operates from single supply voltage 1.8V, while drawing (typ.) quiescent current. addition, MCP6241/2 family supports rail-to-rail input output swing, with common mode input voltage range These amps designed Microchip's advanced CMOS processes. Applications Automotive Portable Equipment Photodiode (Transimpedance) Amplifier Analog Filters Notebooks PDAs Battery-Powered Systems Package Types MCP6241 SOT-23-5 VOUT VIN+ MCP6241R SOT-23-5 VOUT VIN- VIN+ Available Tools SPICE Macro Models www.microchip.com) FilterLab Software www.microchip.com) VIN- Typical Application VIN2 VIN1 MCP6241 VOUT MCP6241 PDIP, SOIC, MSOP VIN- VIN+ VOUT MCP6241U SC-70-5, SOT-23-5 VIN+ VIN- VOUT MCP6242 PDIP, SOIC, MSOP VOUTA VINA_ VOUTB VINB_ VINB+ VINA+ Summing Amplifier Circuit 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Maximum Ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability. Absolute Maximum Ratings .7.0V Inputs Outputs 0.3V 0.3V Difference Input Voltage |VDD VSS| Output Short Circuit Current .continuous Current Input Pins Current Output Supply Pins .±30 Storage Temperature. -65°C +150°C Maximum Junction Temperature (TJ) +150°C Protection Pins (HBM;MM) 200V FUNCTION TABLE Name Function VIN+, VINA+, VINB+ VIN-, VINA-, VINB- VOUT, VOUTA, VOUTB Non-inverting Input Inverting Input Positive Power Supply Negative Power Supply Output ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VDD/2 VOUT VDD/2. Parameters Input Offset Input Offset Voltage Extended Temperature Input Offset Drift with Temperature Power Supply Rejection Input Bias Current Impedance Input Bias Current: Temperature Temperature Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Range Common Mode Rejection Ratio Open-Loop Gain Open-Loop Gain (large signal) Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current Amplifier VOS/TA PSRR ZDIFF VCMR CMRR -5.0 -7.0 ±3.0 ±1.0 1100 ±1.0 1013||6 1013||3 +5.0 +7.0 Units Conditions -40°C +125°C, (Note) µV/°C -40°C +125°C, ||pF ||pF -0.3V 5.3V, VOUT 0.3V 0.3V, 0.5V Output Overdrive 1.8V 5.5V +85°C +125°C VOL, 0.5V Note: SC-70 package only tested +25°C. DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, +25°C, +1.8 5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Parameters Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density µVp-p nV/Hz fA/Hz GBWP 0.30 V/µs Units Conditions TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, +1.8V +5.5V GND. Parameters Temperature Ranges Extended Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SC70 Thermal Resistance, 5L-SOT-23 Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Note: °C/W °C/W °C/W °C/W °C/W +125 +125 +150 (Note) Units Conditions internal Junction Temperature (TJ) must exceed Absolute Maximum specification +150°C. 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 Note: TYPICAL PERFORMANCE CURVES graphs tables provided following this note statistical summary based limited number samples provided informational purposes only. performance characteristics listed herein tested guaranteed. some graphs tables, data presented outside specified operating range (e.g., outside specified power supply range) therefore outside warranted range. Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 Percentage Occurrences Samples CMRR, PSRR (dB) 5.0V PSRR (VCM VSS) CMRR (VCM -0.3 +5.3 Input Offset Voltage (mV) Ambient Temperature (°C) FIGURE 2-1: Input Offset Voltage. FIGURE 2-4: Temperature. Open-Loop Gain (dB) CMRR, PSRR Ambient PSRR, CMRR (dB) 1.E+01 Gain CMRR PSRR+ 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 Phase -120 -150 -180 5.0V 1.E+02 1.E+03 1.E+04 1.E+05 Frequency (Hz) 100k -210 100k Frequency (Hz) FIGURE 2-2: Frequency. PSRR, CMRR FIGURE 2-5: Frequency. Percentage Occurrences Open-Loop Gain, Phase Percentage Occurrences Samples +85°C Samples +125°C Input Bias Current (pA) Input Bias Current (nA) FIGURE 2-3: Input Bias Current +85°C. FIGURE 2-6: Input Bias Current +125°C. DS21882B-page 2004 Microchip Technology Inc. Open-Loop Phase PSRR- 10.0 5.0V VDD/2 MCP6241/2 Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 10,000 Input Noise Voltage Density (nV/Hz) Percentage Occurrences Samples -40°C +125°C 1,000 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 Frequency (Hz) Input Offset Voltage Drift (µV/°C) FIGURE 2-7: Frequency. Input Offset Voltage (µV) -100 -200 -300 -0.4 -0.2 -40°C +25°C +85°C +125°C Input Noise Voltage Density FIGURE 2-10: Input Offset Voltage Drift. Input Offset Voltage (µV) Common Mode Input Voltage Output Voltage FIGURE 2-8: Input Offset Voltage Common Mode Input Voltage 1.8V. Input Offset Voltage (µV) -100 -200 -0.5 Common Mode Input Voltage -40°C +25°C +85°C +125°C FIGURE 2-11: Output Voltage. Input Offset Voltage Short Circuit Current (mA) +ISC +125°C +85°C +25°C -40°C -ISC Power Supply Voltage FIGURE 2-9: Input Offset Voltage Common Mode Input Voltage 5.5V. FIGURE 2-12: Output Short-Circuit Current Ambient Temperature. 2004 Microchip Technology Inc. DS21882B-page 100k MCP6241/2 Note: Unless otherwise indicated, +25°C, +1.8V +5.5V, GND, VDD/2, VOUT VDD/2, VDD/2 0.50 0.45 Slew Rate (V/µs) 0.40 0.35 0.30 0.25 0.20 0.15 0.10 Ambient Temperature (°C) Rising Edge, Rising Edge, Falling Edge, Falling Edge, 120.00 100.00 80.00 60.00 40.00 20.00 0.00 Output Voltage mV/div) -20.00 -9.E+00 -40.00 +1V/V 1.E+00 1.E+01 2.E+01 3.E+01 Time µs/div) FIGURE 2-13: Temperature. Output Voltage Headroom (mV) 1,000 Slew Rate Ambient FIGURE 2-16: Pulse Response. Small Signal Non-Inverting +1V/V Output Voltage 0.00001 0.01µ 0.0001 0.1µ 0.001 0.01 100µ -2.E+01 0.E+00 Output Current Magnitude Time µs/div) 2.E+01 4.E+01 6.E+01 8.E+01 FIGURE 2-14: Output Voltage Headroom Output Current Magnitude. Output Voltage Swing (Vp-p) FIGURE 2-17: Pulse Response. Large Signal Non-Inverting Quiescent Current Amplifier (µA) 0.5V +125°C +85°C +25°C -40°C 1000 100k 10000 100000 Frequency (Hz) 1000000 Power Supply Voltage FIGURE 2-15: Frequency. Output Voltage Swing FIGURE 2-18: Quiescent Current Power Supply Voltage. DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 APPLICATION INFORMATION MCP624X VOUT MCP6241/2 family amps manufactured using Microchip's state-of-the-art CMOS process specifically designed low-power generalpurpose applications. supply voltage, quiescent current wide bandwidth makes MCP6241/2 ideal battery-powered applications. Rail-to-Rail Input Maximum expected Minimum expected MCP6241/2 amps designed prevent phase reversal when input pins exceed supply voltages. Figure shows input voltage exceeding supply voltage without phase reversal. Input, Output Voltages FIGURE 3-2: Resistor (RIN). Input Current-Limiting VOUT 5.0V Rail-to-Rail Output 0.E+00 1.E+00 2.E+00 3.E+00 4.E+00 5.E+00 6.E+00 7.E+00 8.E+00 9.E+00 1.E+01 output voltage range MCP6241/2 amps (min.) (max.) when connected VDD/2 5.5V. Refer Figure 2-14 more information. Capacitive Loads Time ms/div) FIGURE 3-1: Phase Reversal. MCP6241/2 Show input stage MCP6241/2 amps differential input stages parallel. operates common mode input voltage (VCM) other high VCM. With this topology, device operates with above below VSS. Input Offset Voltage measured ensure proper operation. Input voltages that exceed input voltage range (VSS 0.3V 0.3V 25°C) cause excessive current flow into input pins. Current beyond cause reliability problems. Applications that exceed this rating must externally limited with resistor, shown Figure 3-2. Driving large capacitive loads cause stability problems voltage feedback amps. load capacitance increases, feedback loop's phase margin decreases closed-loop bandwidth reduced. This produces gain peaking frequency response, with overshoot ringing step response. unity-gain buffer most sensitive capacitive loads, gains show same general behavior. When driving large capacitive loads with these amps (e.g., when +1), small series resistor output (RISO Figure 3-3) improves feedback loop's phase margin (stability) making output load resistive higher frequencies. does not, however, improve bandwidth. MCP624X RISO VOUT FIGURE 3-3: Output resistor, RISO stabilizes large capacitive loads. Figure gives recommended RISO values different capacitive loads gains. x-axis normalized load capacitance (CL/GN), where circuit's noise gain. non-inverting gains, gain equal. inverting gains, |Gain| (e.g., gives V/V). 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 Recommended RISO 1.E+04 VIN- VIN+ 1.E+03 1.E+02 1.E+01 Guard Ring 1.E+02 1.E+03 1.E+04 100p Normalized Load Capacitance; CL/GN FIGURE 3-5: Inverting Gain. Example Guard Ring Layout FIGURE 3-4: Recommended RISO Values Capacitive Loads. After selecting RISO your circuit, double-check resulting frequency response peaking step response overshoot. Evaluation bench simulations with MCP6241/2 SPICE macro model very helpful. Modify RISO's value until response reasonable. Supply Bypass With this amp, power supply (VDD single-supply) should have local bypass capacitor (i.e., 0.01 within good highfrequency performance. also needs bulk capacitor (i.e., larger) within provide large, slow currents. This bulk capacitor shared with other parts. Non-inverting Gain Unity-Gain Buffer: Connect non-inverting (VIN+) input with wire that does touch surface. Connect guard ring inverting input (VIN-). This biases guard ring common mode input voltage. Inverting transimpedance gain amplifiers (convert current voltage, such photo detectors): Connect guard ring non-inverting input (VIN+). This biases guard ring same reference voltage (e.g., VDD/2 ground). Connect inverting (VIN-) input with wire that does touch surface. Surface Leakage applications where input bias current critical, (printed circuit board) surface leakage effects need considered. Surface leakage caused humidity, dust other contamination board. Under humidity conditions, typical resistance between nearby traces 1012. difference would cause current-to-flow. This greater than MCP6241/2 family's bias current 25°C typ). easiest reduce surface leakage guard ring around sensitive pins traces). guard ring biased same voltage sensitive pin. example this type layout shown Figure 3-5. DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 APPLICATION CIRCUITS Matching Impedance Inputs Compensating Parasitic Capacitance minimize effect offset voltage amplifier circuit, impedance both inverting noninverting inputs needs matched. This done choosing circuit resistor values that total resistance each input same. Figure shows summing amplifier circuit. VIN2 VIN1 MCP624X VOUT analog circuit design, parasitic capacitance compromise circuit behavior; Figure shows typical scenario. input amplifier sees parasitic capacitance several picofarad (CPARA, which includes common mode capacitance typical) large frequency response circuit will include zero. This parasitic zero introduces gain peaking cause circuit instability. MCP624X VOUT CPARA CPARA FIGURE 4-1: Summing Amplifier Circuit. match inputs, voltage sources ground calculate total resistance input nodes. this summing amplifier circuit, resistance inverting input calculated setting VIN1, VIN2 VOUT ground. this case, RG1, parallel. total resistance inverting input Where: RVIN- total resistance inverting input non-inverting input, only voltage source. When ground, both parallel. total resistance non-inverting input Where: RVIN+ total resistance inverting input minimize offset voltage increase circuit accuracy, resistor values need meet condition: FIGURE 4-2: Effect Parasitic Capacitance Input. solution smaller resistor values push zero higher frequency. Another solution compensate introducing pole point which zero occurs. This done adding parallel with feedback resistor (RF). needs selected that ratio CPARA:CF equal ratio RF:RG. 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 DESIGN TOOLS Microchip provides basic design tools needed MCP6241/2 family amps. SPICE Macro Model latest SPICE macro model MCP6241/2 amps available site www.microchip.com. This model intended initial design tool that works well amp's linear region operation room temperature. model file information capabilities. Bench testing very important part design cannot replaced with simulations. Also, simulation results using this macro model need validated comparing them data sheet specifications characteristic curves. FilterLab® Software FilterLab software innovative tool that simplifies analog active-filter (using amps) design. Available free charge from site www.microchip.com, FilterLab software active-filter design tool provides full schematic diagrams filter circuit with component values. also outputs filter circuit SPICE format, which used with macro model simulate actual filter performance. DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 PACKAGING INFORMATION Package Marking Information 5-Lead SC-70 Example: 5-Lead SOT-23 Example: Device MCP6241 BFNN BGNN BHNN Code XXNN MCP6241R MCP6241U Note: BF25 Applies 5-Lead SOT-23. 8-Lead MSOP XXXXXX YWWNNN Example: 6242E 418256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Example: MCP6242 E/P256 0418 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW Example: MCP6242 E/SN0418 Legend: XX.X Customer specific information* Year code (last digits calendar year) Week code (week January week `01') Alphanumeric traceability code Note: event full Microchip part number cannot marked line, will carried over next line thus limiting number available characters customer specific information. Standard marking consists Microchip part number, year code, week code, traceability code (facility code, mask rev#, assembly code). marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 5-Lead Plastic Small Outline Transistor Package (LT) (SC-70) Units Dimension Limits INCHES .026 (BSC) MILLIMETERS* 0.65 (BSC) 0.80 0.80 0.00 1.80 1.15 1.80 0.10 0.10 0.10 0.15 Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Molded Lead Shoulder Lead Thickness Lead Width .031 .031 .000 .071 .045 .071 .004 .004 .004 .006 .043 .039 .004 .094 .053 .087 .012 .016 .007 .012 1.10 1.00 0.10 2.40 1.35 2.20 0.30 0.40 0.18 0.30 *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. JEITA (EIAJ) Standard: SC-70 Drawing C04-061 DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 5-Lead Plastic Small Outline Transistor (OT) (SOT23) Number Pins Pitch Outside lead pitch (basic) Overall Height .035 .057 0.90 Molded Package Thickness .035 .051 0.90 Standoff .000 .006 0.00 Overall Width .102 .118 2.60 Molded Package Width .059 .069 1.50 Overall Length .110 .122 2.80 Foot Length .014 .022 0.35 Foot Angle Lead Thickness .004 .008 0.09 Lead Width .014 .020 0.35 Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .005" (0.127mm) side. EIAJ Equivalent: SC-74A Drawing C04-091 Units Dimension Limits INCHES* .038 .075 .046 .043 .003 .110 .064 .116 .018 .006 .017 MILLIMETERS 0.95 1.90 1.18 1.10 0.08 2.80 1.63 2.95 0.45 0.15 0.43 1.45 1.30 0.15 3.00 1.75 3.10 0.55 0.20 0.50 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Number Pins Pitch .043 Overall Height .030 .037 Molded Package Thickness .000 .006 Standoff Overall Width Molded Package Width Overall Length .016 .031 Foot Length Footprint (Reference) Foot Angle Lead Thickness .003 .009 .009 .016 Lead Width Mold Draft Angle Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MO-187 Drawing C04-111 Units Dimension Limits INCHES .026 .033 .193 TYP. .118 .118 .024 .037 .006 .012 MILLIMETERS* 0.65 0.75 0.85 0.00 4.90 3.00 3.00 0.40 0.60 0.95 0.08 0.22 1.10 0.95 0.15 0.80 0.23 0.40 DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 8-Lead Plastic Dual In-line (PDIP) Number Pins Pitch Seating Plane Molded Package Thickness Base Seating Plane Shoulder Shoulder Width Molded Package Width Overall Length Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Spacing Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits INCHES* .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 MILLIMETERS 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-001 Drawing C04-018 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 8-Lead Plastic Small Outline (SN) Narrow, (SOIC) Number Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Mold Draft Angle Bottom Controlling Parameter Significant Characteristic Units Dimension Limits .053 .052 .004 .228 .146 .189 .010 .019 .008 .013 INCHES* .050 .061 .056 .007 .237 .154 .193 .015 .025 .009 .017 .069 .061 .010 .244 .157 .197 .020 .030 .010 .020 MILLIMETERS 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0.20 0.23 0.33 0.42 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 0.25 0.51 Notes: Dimensions include mold flash protrusions. Mold flash protrusions shall exceed .010" (0.254mm) side. JEDEC Equivalent: MS-012 Drawing C04-057 DS21882B-page 2004 Microchip Technology Inc. MCP6241/2 PRODUCT IDENTIFICATION SYSTEM order obtain information, e.g., pricing delivery, refer factory listed sales office. PART Device Tape Reel and/or Alternate Pinout Examples: Extended Temp., SOIC pkg. MCP6241-E/MS: Extended Temp., MSOP pkg. MCP6241-E/P: Extended Temp., PDIP pkg. MCP6241RT-E/OT: Tape Reel, Extended Temp., SOT-23 MCP6241UT-E/OT: Tape Reel, Extended Temp., SOT-23 pkg. MCP6241UT-E/LT: Tape Reel, Extended Temp., SC-70 pkg. MCP6241T-E/OT: Tape Reel, Extended Temp., SOT-23 pkg. MCP6242-E/SN: MCP6242-E/MS: MCP6242-E/P: MCP6242T-E/SN: Extended Temp., SOIC pkg. Extended Temp., MSOP pkg. Extended Temp., PDIP pkg. Tape Reel, Extended Temp., SOIC pkg. MCP6241-E/SN: Temperature Package Range Device: MCP6241: MCP6241T: MCP6241RT: MCP6241UT: MCP6242: MCP6242T: Single (MSOP, PDIP, SOIC) Single (Tape Reel) (SOT-23) Single (Tape Reel) (SOT-23) Single (Tape Reel) (SC-70, SOT-23) Dual (MSOP, PDIP, SOIC) Dual (Tape Reel) Temperature Range: -40°C +125°C Package: Plastic Package (SC-70), 5-lead (MCP6241U only) Plastic Micro Small Outline (MSOP), 8-lead Plastic (300 Body), 8-lead Plastic Small Outline Transistor (SOT-23), 5-lead (MCP6241, MCP6241R, MCP6241U) Plastic SOIC, (150 Body), 8-lead Sales Support Data Sheets Products supported preliminary Data Sheet have errata sheet describing minor operational differences recommended workarounds. determine errata sheet exists particular device, please contact following: Your local Microchip sales office Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 Microchip Worldwide Site (www.microchip.com) Please specify which device, revision silicon Data Sheet (include Literature using. Customer Notification System Register site (www.microchip.com/cn) receive most current information products. 2004 Microchip Technology Inc. DS21882B-page MCP6241/2 NOTES: DS21882B-page 2004 Microchip Technology Inc. Note following details code protection feature Microchip devices: Microchip products meet specification contained their particular Microchip Data Sheet. Microchip believes that family products most secure families kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using Microchip products manner outside operating specifications contained Microchip's Data Sheets. Most likely, person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable." 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Beijing, 100027, China Tel: 86-10-85282100 Fax: 86-10-85282104 Singapore Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 08/16/04 DS21882B-page 2004 Microchip Technology Inc. Other recent searchesSSR4010CT - SSR4010CT SSR4010CT Datasheet MAX8901 - MAX8901 MAX8901 Datasheet MAX8901A - MAX8901A MAX8901A Datasheet MAX8901B - MAX8901B MAX8901B Datasheet EBE51RD8AGFA - EBE51RD8AGFA EBE51RD8AGFA Datasheet A64E06161 - A64E06161 A64E06161 Datasheet
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