NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| XPC185VFC | Freescale Semiconductor | SECURITY CO-PROCESSOR | 
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| PXAC37KFBD/00,157 | NXP Semiconductors | XA 16-bit microcontroller family 32K/1024 OTP/ROM CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-processor; Package: SOT389-1 (LQFP44); Container: Tray Pack, Bakeable, Multiple |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Equipment in Less Time IP Co-processors simplify the creation of reliable, high-throughput communication , functionality. IDT's IP co-processors allow you to accelerate high-performance forwarding and deep packet , 1 Intelligent Packet Processing White Paper NPUs and our IP co-processors. IDT will also , IDT's IP co-processors glue-lessly interface to Intel's IXP2800 IXP2800 and IXP2400 IXP2400 NPUs. IDT's data- and , applications. IDT's IP co-processors provide specialized hardwareassist to support packet processing at ... | Original |
3 pages, |
OC-768 IXP2800 IXP2400 IDT75P52100 Co-Processors datasheet abstract |
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| Abstract: Developing and Integrating FPGA Co-processors with the Tic6x Family of DSP Processors Paul Ekas , co-processors to off-load a variety of algorithms including Viterbi decoding, Turbo encoding/decoding , processors include on-chip hardware coprocessors where the end application supports the expense of designing , in a channel element card. Texas Instruments successfully utilized coprocessors for Turbo and , end-marketspecific coprocessors unattainable. In these applications where no co-processors are available, Altera has ... | Original |
9 pages, |
EP1C12 Co-Processors co-processor CF-031605-1 CF-031605-1 abstract |
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| Abstract: platforms for developing custom defined coprocessors. These co-processors can be specifically designed to , from Altera Corporation has been developed that enables application of co-processors without , user defined co-processors. This paper will describe an architectural approach for coprocessors that , profiling to identify which functions should be implemented as co-processors and what their performance specifications should be. A novel methodology for implementing co-processors will be described. Finally, a ... | Original |
5 pages, |
uclinux FIR FILTER implementation in c language MPC7455 TMS320C6414 TMS320C6415 TMS320C6416 tms320c6416 application C6416 PPC7400 Nucleus PLUS RTOS datasheet abstract |
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| Abstract: set can be extended by adding external coprocessors. This chapter describes the ARM7TDMI coprocessor , external coprocessors. When the coprocessor is not present, instructions intended for it will trap, and , ARM7TDMI instructions are fetched from memory via the main data bus, and coprocessors are connected to , Undefined instructions are treated by ARM7TDMI as coprocessor instructions. All coprocessors must be absent , undefined instructions are. Thus, all coprocessors must monitor the state of the TBIT output from ARM7TDMI. ... | Original |
4 pages, |
ARM7TDMI instruction set ARM7tdmi coprocessor datasheet abstract |
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| Abstract: search coprocessors ? nPsoft Development Environment ? nP Workbench software development systems with NPU , ? Embedded hardware coprocessors, including Policy Engine search coprocessor, Statistics Engine, and , context switching, and powerful on-chip coprocessors to implement key atomic, single-instruction , Network Coprocessors Multiple on -chip coprocessors further enhance the nP7250 's performance. ... | Original |
1 pages, |
nPX8005 datasheet abstract |
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| Abstract: , and a standardized software API forms the concept of FPGA coprocessors. The design automation tools , shared between all IP blocks and so need only be designed once for all coprocessors. The same design , IP Based Design 2003 Session: RECONFIGURABLE FPGA COPROCESSORS: HARDWARE IP FOR SOFTWARE , Coprocessors as a means of delivering hardware IP to software and system engineers is presented. The hardware and software architecture of FPGA coprocessors is described in detail. A Turbo encoder FPGA ... | Original |
6 pages, |
TMDS320006711 datasheet abstract |
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| Abstract: button, when pressed, will reset the BASIC Stamp chip and both AVR coprocessors. It's designed more to , uploaded to the coprocessors' onboard flash memory. This is done with the AVR Loader program, LoadAVR.exe , each program that uses one or more coprocessors. This will give the coprocessors time to start before , application systems with ease. The onboard AVR coprocessors permit the offloading of compute-intensive and , options. Two user-programmable Atmel AVR coprocessors, preprogrammed for digital I/O, PWM output, analog ... | Original |
9 pages, |
parallax 28301 DF11-12DP-2DSA AVR loader ATTiny13s BS2pe datasheet abstract |
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| Abstract: and secure crypto co-processors, any symmetric or PKI oriented cryptographic algorithm is easy to , COPROCESSORS WATCHDOG EEPROM secureAVR RISC core TIMERS Architecture Features · Hardware , · From 1 to 16 Kbytes of RAM · Fast Crypto Co-processors DPA/SPA Resistant to Implement RSA, DSA ... | Original |
2 pages, |
AT90SC multi sim cards reader AT90SC abstract |
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| Abstract: Using FLEX Devices as DSP Coprocessors T E C H N I C A L B R I E F 4 F E B R U A R Y 1 9 9 6 Multiplier, accumulator, and adder functions can create a performance bottleneck in programmable DSP processors that are used for high-performance DSP applications. You can use Altera FLEX devices as DSP coprocessors to dramatically increase system performance in applications such as video , DSP coprocessors perform computationally intensive, high-rate arithmetic functions, leaving the ... | Original |
2 pages, |
"multiplier accumulator" Co-Processors dsp 32 c processor EPF8452A EPF8636A pn sequence generator using transistor PN generator circuit direct sequence spread spectrum pn sequence generator pn sequence notes pipelined adder 15-bit* pn sequence datasheet abstract |
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| Abstract: crypto co-processors, any symmetric or PKI oriented cryptographic algorithm is easy to implement. , COPROCESSORS WATCHDOG TIMERS EEPROM SPI/USB/MMC Architecture Features ISO 7816-3 INTERFACE , Co-processors DPA/SPA Resistant to Implement RSA, DSA, Elliptic Curves, DES/TDES, AES. · Crypto Toolbox ... | Original |
2 pages, |
ISO-7816 AT90SC 5h02 "Watchdog Timers" AT90SC abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| Xilinx Solutions Database : XKEY 5.0 will not run on machines that don't have math coprocessors Solutions Database XKEY 5.0 will not run on machines that don't have math coprocessors Problem Title: - XKEY 5.0 will not run on machines that don't have math coprocessors Problem Description: - Solution 1: - The XKEY 5.0 program will not run on a PC that doesn't have a math coprocessor. This can be remedied by downloading a version that will from the Xilinx BBS. Download the file xkeynofp www.datasheetarchive.com/files/xilinx/weblinx/techdocs/322.htm |
Xilinx | 23/09/1996 | 1.28 Kb | HTM | 322.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to the as financial modeling and spreadsheets, CAD/CAM, or graphics. The Military i387 SX Math Coprocessor conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is object code Coprocessors. The Military i387 SX is manufactured with Intel's CHMOS III technology and packaged in a 68-lead www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166.htm |
Intel | 03/08/1997 | 2.28 Kb | HTM | 271166.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific fully conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is 8087 Math Coprocessors. The Milit ry i387 SX is manufactured with Intel's CHMOS III technology and www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v2.htm |
Intel | 01/11/1997 | 3.42 Kb | HTM | 271166-v2.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is object Math Coprocessors. The Militry i387 SX is manufactured with Intel's CHMOS III technology and packaged www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v6.htm |
Intel | 01/11/1998 | 3.08 Kb | HTM | 271166-v6.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific fully conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is 8087 Math Coprocessors. The Milit ry i387 SX is manufactured with Intel's CHMOS III technology and www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v3.htm |
Intel | 30/04/1998 | 3.11 Kb | HTM | 271166-v3.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific fully conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is 8087 Math Coprocessors. The Milit ry i387 SX is manufactured with Intel's CHMOS III technology and www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v5.htm |
Intel | 01/08/1998 | 3.11 Kb | HTM | 271166-v5.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is object Math Coprocessors. The Militry i387 SX is manufactured with Intel's CHMOS III technology and packaged www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v4.htm |
Intel | 01/02/1999 | 3.09 Kb | HTM | 271166-v4.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to Coprocessor adds over seventy mnemonics o the Military i386 SX Microprocessor instruction set. Specific fully conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is 8087 Math Coprocessors. The Milit ry i387 SX is manufactured with Intel's CHMOS III technology and www.datasheetarchive.com/files/intel/design/specenvn/intarch/datashts/271166-v1.htm |
Intel | 10/02/1998 | 3.42 Kb | HTM | 271166-v1.htm |
| Military i387(tm) SX Math Coprocessor Military i387(tm) SX Math Coprocessor The Intel Military i387 SX Math Coprocessor is an extension to the Coprocessor adds over seventy mnemonics to the Military i386 SX Microprocessor instruction set. Specific fully conforms to the ANSI/IEEE floating point standard. The Military i387 SX Math Coprocessor is 8087 Math Coprocessors. The Military i387 SX is manufactured with Intel's CHMOS III technology and www.datasheetarchive.com/files/intel/design/litcentr/litweb/1c082.htm |
Intel | 31/01/1997 | 2.5 Kb | HTM | 1c082.htm |
| 80C187 80C187 80C187 80C187 80-Bit Math Coprocessor 80C187 80C187 80C187 80C187 80-Bit Math Coprocessor The Intel 80C187 80C187 80C187 80C187 is a high-performance math coprocessor that extends the architecture of the 80C186 80C186 80C186 80C186 with floating-point, extended integer, and BCD data types. A . The 80C187 80C187 80C187 80C187 is upward object-code compatible from the 8087 math coprocessor and will execute code written for the 80387DX 80387DX 80387DX 80387DX and 80387SX 80387SX 80387SX 80387SX math coprocessors. File Name/Size: 27064004.pdf 310408 www.datasheetarchive.com/files/intel/design/intarch/datashts/270640.htm |
Intel | 03/02/1999 | 2.79 Kb | HTM | 270640.htm |