MC145162 MC1451 MC145162P1 MC145162DI MC145162P MC145162D MC1451620MC145162-1 - Datasheet Archive

 

SEMICONDUCTOR Order this document TECHNICAL DATA byMC14516tiD - ~ Advance Information 60 MHz and 85 MHz Universal Programmable

 

MOTOROLA SEMICONDUCTOR Order this document TECHNICAL DATA byMC14516tiD - ~ Advance Information 60 MHz and 85 MHz Universal Programmable Dual PLL Frequency Synthesizers CMOS The MC1 45162 is a dual phase­locked loop (PLL) frequency synthesizer especially designed for CT­1 cordless phone applications worldwide. This frequency synthesizer is also for any product with a frequency operation at 60 MHz or below. The MC145162 MC145162­I is a high frequency derivative of the MC145162 MC145162, for products with operating frequencies of 85 MHz or below. The device features fully programmable receive, transmit, reference, and auxiliary reference counters accessed through an MCU serial interface. This feature allows this device to operate in any CT­1 cordless phone application.,~'~~ The device consists of two independent phase detectors for transmit ~R~~,J,$ receive loops. A common reference oscillator, driving two indepen&! reference frequency counters, provides independent reference frequ~@es f~f transmit and receive loops. The auxiliary reference counter ailows.@ ti~r to q q q q q .*.,. "+ . ,$" .,+' Operating Temperature Range: -40 to + 75°C >,;!>;,~ Operating Power Consumption: 3.0 mA @ 2.5 V,~, `~.t: $*+$*s . l.? Range: n u ~ 5 12 6 11 RXPS/FRx 7 10 RxPDo"t 8 9 b VDD ~n-R 16 to 65,535 This document contains information on a new product. Specifications and information herein are subject to change without notice, - REV 2 8/95 @ Motorola, Inc. MOTOROLA 1995 q BLOCK DIAGRAM 15 + TxPDo"t 2 AQ, CLK ` 3 P, ENB 4 + MCU INTERFACE PROGRAMMING MODE CONTROL LD CONTROL REGISTER I RECEIVE SELECT Rx PHASE DETECTOR 10 + RxPDout - -k - - VDD= PIN 12 Vss = PIN 6 - MC1451620MC145162-1 MC1451620MC145162-1 2 MOTOROLA MAXIMUM RATINGS* (Voltages Referenced to Vss) Symbol VDD yn Iin, lout IDD, 1Ss Tstg Rating Value ­ 0.5 to + 6.0 DC Supply Voltage DC Current Drain VDD or Vss Pins t v 10 DC Current Drain Per Pin Range v ­ 0.5 to VDD + 0.5 Input Voltage, All Inputs Storage Temperature Unit mA 30 mA 1 ­65to+ 150 `c * Maximum Ratings are those values beyond which damage to the device may occur, Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. ELECTRICAL MOTOROLA CHARACTERISTICS (Voltages Referenced to Vss, TA = 25°C) This device contains protection circuitry to guard against damage due to high static voltages or electric fields, However, precautions must be taken to avoid application of any voltage higher than maximum rated voltages to this high­impedance circuit. For proper operation, ~n and Vout should be constrained to the range Vss < (~n or Vout) < VDD, Unused pins must always be ti@~& an :-)3;:$ , !.$+: appropriate logic voltage level (e.g. ~. . MCU control pins. In the TtiRx channel counter,+~,~~j$de, the TxpS/fTx and RxpS/fRx pins output the ~vi~~dvalue of the transmit channel counter (fTX) and.~~~s~ve channel counter (fRx), respectively. This test,m%$$~peration ,.,. .$ *$*':' .,l.~ ,(:`+;1s" ,*', .~h.$.;' .i~>+ ,4.,t\, , ,+ ,`$*$; >t~$$ :\.,i ., is controlled by the POWER SUPPLY VDD Positive Power Supply (Pin 12) VDD is the most positive power supply potential from 2.5 to 5.5 V with respect to VSS. Vss Negative Power Supply (Pin 6) VSS is the most negative supply potential and is usually connected to ground. A , ~ @\ :~>~ .1+ , ,\,. .4.] >.:." `~:; ".?>* ~?>:i.,.,h .fJ#l., "~.x, .$!:, c +25 ~ > fR~ o osco"~ Crystal + N Value fRl B 11.150 MHz 446 6.25 kHz 11.150 MHz 223 512 600 C 5.0 kHz 12.000 MHz fR2 12.5 kHz 10.240 MHz 5.0 kHz Figure 6. Reference Frequencies MOTOROLA fRl o .b ,a?~;+$ ,$.?, ~ $:*,.'8. \\ .,. ,~, .,.? ,i\>\ ., ranging for Cordless Phone Applications 1.0 kHz of Various Countries MC145162 MC145162.MC145162-1 MC145162-1 5 fR, REFERENCE (OS~n+REFERENCE COUNTER) , ; ; , 1' o I 1 : 1' , fV, FEEDBACK (fin-T+TxCOUNTEROR fin-R +Rx COUNTER) 1, t, i OR RxPDout ~ VH = High voltage level. VL = Low VOltage leVel. *At this point, when both fR and fv are in phase, the output is forced to near mid supply. ~':$ NOTE: The TxPDout and RxPDout generate error pulses during out­of­lock conditions. When locked~ k gram the transmitireceive channels. ,$, "~~~t$~; $' In programming the control register/[pf~&6 frequency scheme, the most significant bit (MS&~*&t~@ programming word identifies whether the input da~w,is~the control word or the reference frequency data w@!~$jfiB MSB is 1, the input data is the control word (H*@l$~~#Also see Figure 8 and Table 1 for control register ~~~t function. If the MSB is O, the input data is the ref~~ce'~equency (Figure 9). The reference freq$~$~:data word is a 32­bit word containing the 12­bit r%~~db frequency data, the 1~bit auxil~J 2:.,. iary reference f~~~~y counter information, the reference frequency ,s~~%@*plus, the auxiliary reference frequency counter e~kbl~j~ti (Figure 9). If th~~~W~F ENB bit is high, the 1&bit auxilia~ referen~e. fwd~ncy counter provides an additional phase refer~y$.t,.+tk, `:., .; , :, i:,i: Test Bit Aux Data Select - Set to 1 for TtiRx channel counter test mode Set to Ofor normal application Set to 1 for both ADin and Din pins inputting$flk~afi~mit 1&bits data and receive 16­bits data ,;,ixa~,b,:> * respectively. Set to O for normal application intetiac@~. REFout + 3/+ If set to 1, REFout output fre~,~ncy is equal to OSCout + 3. If set to O, REFout output is,~S~t +4. 4 - TxPD Enable If set to 1, the transmi~&~~~,., ` Tx pS/fTx is set :~w,$$'~" ,'+' >.,.,. ., RxPD Enable If set to 1, thek@w@counter, down ~,~~. $ Rx ps,#xi~:~&f.,High $.$', ,., Ref PD Enable ,* ~;' ,+ *',:,i. ~ [f ~~ t&~&oth ,+ ~ i.:\*.#~ *)! t":." $?:$/l `~.+.!~ \,~,\].,\>, ~ .?.!,$>, ., Tx$~.k$$ E~;:+:, Y .:.$~,t ,.,*.~. +` ,li Q `~.l} , k:~~~ ~?, , .t.:~ +~''~'~ ," `? RxPD Enable phase detector, and the associated circuitry is in power­ receive phase detector, and the associated circuitry is in power­ 12­bit and 14­bit reference frequency counters are in power-down mode. Table 2. Control Register Power Down Bits Function REF PD Enable Tx-Channel Counter Rx-Channel Counter Reference Frequency Counter 0 - - - o 0 1 - - Power Down o 1 0 - Power Down - o 1 1 - Power Down Power Down 1 `J?., *. \ ~:{i ~. #i:. Yr