bq24080 bq24081 SLUS698D bq24080DRCR bq24080DRCT bq24081DRCR bq24081DRCT

bq24081 www.ti.com . SLUS698D MARCH 2006

bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 1-A, SINGLE-CHIP, LI-ION AND LI-POL CHARGER IC FEATURES 1 · Integrated Power FET and Current Sensor for Up to 1-A Charge Applications From AC Adapter · Precharge Conditioning With Safety Timer · Charge and Power-Good Status Output · Automatic Sleep Mode for Low Power Consumption · Integrated Charge-Current Monitor · Fixed 7-Hour Fast Charge Safety Timer · Ideal for Low-Dropout Charger Designs for Single-Cell Li-Ion or Li-Pol Packs in Space-Limited Portable Applications · Small 3-mm 3-mm SON Package 2 APPLICATIONS · · PDAs, MP3 Players Digital Cameras · · Internet Appliances Smartphones DESCRIPTION The bq24080 bq24080 and bq24081 bq24081 are highly integrated and flexible Li-Ion linear charge devices targeted at space-limited charger applications. They offer an integrated power FET and current sensor, high-accuracy current and voltage regulation, charge status, and charge termination, in a single monolithic device. An external resistor sets the magnitude of the charge current. The device charges the battery in three phases: conditioning, constant current, and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety for charge termination. The device automatically restarts the charge if the battery voltage falls below an internal threshold. The device automatically enters sleep mode when the ac adapter is removed. AC Adapter VDC GND C1 0.1 mF PACK+ bq24080 bq24080 1 IN C2 0.1 µF OUT 10 PACK 2 NC CE STAT1 PG STAT2 VBSEL 7 5 VSS System 8 4 + System Interface 9 3 Battery Pack RSET ISET 6 1.13 kW 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 20062007, Texas Instruments Incorporated bq24080 bq24080 bq24081 bq24081 SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 . www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TJ CHARGE REGULATION VOLTAGE (V) FUNCTIONS FAST-CHARGE TIMER (HOURS) 40°C to 125°C 4.2 CE and PG 7 40°C to 125°C 4.2 TE and TS 7 (1) (2) PART NUMBER (1) (2) MARKINGS bq24080DRCR bq24080DRCR BRO bq24080DRCT bq24080DRCT bq24081DRCR bq24081DRCR BRP bq24081DRCT bq24081DRCT The DRC package is available taped and reeled only in quantities of 3,000 devices per reel. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. DISSIPATION RATINGS PACKAGE RJC TA < 40°C POWER RATING DERATING FACTOR ABOVE TA = 40°C DRC (1) (1) RJA 46.87 °C/W 4.95 °C/W 1.5 W 0.021 W/°C This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the ground plane by a 2- × 3-via matrix. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) bq24080 bq24080, bq24081 bq24081 VI Input voltage (2) IN, CE, ISET, OUT, PG, STAT1, STAT2, TE, TS UNIT 0.3 to 7 V Output sink/source current STAT1, STAT2, PG 15 mA Output current OUT 1.5 A TA Operating free-air temperature range TJ Junction temperature range Tstg Storage temperature (2) °C 65 to 150 Lead temperature for 10 seconds (1) °C 40 to 125 °C 300 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to VSS. RECOMMENDED OPERATING CONDITIONS MIN Supply voltage TJ Operating junction temperature range 2 Submit Documentation Feedback MAX 4.5 VCC 6.5 UNIT V 0 125 °C Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 ELECTRICAL CHARACTERISTICS over 0°C TJ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 1.2 2 2 UNIT 5 INPUT CURRENT ICC(VCC) VCC current VCC > VCC(min) ICC(SLP) Sleep current Sum of currents into OUT pin, VCC < V(SLP) ICC(STBY) Standby current CE = High, 0°C TJ 85°C IIB(OUT) Input current on OUT pin Charge DONE, VCC > VCC(MIN) 150 1 mA µA 5 VOLTAGE REGULATION VO(REG) + V(DO-MAX) VCC, I(TERM) < IO(OUT) 1 A VO(REG) Output voltage Voltage regulation accuracy V(DO) Dropout voltage (V(IN) - V(OUT) 4.2 V -0.35% 0.35% -1% TA = 25°C 1% VO(OUT) = VO(REG), IO(OUT) = 1 A VO(REG) + V(DO) VCC 350 500 mV 1000 mA V CURRENT REGULATION IO(OUT) Output current range (1) VI(OUT) > V(LOWV), VI(IN) - VI(OUT) > V(DO), VCC 4.5 V V(SET) Output current set voltage Voltage on ISET pin, VCC 4.5 V, VI 4.5 V, VI(OUT) > V(LOWV), VI - VI(OUT) > V(DO) K(SET) Output current set factor 50 2.463 2.5 2.538 50 mA IO(OUT) 1 A 307 322 337 10 mA IO(OUT) < 50 mA 296 320 346 1 mA IO(OUT) < 10 mA 246 320 416 PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION IO(PRECHG) V(PRECHG) Precharge to fast-charge transition threshold Voltage on OUT pin 2.8 3 3.2 V Deglitch time for fast-charge to precharge transition V(LOWV) VCC(MIN) 4.5 V, tFALL = 100 ns, 10-mV overdrive, VI(OUT) decreasing below threshold 250 375 500 ms Precharge range (2) 0 V < VI(OUT) < V(LOWV), t < t(PRECHG) 5 100 mA Precharge set voltage Voltage on ISET pin, VO(REG) = 4.2 V, 0 V < VI(OUT) > V(LOWV), t < t(PRECHG) 240 270 mV 100 mA 255 TERMINATION DETECTION I(TERM) Charge termination detection range (3) VI(OUT) > V(RCH), t < t(TRMDET) 5 V(TERM) Charge termination detection set voltage Voltage on ISET pin, VO(REG) = 4.2 V, VI(OUT) > V(RCH), t < t(TRMDET) 235 250 265 mV tTRMDET Deglitch time for termination detection VCC(MIN) 4.5 V, tFALL = 100 ns charging current decreasing below 10-mV overdrive 250 375 500 ms (1) (2) (3) See Equation 2 in the Function Description section. See Equation 1 in the Function Description section. See Equation 4 in the Function Description section. Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 3 bq24080 bq24080 bq24081 bq24081 SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 . www.ti.com ELECTRICAL CHARACTERISTICS (continued) over 0°C TJ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VO(REG) 0.115 VO(REG) - 0.10 VO(REG) - 0.085 250 375 500 ms 0.25 V BATTERY RECHARGE THRESHOLD V(RCH) Recharge threshold t(DEGL) Deglitch time for recharge detect VCC(MIN) 4.5 V, tFALL = 100 ns decreasing below or increasing above threshold, 10-mV overdrive V STAT1, STAT2, and PG OUTPUTS VOL Low-level output saturation voltage IO = 5 mA CE and TE INPUTS VIL Low-level input voltage 0 VIH High-level input voltage 1.4 IIL Low-level input current 1 IIH 0.4 High-level input current 1 V µA TIMERS t(PRECHG) Precharge time t(CHG) Charge time I(FAULT) 1,584 1,800 2,016 s 22,176 25,200 28,224 s Timer fault recovery current µA 200 SLEEP COMPARATOR V(SLP) V(SLPEXIT) Sleep-mode exit threshold voltage VCC VI(OUT) + 80 mV Sleep-mode entry threshold voltage 2.3 V VI(OUT) VO(REG) Sleep-mode entry deglitch time VCC VI(OUT) + 190 V(IN) decreasing below threshold, tFALL = 100 ns, 10-mV overdrive 250 375 500 V ms THERMAL SHUTDOWN THRESHOLDS T(SHTDWN) Thermal trip threshold Thermal hysteresis 165 TJ increasing °C 15 UNDERVOLTAGE LOCKOUT V(UVLO) Undervoltage lockout Decreasing VCC 2.4 Hysteresis 2.5 2.6 27 V mV TEMPERATURE SENSE COMPARATOR (bq24081 bq24081) V(TS1) High-voltage threshold 2.475 2.5 2.525 V(TS2) Low-voltage threshold 0.485 0.5 0.515 I(TS) TS pin current source 96 102 108 µA t(DEGL) Deglitch time for temperature fault 250 375 500 ms 4 Submit Documentation Feedback V Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 PIN ASSIGNMENT DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 GND 5 IN VSS 3 1 5 4 2 STAT2 STAT1 GND IN 3 2 1 8 9 10 TE TS OUT 4 bq24080 bq24080 6 7 ISET GND bq24081 bq24081 8 9 10 PG CE 6 OUT 7 ISET GND P0051-01 P0051-01 PIN FUNCTIONS PIN NAME CE GND NO. I/O DESCRIPTION bq24080 bq24080 bq24081 bq24081 9 I Charge enable input (active-low) 2, 7 2, 7 Ground IN 1 1 I Adapter dc voltage. Connect minimum 0.1-µF capacitor to VSS. ISET 6 6 I Charge current. External resistor to VSS sets precharge and fast-charge current, and also the termination current value. Can be used to monitor the charge current. OUT 10 10 O Charge current output. Connect minimum 0.1-µF capacitor to VSS. PG 8 O Power-good status output (open-drain) STAT1 3 3 O STAT2 4 4 O TE 8 I TS 9 I/O VSS 5 5 Ground Thermal pad There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The exposed thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as the primary ground input for the device. The VSS pin must be connected to ground at all times. Charge status outputs (open-drain) Timer-enable input (active-low) Temperature sense; connect to NTC in battery pack. Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 5 bq24080 bq24080 bq24081 bq24081 SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 . www.ti.com FUNCTIONAL BLOCK DIAGRAM (3) IN OUT ISET V(PRECHG) V(SET) VO(REG) V(RCH) V(LOWV) (3) (3) (3) V(TERM) V(IN) ITS VI(OUT) + V(SLP) (3) V(TS1) V(UVLO) (2) Charge Control, Timers, and Status TS (3) V(TS2) STAT1 CE (1) STAT2 (2) TE (1) PG VSS B0193-01 B0193-01 (1) (2) bq24081 bq24081 only (3) 6 bq24080 bq24080 only Signal deglitched Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 TYPICAL CHARACTERISTICS DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 450 IO(OUT) = 1000 mA 400 Dropout Voltage - mV 350 IO(OUT) = 750 mA 300 250 IO(OUT) = 500 mA 200 150 IO(OUT) = 250 mA 100 50 0 0 50 100 TJ - Junction Temperature - oC Figure 1. 150 Figure 2. VIN Hot-Plug Power-Up Sequence Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 7 bq24080 bq24080 bq24081 bq24081 SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 . www.ti.com TYPICAL CHARACTERISTICS (continued) Figure 3. Charge Enable Power-Up Sequence (CE = High-to-Low) Figure 4. Battery Hot-Plug During Charging Phase 8 Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 TYPICAL CHARACTERISTICS (continued) (1) No battery In termination deglitch prior to STAT1 going high. VOUT (VBAT) cycling between charge and done prior to screen capture. (2) Stat1 goes high In done state (3) 2-V battery is inserted during the charge done state. (4) Charging is initiated STAT1 goes low and charge current is applied. (5) Battery is removed VOUT goes into regulation, IOUT goes to zero, and termination deglitch timer starts running (same as state 1). (6) Deglitch timer expires charge done is declared. Figure 5. Battery Hot-Plug and Removal Power Sequence Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 9 bq24080 bq24080 bq24081 bq24081 SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 . www.ti.com FUNCTIONAL DESCRIPTION The device supports a precision Li-Ion, Li-Pol charging system suitable for single cells. Figure 6 shows a typical charge profile, and Figure 7 shows an operational flow chart. Preconditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase Regulation Voltage Regulation Current Minimum Charge Voltage PreConditioning and Term Detect Charge Voltage Charge Complete Charge Current Safety Timer M0066-01 M0066-01 Figure 6. Typical Charging Profile 10 Submit Documentation Feedback Copyright © 20062007, Texas Instruments Incorporated Product Folder Link(s): bq24080 bq24080 bq24081 bq24081 bq24080 bq24080 bq24081 bq24081 www.ti.com . SLUS698D SLUS698D MARCH 2006 REVISED NOVEMBER 2007 POR SLEEP MODE VCC > VI(OUT) checked at all times? No Indicate SLEEP MODE Yes VI(OUT)