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Power MinderTM IC Features General Description ® Multifunction charge/discharge counter The bq2018 is a low-cost
bq2018 Power MinderTM IC Features General Description ® Multifunction charge/discharge counter The bq2018 is a low-cost charge/discharge counter peripheral packaged in an 8-pin TSSOP or SOIC. It works with an intelligent host controller, providing state-of-charge information for rechargeable batteries. ® Resolves signals less than 12.5µV ® Internal offset calibration improves accuracy ® 1024 bits of NVRAM configured as 128 x 8 ® Internal temperature sensor for self-discharge estimation ® Single-wire serial interface ® Dual operating modes: - Operating: VSR2 (Max. = +200mV) 12.5µVh increments 16-bit 1 count/hour @ 25°C 16-bit CCR Charge count register SCR Self-discharge count register DTC Discharge time counter 1 count/0.8789s default 1 count/225s if STD is set 16-bit CTC Charge time counter 1 count/0.8789s default 1 count/225s if STC is set 16-bit MODE/ WOE MODE/ Wake output enable - 8-bit 4 bq2018 7f 7f Discharge count high byte 7e Discharge count low byte 7d Charge count high byte 7c Charge count low byte 7b Self-discharge high byte 7a Self-discharge low byte 73 72 79 Discharge time high byte 78 Discharge time low byte User RAM 77 Charge time high byte 76 Charge time low byte 75 Mode/wake output enable 74 Temperature/clear 73 Offset register 00 FG201801 FG201801.eps Figure 3. Address Map useful in determining an estimation of the battery selfdischarge based on capacity and storage temperature conditions. During charge, the CCR and the Charge Time Counter (CTC) are active. If VSR1 is greater than VSR2, indicating a charge, the CCR counts at a rate equivalent to 12.5µV every hour, and the CTC counts at a rate of 1 count/0.8789 seconds. For example, a +100mV signal produces 8000 CCR counts and 4096 CTC counts each hour. The amount of charge added to the battery can easily be calculated. The bq2018 may be programmed to measure the voltage offset between SR1 and SR2 during pack assembly or at any time by invoking the Calibration mode. The Offset Register (OFR) is used to store the bq2018 offset. The 8bit 2's complement value stored in the OFR is scaled to the same units as the DCR and CCR, representing the amount of positive or negative offset in the bq2018. The maximum offset for the bq2018 is specified as ± 500µV. Care should be taken to ensure proper PCB layout. Using OFR, the system host can cancel most of the effects of bq2018 offset for greater resolution and accuracy. The DTC and the CTC are 16-bit registers, and roll over beyond ffffh. If a rollover occurs, the corresponding bit in the MODE/WOE register is set, and the counter will subsequently increment at 1/256 of the normal rate (16 counts/hr.). Whenever the signal between SR1 and SR2 is above the Wakeup Output Enable (WOE) threshold and the HDQ pin is high, the bq2018 is in its full operating state. In this state, the DCR, CCR, DTC, CTC, and SCR are fully operational, and the WAKE output is low. During this mode, the internal RAM registers of the bq2018 may be accessed over the HDQ pin, as described in the section "Communicating With the 2018." Figure 3 shows the bq2018 register address map. The bq2018 uses the upper 13 locations. The remaining memory can store user-specific information such as chemistry, serial number, and manufacturing date. WAKE Output This output is used to inform the system that the voltage difference between SR1 and SR2 is above or below the Wake Output Enable (WOE) threshold programmed in the MODE/WOE register. When the voltage difference between SR1 and SR2 is below VWOE, the WAKE output goes into High Z and remains in this state until the discharge or charge current increases above the specified value. The MODE/WOE resets to 0eh after a power-on reset. VWOE is set by dividing 3.84mV by a value between 1 and 7 (17h) according to Table 3. If the signal between SR1 and SR2 is below the WOE threshold (refer to the WAKE section for details) and HDQ remains low for greater than 10 seconds, the bq2018 enters a sleep mode where all register counting is suspended. The bq2018 remains in this mode until HDQ returns high. For self-discharge calculation, the self-discharge count register (SCR) counts at a rate equivalent to 1 count every hour at a nominal 25°C and doubles approximately every 10°C up to 60°C. The SCR count rate is halved every 10 °C below 25°C down to 0°C. The value in SCR is 5 bq2018 Table 3. WOE Thresholds Table 4. Temperature Steps WOE31 (hex) VWOE (mV) 0h n/a 1h 3.840 2h 1.920 1020° 2h × 1/2 3h 1.280 2030° 3h 1 count/hr. 4h 0.960 3040° 4h ×2 5h 0.768 4050° 5h ×4 6h 0.640 5060° 6h ×8 7h* 0.549 >60° 7h × 16 Temp Value (hex) SDR Count Rate VSR2 = charge Note 2 10 - - M -200mV < VSR < 200mV - - 2.0 mA VOL = VSS + 0.3V WAKE, HDQ HDQ input high 2.5 - - V HDQ input low - - 0.8 V 1. All voltages relative to VSS. 2. VSR1/SR2 + VOS. VOS is affected by PC board layout. Follow proper layout guidelines for optimal performance. 3. Can be guaranteed by design when using an SST108 SST108 or equivalent JFET. 12 bq2018 Performance Characteristics (TA = TOPR) Symbol Parameter Typical Maximum Unit Notes VOS Offset voltage ±500 µV Voltage offset between SR1 and SR2 OSC Timer accuracy 1.5 ±3.0 % VCC =3.5 - 3.9V (TA = 070°C) INR Integrated nonrepeatability error 0.5 1.0 % Measured repeatability given similar operating conditions INL Integrated non-linearity 1.0 2.0 % Add 0.05% per °C above or below 25°C and 0.5% per volt above or below 3.7V. Standard Serial Communication Timing Specification (TA = TOPR) Symbol Parameter Minimum tCYCH Cycle time, host to bq2018 (write) 190 - - µs tCYCB Cycle time, bq2018 to host (read) 190 205 250 µs tSTRH Start hold, host to bq2018 (write) 5 - - ns tSTRB Start hold, bq2018 to host (read) 32 - - µs tDSU,B Data setup - - 50 µs tDH Data hold 90 - - µs tDV Data valid - - 80 µs tSSUB Stop setup (bq2018 to host) - - 95 µs tSSU Stop setup (host to bq2018) - - 145 µs tB Break 190 - - µs tBR Break recovery 40 - - µs tRSPS Response time, bq2018 to host 190 - 320 µs tRR Read recovery 40 - - µs 13 Typical Maximum Unit Notes Host read to next cycle bq2018 Break Timing tBR tB Host to bq2018 Write "1" Write "0" tSTRH tDSU tDH tSSU tCYCH bq2018 to Host Read "1" Read "0" tSTRB tDSUB tDV tSSUB tCYCB 14 bq2018 8-Pin SOIC Narrow ~ SN Package Suffix Millimeters Inches Dimension A Min. Max. Min. Max. 1.52 1.78 0.060 0.070 A1 0.10 0.25 0.004 0.010 B 0.33 0.51 0.013 0.020 C 0.18 0.25 0.007 0.010 D 4.70 5.08 0.185 0.200 E 3.81 4.06 0.150 0.160 e 1.14 1.40 0.045 0.055 H 5.72 6.22 0.225 0.245 L 0.38 0.89 0.015 0.035 15 bq2018 8-Pin TSSOP ~ TS Package Suffix Millimeters Inches Dimension A Min. Max. Min. Max. - 1.10 - 0.043 A1 0.05 0.15 0.002 0.006 B 0.18 0.30 0.007 0.012 C 0.09 0.18 0.004 0.007 D 2.90 3.10 0.115 0.122 E 4.30 4.48 0.169 0.176 e 0.65BSC 65BSC 0.0256BSC 0256BSC H 6.25 6.50 0.246 0.256 L 0.50 0.70 0.020 0.028 Notes: 1. Controlling dimension: millimeters. Inches shown for reference only. 2 'D' and 'E' do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side 3 Each lead centerline shall be located within ±0.10mm of its exact true position. 4. Leads shall be coplanar within 0.08mm at the seating plane. 5 Dimension 'B' does not include dambar protrusion. The dambar protrusion(s) shall not cause the lead width to exceed 'B' maximum by more than 0.08mm. 6 Dimension applies to the flat section of the lead between 0.10mm and 0.25mm from the lead tip. 7 'A1' is defined as the distance from the seating plane to the lowest point of the package body (base plane). 16 bq2018 Data Sheet Revision History Change No. Page No. 1 All 2 12 Note: Description Nature of Change Clarification of absolute maximum pin ratings Change 1 = Jan. 1999 B changes to Final from Dec. 1998 Preliminary data sheet. Change 2 = June 1999 C changes from Jan. 1999 B. 17 bq2018 Ordering Information bq2018 Temperature Range: blank = Commercial (-20 to +70°C) Package Option: SN = 8-pin narrow SOIC TS = 8 pin TSSOP Device: bq2018 Power Minder IC 18 Notes 19 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright © 1999, Texas Instruments Incorporated 20 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright © 2000, Texas Instruments Incorporated