NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| BM1601-7R | Melcher AG | 50 W DC-DC (AC-DC) Converter |
45 pages, |
Original | |
| BM1601-7R | Power-One | 50 Watt DC-DC Converters |
4 pages, |
Original | |
| BM1621 | Bookly Microelectronic | LCD Driver |
9 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Schroff dm2000 AM1901-9R AM1901-9R 72 79 79 81 81 BM1001-9R BM1001-9R BM1301-9R BM1301-9R BM1501-9R BM1501-9R BM1601-9R BM1901-9R BM1901-9R 74 80 81 83 ... | Original |
26 pages, |
schematic diagram ac-dc supply CM3020-9 LM1001-9R DM100 AM3040-9 CM3000 LM1782-9RD5 am1601-9r BM3000 BM3020-9 LM200 lm1785 datasheet abstract |
| Abstract: QUICK INDEX NEW IN THIS ISSUE! (Detailed Index - See Pages 3-24) AD9272 AD9272 Analog Front End, iMEMS® Accelerometers & Gyroscopes . . . . . . 782, 2583 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-528 Acceleration and Pressure Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . Page 2585 Active RF Product and Antennas . . . . . . . . . . . . 529-592 Rotary Position Sensor and SinglFuseTM Thin Film Chip Fuses . . . Pgs. 2000, 2071 Semiconductors ... | Original |
2704 pages, |
600va ups circuit diagrams ANA 618 20010 TV SHARP IC TDA 9381 PS 600va numeric ups circuit diagrams led clock circuit diagram at89s52 24pu LG color tv Circuit Diagram tda 9370 circuit diagram wireless spy camera schematic diagram atx Power supply 500w AD9272 AD9272 abstract |
| Abstract: CHAPTER 1 OVERVIEW 1.1 FEATURES 1.2 GENERAL OVERVIEW OF TROIKA ♦ ♦ ♦ Supports system-I eve I navigation processing Supports DVD 1 .OVideo Object (VOB) bit streams Decodes MPEG-2 and MPEG-1 video in real time Display: NTSC (720x480 @ 60 fps) and PAL (720x576 @ 50 fps) Decodes Dolby AC-3, LPCM, or MPEG-1 (Layer 1 & Layer 2) audio samples and outputs in 2 channels Supports sub-picture decoding, DCC, Closed Caption, DSI, PCI, and HLI parsing Provides programmable OSD and Digest functions ... | OCR Scan |
68 pages, |
6S6 SCR ac3 downmix decoder CCIR-656 circuit diagram of digital hearing aid circuit diagram of hearing aid hyundai dvd low cost hearing aid circuit diagram MDI81 SDLf PCM sampling q encoder Oak Frequency Control HM5216165 datasheet abstract |
| Abstract: Model No. 10 BM10B-PUDSS-TFC BM10B-PUDSS-TFC BM12B-PUDSS-TFC BM12B-PUDSS-TFC BM14B-PUDSS-TFC BM14B-PUDSS-TFC BM16B-PUDSS-TFC BM18B-PUDSS-TFC BM18B-PUDSS-TFC ... | Original |
4 pages, |
S10B-PUDSS-1 S38B-PUDSS-1 s28b S34B-PUDSS-1 SPUD B38B-PUDSS-1 S08B BM26B-PUDSS-TFC s22b S16B-PUDSS-1 PUDP-10V-S PUDP-30V-S B30B-PUDSS BM14B-PUDSS-TFC datasheet abstract |
| Abstract: BM12B-PUDSS-TFC BM12B-PUDSS-TFC BM14B-PUDSS-TFC BM14B-PUDSS-TFC BM16B-PUDSS-TFC BM18B-PUDSS-TFC BM18B-PUDSS-TFC BM20B-PUDSS-TFC BM20B-PUDSS-TFC BM24B-PUDSS-TFC BM24B-PUDSS-TFC ... | Original |
4 pages, |
S32B-PUDSS-1 PUDP-12V-S BM26B-PUDSS-TFC BM24B-PUDSS BM10B-PUDSS-TFC s22b datasheet abstract |
| Abstract: BM16B-CZSS-1-TF BM17B-CZSS-1-TF BM17B-CZSS-1-TF BM20B-CZSS-1-TF BM20B-CZSS-1-TF RoHS compliance This product displays (LF)(SN) on a label. ... | Original |
6 pages, |
S16B-CZHK-B-1 06CZ-6H E60389 CZWH-22-S CZHR-02V-S BM04B-CZSS-1-TF SM04B-CZSS-1-TB B04B-CZHK-B-1 BM20B-CZSS-1-TF S03B-CZHK-B-1 LR20812 B24B-CZWHK-B-1 B22B-CZWHK-B-1 CZHR-12V-S datasheet abstract |
| Abstract: SM14B-ZESS-TB SM14B-ZESS-TB 19.5 25.5 1,000 15 BM15B-ZESS-TBT BM15B-ZESS-TBT BM16B-ZESS-TBT 21.0 27.0 800 15 ... | Original |
4 pages, |
B15B-ZESK-D B12B-ZESK-1D SM16B-ZESS-TB S02B-ZESK-2D B11B-ZESK-1D B08B-ZESK-1D B04B-ZESK-D ZER-10V-S ZER-04V-S sm07b-zess-tb B04B-ZESK-1D S08B-ZESK-2D B05B-ZESK-D sze-002t-p0.3 datasheet abstract |
| Abstract: BM10B-ZPDSS-TF BM10B-ZPDSS-TF BM12B-ZPDSS-TF BM12B-ZPDSS-TF BM14B-ZPDSS-TF BM14B-ZPDSS-TF BM16B-ZPDSS-TF BM18B-ZPDSS-TF BM18B-ZPDSS-TF BM20B-ZPDSS-TF BM20B-ZPDSS-TF BM22B-ZPDSS-TF BM22B-ZPDSS-TF ... | Original |
2 pages, |
ZPDR-28V-S BM14B-ZPDSS BM14B-ZPDSS-TF SM18B-ZPDSS-TF SM10B-ZPDSS-TF ZPDR-10V-S BM16B-ZPDSS-TF BM30B-ZPDSS-TF BM26B-ZPDSS-TF SM12B-ZPDSS-TF SZE-002-03 zpdr-20v-s BM10B-ZPDSS-TF datasheet abstract |
| Abstract: Z-One Digital Power ® Analog POL Isolated DC-DC Front Ends Chassis Mount PoE Ruggedized CompactPCI Renewable Energy Network Power Systems Intelligent Controls 2010 Online Product Update Table of Contents Point-Of-Load Conversion & Management Bus Programmable Digital POL Solutions 2 TM Distributed Power & Intermediate Bus Architectures No-Bus Digital POL Converters Y-Series Analog POLs Brick Overview Page 6 SMT = Surface Mount TH = Thr ... | Original |
61 pages, |
LXN1240-6M1 110IMY70-12-0G PFC375-4000 ZY2160 LM1501 6EM1 PSC368-7iR 40IMX15-03-8RG HBB15-1.5-AG 40IMX35D05D15-8 HBD060ZGE-A MPB150 qts48t46096 ZY2105 datasheet abstract |
| Abstract: SM14B-ZESS-TB SM14B-ZESS-TB 19.5 25.5 1,000 15 BM15B-ZESS-TBT BM15B-ZESS-TBT BM16B-ZESS-TBT 21.0 27.0 800 15 ... | Original |
4 pages, |
sm07b-zess-tb datasheet abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| *$ .model awb1041t060_3b7 CORE (LEVEL=3 GAP=0 OD=.58 ID=.302 AREA=.0202 BR=.8k BM=4.5k HC=.2 ) *$ *$ .model awb1041t060_3d3 CORE (LEVEL=3 GAP=0 OD=.58 ID=.302 AREA=.0202 BR=2.0k BM=4.6k HC=1.0 ) *$ *$ .model awb1041t060_3e2a CORE (LEVEL=3 GAP=0 OD=0.58 ID=0.302 AREA=0.0202 BR=0.3k BM=4.5k HC=.08 ) *$ *$ .model awb1041t060_4c4 CORE (LEVEL=3 GAP=0 OD=.58 ID=.302 AREA=.0202 BR=2.55k BM=3.2k HC=3.8 ) *$ *$ .model awb1107pl00_3b7 CORE (LEVEL=3 GAP=0 ID=0 OD=1.55 AREA=.167 BR=.8k www.datasheetarchive.com/files/spicemodels/misc/cores.lib |
Spice Models | 19/06/2008 | 61.27 Kb | LIB | cores.lib |
| -p xc2v250fg456-5 -uc alu.ucf -modular initial alu.edf Release 6.1.02i - ngdbuild G.25a Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Command Line: ngdbuild -p xc2v250fg456-5 -uc alu.ucf -modular initial alu.edf Launcher: Executing edif2ngd "alu.edf" "alu.ngo" INFO:NgdBuild - Release 6.1.02i - edif2ngd G.25a INFO:NgdBuild - Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. Writing the design to "alu.ngo". www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (flow.log) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| (edif alu (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0) (status (written (timeStamp 2001 10 23 15 3 24) (author "Synplicity, Inc.") (program "Synplify" (version "6.2.0, Build 083R") ) ) (library VIRTEX (edifLevel 0) (technology (numberDefinition ) (cell IBUF (cellType GENERIC) (view PRIM (viewType NETLIST) (interface (port O (direction OUTPUT) (port I (direction INPUT) www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.edf) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| # Start of Constraints extracted by Floorplanner from the Design NET "clock" LOC = "D11" ; NET "reset_add" LOC = "B10" ; NET "reset_shift" LOC = "F12" ; NET "reset_sub" LOC = "E13" ; NET "triL1" LOC = "D13" ; NET "triL2" LOC = "E10" ; NET "triR1" LOC = "A10" ; NET "triR2" LOC = "C13" ; INST "clock_ibuf" LOC = "BUFGMUX4S" ; NET "Q2[0]" LOC = "N21" ; NET "Q2[1]" LOC = "R22" ; NET "Q2[2]" LOC = "R21" ; NET "Q2[3]" LOC = "R20" ; NET "Q2[4]" LOC = "R19" ; NET "Q2[5]" LOC www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.ucf) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| (edif alu (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0) (status (written (timeStamp 2001 10 23 15 3 24) (author "Synplicity, Inc.") (program "Synplify" (version "6.2.0, Build 083R") ) ) (library VIRTEX (edifLevel 0) (technology (numberDefinition ) (cell IBUF (cellType GENERIC) (view PRIM (viewType NETLIST) (interface (port O (direction OUTPUT) (port I (direction INPUT) www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.edf) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| Release 6.1.02i Par G.25a Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. XCOKPATEL30 XCOKPATEL30 XCOKPATEL30 XCOKPATEL30: Fri Nov 07 11:51:45 2003 par -w alu1_map.ncd alu1.ncd Constraints file: alu1_map.pcf Loading device database for application Par from file "alu1_map.ncd". "alu" is an NCD, version 2.38, device xc2v250, package fg456, speed -5 Loading device for application Par from file '2v250.nph' in environment C:/Xilinx6. The STEPPING level for this design is 1. Device speed data version: PRODUCTION www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.par) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| (DELAYFILE (SDFVERSION "3.0") (DESIGN "alu") (DATE "[Fri Nov 07 11:52:08 2003] ") (VENDOR "Xilinx") (PROGRAM "Xilinx SDF Writer") (VERSION "G.25a") (DIVIDER /) (VOLTAGE 1.425:1.425:1.425) (TEMPERATURE 85:85:85) (TIMESCALE 1 ps) (CELL (CELLTYPE "X_TRI") (INSTANCE bm16_1\/bus1\/t1A_\(3\) (DELAY (PATHPULSE (665:665:665) (ABSOLUTE (PORT I (2291:2291:2291)(2291:2291:2291) (PORT CTL (476:476:476)(476:476:476) (IOPATH I O www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.sdf) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| # Start of Constraints extracted by Floorplanner from the Design NET "clock" LOC = "D11" ; NET "reset_add" LOC = "B10" ; NET "reset_shift" LOC = "F12" ; NET "reset_sub" LOC = "E13" ; NET "triL1" LOC = "D13" ; NET "triL2" LOC = "E10" ; NET "triR1" LOC = "A10" ; NET "triR2" LOC = "C13" ; INST "clock_ibuf" LOC = "BUFGMUX4S" ; NET "Q2[0]" LOC = "N21" ; NET "Q2[1]" LOC = "R22" ; NET "Q2[2]" LOC = "R21" ; NET "Q2[3]" LOC = "R20" ; NET "Q2[4]" LOC = "R19" ; NET "Q2[5]" LOC www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.ucf) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| // Xilinx Verilog netlist produced by netgen application (version G.25a) // Command : -w -sim -ofmt verilog -ngm alu1_map.ngm alu1.ncd // Input file : alu1.ncd // Output file : alu1.v // Design name : alu // # of Modules : 1 // Xilinx : C:/Xilinx6 // Device : 2v250fg456-5 (PRODUCTION 1.116 2003-09-30, STEPPING 1) // This verilog netlist is a simulation model and uses simulation // primitives which may not represent the true implementation of the // device, however the ne www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1.v) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| Release 6.1.02i Map G.25a Xilinx Mapping Report File for Design 'alu' Design Information - Command Line : map alu1.ngd -o alu1_map.ncd Target Device : 2v250 Target Package : fg456 Target Speed : -5 Mapper Version : virtex2 - $Revision: 1.16 $ Mapped Date : Fri Nov 07 11:51:37 2003 Design Summary - Number of errors: 0 Number of warnings: 25 Logic Utilization: Number of Slice Flip Flops: 82 out of 3,072 2% Number of 4 input LUTs: www.datasheetarchive.com/download/87140017-995962ZC/xapp290.zip (alu1_map.mrp) |
Xilinx | 06/02/2004 | 2799 Kb | ZIP | xapp290.zip |
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| BM161 | Gentron Corporation | Half Bridge MOSFET Power Module - Visolation 2.5kV | ||
| BM161R | Gentron Corporation | Half Bridge MOSFET Power Module - Viso 2.5kV,w/FR Diode | ||
| BM161RS | Gentron Corporation | Half Bridge MOSFET Power Module - w/FR & Speed-up Diode | ||
| BM161S | Gentron Corporation | Half Bridge MOSFET Power Module - w/Speed-up Diode | ||
| BM162 | Gentron Corporation | Full Bridge MOSFET Power Module - Visolation 2.5kV | ||
| BM162R | Gentron Corporation | Full Bridge MOSFET Power Module - Viso 2.5kV,w/FR Diode | ||
| BM162RS | Gentron Corporation | Full Bridge MOSFET Power Module - w/FR & Speed-up Diode | ||
| BM162S | Gentron Corporation | Full Bridge MOSFET Power Module - w/Speed-up Diode | ||
| BM1657MD | Alpha Products Inc | 5 x 7 Dot Matrix LED Display - (X) | ||
| BM1657ND | Alpha Products Inc | 5 x 7 Dot Matrix LED Display - (X) |