NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 256Word 1st word 2nd word 3rd word 4th word Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 P16` Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 P16 P16` Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 P16 252th word 253th word 254th word 256th word Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 P16` Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 Bit15 Bit14 Bit13 Bit12 Bit3 Bit2 Bit1 Bit0 P16 P16` Bit15 Bit14 Bit13 ... | Original |
8 pages, |
P512 P256 BIT12 datasheet abstract |
| Abstract: T OP I C S ,! - NOR - · · 512K 8M bit SPI NOR ,DVD, , , (SOP8),. *! Wafer Level Package SOP8 Ultra thin Small outline Land Peripheral package WLP USLP *SST(Silicon Storage Technology,Inc.),. http://semicon.cn.sanyo.com/ 200807011/2 SPI NOR 400Mbps 400Mbps 8M bit1.5 bit1.5 2.3V 256 2.5V 2.5V 64K1/256 64K1/256 64K1/256 64K1/256 2.3V3.6V 50MHz ... | Original |
2 pages, |
datasheet abstract |
| Abstract: TLCS-870 TLCS-870 TLCS-870/C TLCS-870/C TMP86CH87RUG TMP86CH87RUG TMP86CM87RUG TMP86CM87RUG TMP86PM87UG TMP86PM87UG 2006 3 TLCS-870/C TLCS-870/C /INT5 /INT5 IL15 /INT5() 1/INT5 1/INT5 TMP86xx87(EF16)CAN (EF17)CAN (EF18)CAN /INT5/INT5 TMP86CH/CM87/PM87 TMP86CH/CM87/PM87 /INT5 EIRH bit15(EF15)"0" 1/1 2006-3 ... | Original |
1 pages, |
TMP86CH87RUG TLCS-870 EF16 TLCS-870/C TMP86CM87RUG TMP86PM87UG TLCS-870 abstract |
| Abstract: bit (DQ6) Data 1 (DQ6) = Data 2 (DQ6) Y Last sector Erasing error N Y FMCS:WE(bit15 ... | Original |
1 pages, |
INT10 CM2510 BIT15 8L AA CM25-10132-2ET2 MB89960 CM25-10132-2ET2 abstract |
| Abstract: bit15: reserved #7 Display present weight as Gross (K0) or Net (K1). bit0 to bit3: CH1; bit4 to bit7: CH2; bit8 CH1 to CH2 gross/net to bit15: reserved. H1007 H1007 O R/W weight Take CH1 for example , Communication Format Table for CR#53, CR#55: bit15 bit14~bit8 ACSII/RTU Reserved bit7 bit6 , ~bit4 ACSII/RTU Baudrate 0 ASCII 1 RTU 0 bit15 9,600 bps 1 19,200 bps , CH1 CH2 ( CH1 + CH2 ) ÷ 2 #6 H1006 H1006 X R/W CH1 ~ CH2 bit0CH1bit1CH2bit2 ~ bit15 #7 ... | Original |
19 pages, |
dvp02lc DVP-1071070-01 H102 H1022 H1026 DIN1319-1 IEC61131-2 k255 H1001 h1029 k100 H100F H1018 okuma h1016 5012602300-2LC0 DVP-1071070-01 5012602300-2LC0 abstract |
| Abstract: ; SHIFT MSBS, BIT0 -> CARRY ; SHIFT LSBS, CARRY -> BIT15 ; UNSIGNED SHIFT RIGHT SUBROUTINE FOR IRACM , > CARRY, 0 -> BIT15 SHIFT LSBS, CARRY -> BIT15 IRACM IRACL IRACM IRACL ; SIGNED/UNSIGNED SHIFT , > CARRY ; SHIFT MSBS, CARRY -> BIT15 4-9Error! Main Document Only. Integer Calculation 4.7 ... | Original |
12 pages, |
MSP430 MSP430 abstract |
| Abstract: | PCF | TOF | - EH Bit-15 14 13 12 11 10 9 Bit-8 Bit-7 6 5 4 3 2 1 Bit-0 Bit-15 14 13 12 11 10 9 Bit-8 Bit-7 6 5 4 3 2 1 Bit-0 $0018 Bit-15 14 13 12 11 10 9 Bit-8 $0019 Bit-7 6 5 4 3 2 1 Bit-0 $001A $001B $001C $001D $001E $001F $3FDF Bit-15 14 13 12 11 10 9 Bit-8 , 300 kbaud 150 baud 1 1 1 128 1024 baud 150 kbaud 75 baud Bit-7 6 5 4 3 2 1 Bit-0 Bit-15 14 13 12 11 , CONDITION $07 DDRD RESET CONDITION Bit-7 6 5 4 3 2 1 _Bit-0 Bit-15 14 13 12 I 11 10 9 Bit-8 Bit-7 6 5 4 ... | OCR Scan |
21 pages, |
MC68HC05C9P MC68HC05C9FU MC68HC05C9FN M68HC05 MC68HC05C9 BR760/D BR760/D abstract |
| Abstract: of 4-CH Melody The 4-ch melody is a 16-bit data format, and "bit15" is used to specify the normal , In normal melody data, the bit15 should be "0". Bit15 Bit14 Bit13 0 x Version: 1.1 OCT , (80nnH) Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 1 0 0 0 0 0 0 Bit8 Bit 7 ~ Bit0 0 BEAT Bit8 Bit 7 ~ Bit0 1 - Stop (81xxH) Bit15 Bit14 Bit13 Bit12 Bit11 , Application Note Change Instrument (82xxH) Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 1 0 0 0 0 ... | Original |
33 pages, |
32768HZ 0X0700 SNL310 SL310SN002 SL310SN002 abstract |
| Abstract: ;Force Bit15,14,13 = 1 ;Force Bit12=0 ;Save incremented high byte ;- Create CHKTR2: CJNE MOV , , then 16 bits are sent, ; then, CSB is brought back HIGH. ;Arguments: DACCH = Data high byte (Bit15 ... | Original |
5 pages, |
MCS-51 ICM7363 ICM7343 ICM7323 AN001 ICM7363/43/23 AN001 abstract |
| Abstract: Test bit instruction (BIT) BIT15 .set 0000h ;Bit Code for 15 BIT12 BIT12 .set 0003h ;Bit Code for 12 , ;= ; Detect Power On Reset PORCHK: BIT SYSSR,BIT15 BCND ILLCHK,NTC ;if power on reset continue ... | Original |
3 pages, |
TMS320 TMS320 abstract |
| Abstract: Errata in the TMC453 TMC453 manual V2.3, dated 1. Oct. 04 Ramp generator: Figure 7-1: ramp_pos_act should be depicted as 24 bit [23.0] Sinestep sequencer Figure 9.6, output mapping in sinestep mode: The phase output is derived from bit 15, not bit 14 as shown. Microstep operation, p 37 Figure 9.10: The example shows the configuration for 4 Microsteps, thus the microstep table and the wave should show 8 (=2*4) values, not 7. ... | Original |
1 pages, |
TMC453 MICROSTEP TMC453 abstract |
| Abstract: Register Description June 2004 STSI-48 STSI-48 Scalable Time-Slot Interchanger Register Description 1 Introduction This document defines the address map for the scalable time-slot interchanger STSI-48 STSI-48 and describes the purpose and operation of each register bit, its dependencies, and its initial state. 1.2 STSI-48 STSI-48 Addressing Notes All STSI-48 STSI-48 addresses shown in these documents are physical byte addresses in the CPU space, not the actual addresses in the STSI-48 STSI-48 device. The following assumptions ... | Original |
74 pages, |
STSI-48 STSI-48 abstract |
| Abstract: 47E D nmn PRELIMINARY PRODUCT DATA FEATURES 2fc.S15bl ÜDD1S02 DD1S02 TbO â- DTL ADS-976 ADS-976 16-bit, 200 KHz, Low-Power Sampling A/D Converter T- 5R0-Ife • 16-bit resolution • 200 KHz sampling rate • Compatible to industry standard ADC76 ADC76, AD376 AD376, AD1376 AD1376 • Internal sample-hold • Small 32-pin DIP • Low-power, 1.8 Watts • Samples to Nyquist • 16 word FIFO memory GENERAL DESCRIPTION DATEL's ADS-976 ADS-976 is a 16-bit, 200 KHz sampling rate, functionally complete A/D converter with an Internal sample-hold ... | OCR Scan |
1 pages, |
ADS-976 ADC76 AD376 AD1376 DD1S02 DD1S02 abstract |
| Abstract: Selection Guide Digital-to-Analog Converters High Resolution D/A Converters BIT 1 ^ BIT 2 ^ BIT 3 Ol bit 4 rr* BIT 5 R" BIT 6 ^ BIT 7 [T BIT 8 [T BIT 9 ^ BIT10 BIT10 QÃ- BIT 11 QT BIT 12 S 16-BIT 16-BIT LADDER RESISTOR NETWORK AND CURRENT SWITCHES REF CONTROL CKT aÃŒN-i - AD 0AC71 0AC71 AND AD DAC72 DAC72 171 6,3V REF O UT ~23l + 15V "22\ GAIN ADJUST *2l] SUMMING JUNCTION *2ol COMMON "l9| -15V lil +5V ""1 VOUT "l6l BIT 16 "ÃŒ5ÃŒ BIT 15 "ÃŒ7| BIT 14 "ÃŒT1 BIT 13 AD DAC71/AD DAC71/AD DAC72 DAC72 16-Bit Resolution ± ... | OCR Scan |
1 pages, |
OAC1 AD DAC71 81t1 OAC1138 C1138 AD operation amplifier DAC72 DAC71H DAC71 BIT10 16-BIT BIT10 abstract |
| Abstract: ALPHA RF TRANSCEIVER · · · · · · · · · · · · · · · · · FM Transceiver Module Low cost, high performance Fast PLL lock time Wakeup timer 2.2V  3.8V power supply Low power consumption ALPHA-TRX433S ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX915S 10MHz crystal for PLL timing Clock and reset signal output for external MCU use 16 bit RX Data FIFO SPI interface Internal data filtering and clock recover Digital signal strength indicator (DRSSI) Programmable TX frequency deviation (from 15 to 240 KHz) Programmable receiver ... | Original |
14 pages, |
rf traNsmitter receiver 12mhz 433 MHz rf receiver spi In Circuit Serial Programming ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX433S abstract |
| Abstract: ALPHA RF TRANSCEIVER · · · · · · · · · · · · · · · · · ALPHA-TRX433S ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX915S FM Transceiver Module Low cost, high performance Fast PLL lock time Wakeup timer 2.2V  3.8V power supply Low power consumption 10MHz crystal for PLL timing Clock and reset signal output for external MCU use 16 bit RX Data FIFO SPI interface Internal data filtering and clock recover Analog and digital signal strength indicator (ARSSI/DRSSI) Programmable TX frequency deviatio ... | Original |
14 pages, |
rf traNsmitter receiver 12mhz fsk transceiver 915mhz alpha battery 12MHZ E196h ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX433S abstract |
| Abstract: ALPHA RF Transceiver · · · · · · · · · · · · · · · · · ALPHA-TRX433S ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX915S FM Transceiver Module Low cost, high performance Fast PLL lock time Wakeup timer 2.2V  3.8V power supply Low power consumption 10MHz crystal for PLL timing Clock and reset signal output for external MCU use 16 bit RX Data FIFO SPI interface Internal data filtering and clock recover Analog and digital signal strength indicator (ARSSI/DRSSI) Programmable TX frequency deviatio ... | Original |
14 pages, |
ALPHA-TRX868S 12MHZ rf transmitter 433mhz setting commands ALPHA-TRX433S ALPHA-TRX915S ALPHA-TRX433S abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
|||||
| */ tempVal |= BIT15+BIT1+BIT0; /* bit 1,0 set; rest clear */ /* means READ byte access */ /* set Bit 15 (done) in TxBD */ val=SCPInByte(tempVal); /* ignore RxBD */ tempVal = 0; tempVal = (address & 0xff); /* address to read */ /* in bits 7:0 */ tempVal |= BIT15 SCP TxBD to get data back.*/ tempVal = BIT15; /* set Done Bit */ val */ tempVal |= BIT15+BIT1; /* bit 1 set; rest clear */ /* set Bit 15 (done) in TxBD */ val www.datasheetarchive.com/download/80313080-484750ZC/sc302bug.zip (xeeprom.txt) |
Motorola | 03/08/1998 | 271.85 Kb | ZIP | sc302bug.zip |
| */ tempVal |= BIT15+BIT1+BIT0; /* bit 1,0 set; rest clear */ /* means READ byte access */ /* set Bit 15 (done) in TxBD */ val=SCPInByte(tempVal); /* ignore RxBD */ tempVal = 0 bits 7:0 */ tempVal |= BIT15; /* set Done Bit */ val */ /* in bits 7:0 */ tempVal |= BIT15; /* set Done Bit */ val=SCPInByte(tempVal); /* again, ignore RxBD */ /* Set up dummy write to SCP TxBD to get data back.*/ tempVal = BIT15; /* set www.datasheetarchive.com/download/80313080-484750ZC/sc302bug.zip (zeeprom.txt) |
Motorola | 03/08/1998 | 271.85 Kb | ZIP | sc302bug.zip |
| */ tempVal |= BIT15+BIT1+BIT0; /* bit 1,0 set; rest clear */ /* means READ byte access */ /* set Bit 15 (done) in TxBD */ val=SCPInByte(tempVal); /* ignore RxBD */ tempVal = 0 :0 */ tempVal |= BIT15; /* set Done Bit */ val=SCPInByte(tempVal); /* again, ignore RxBD */ /* Set up dummy write to SCP TxBD to get data back.*/ tempVal = BIT15; /* set Done Bit */ val */ tempVal |= BIT15+BIT1; /* bit 1 set; bit 0 and rest clear */ /* set Bit 15 (done) in Tx www.datasheetarchive.com/download/80313080-484750ZC/sc302bug.zip (seeprom.txt) |
Motorola | 03/08/1998 | 271.85 Kb | ZIP | sc302bug.zip |
| BD for EWEN Command operation */ tempVal |= BIT15+BIT1; /* bit 1 set; bit 0 and rest clear */ /* set Bit 15 (done) in TxBD */ val=SCPInByte(tempVal); /* ignore RxBD */ tempVal = 0; /* finish command: Bit 7 cler;bits 6,5 set */ tempVal |= (BIT15+BIT6+BIT5); /* Done set, don't care Int = SCPInByte(BIT15); /* Sends no command, or address */ printf("93C46A 93C46A 93C46A 93C46A Status = %2.2hx WRSR Command operation */ tempVal |= BIT15+BIT0; /* bit 0 set; rest clear */ /* set www.datasheetarchive.com/download/80313080-484750ZC/sc302bug.zip (pokee.txt) |
Motorola | 03/08/1998 | 271.85 Kb | ZIP | sc302bug.zip |
| \n",readReg,result); while (+tempVal < 0x80) { result= (uint8) SCPInByte(BIT15); if (tempVal % 23) = 0 Val < 0xFF) { result= (uint8) SCPInByte(BIT15); if (tempVal % 23) = 0 Val 15+BIT2+BIT0; /* bit 2,0 set; rest clear */ /* set Bit 15 (Done) in TxBD */ result= (uint8) SCPInByte(tempVal); /* ignore RxBD */ result = (uint8) SCPInByte(BIT15); /* Dummy www.datasheetarchive.com/download/80313080-484750ZC/sc302bug.zip (peeke.txt) |
Motorola | 03/08/1998 | 271.85 Kb | ZIP | sc302bug.zip |
| status register (Page 19-5) Upper Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 ) (0) (0) (0) (0) (-) - (2) Data register (Page 18-5) Upper Bit15 - 19.3.1 Control Status Registers (ADCS0 and ADCS1) (Page 19-6) Upper Bit15 Bit14 Bit Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 ) (X) (X) (X) (X) (X) [Bit 15] Selection of A/D resolution www.datasheetarchive.com/files/fujitsu/software/service/90570hm.txt |
Fujitsu | 22/04/1998 | 4.56 Kb | TXT | 90570hm.txt |
| 17:1; unsigned long bit16:1; unsigned long bit15:1; unsigned long bit14:1; unsigned long bit :6; }val1; struct { unsigned short bit15:1; unsigned short bit14:1; unsigned short bit13 www.datasheetarchive.com/download/47977948-692169ZC/rej06b0190.zip (H8SX_16_0190_0924_code.txt) |
Renesas | 04/02/2005 | 0.47 Kb | ZIP | rej06b0190.zip |
| ) Selection register of General Ports or COM ports : Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 ) Control status register (Page 19-5) Upper Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 ) (0) (0) (0) (0) (-) - (2) Data register (Page 18-5) Upper Bit15 - 19.3.1 Control Status Registers (ADCS0 and ADCS1) (Page 19-6) Upper Bit15 Bit14 Bit Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 www.datasheetarchive.com/files/fujitsu/software/service/90520hm.txt |
Fujitsu | 22/04/1998 | 6.8 Kb | TXT | 90520hm.txt |
| #define _BIT15 0x00008000 #define _BIT16 BIT16 BIT16 BIT16 0x00010000 #define _BIT17 BIT17 BIT17 BIT17 0x00020000 #define _BIT ( ) #define CFG_GPSR1_VAL (_BIT0+_BIT1+_BIT16 BIT16 BIT16 BIT16+_BIT24 BIT24 BIT24 BIT24+_BIT25 BIT25 BIT25 BIT25 +_BIT7+_BIT8+_BIT9+_BIT11 BIT11 BIT11 BIT11+_BIT13 BIT13 BIT13 BIT13) #define CFG_GPSR2_VAL (_BIT14 BIT14 BIT14 BIT14+_BIT15+_BIT16 BIT16 BIT16 BIT16 0x00000000 #define CFG_GPDR0_VAL ( CFG_GPDR2_VAL (_BIT14 BIT14 BIT14 BIT14+_BIT15+_BIT16 BIT16 BIT16 BIT16) #define CFG_GAFR0_L_VAL (_BIT22 BIT22 BIT22 BIT22+_BIT24 BIT24 BIT24 BIT24+_BIT31 BIT31 BIT31 BIT31) #define www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (logodl.h) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| 00004000 #define BIT_15 0x00008000 #define BIT_16 (16 ; IFX_UINT32 UINT32 UINT32 UINT32 bit12: 1 ; IFX_UINT32 UINT32 UINT32 UINT32 bit13: 1 ; IFX_UINT32 UINT32 UINT32 UINT32 bit14: 1 ; IFX_UINT32 UINT32 UINT32 UINT32 bit15: 1 ; IFX www.datasheetarchive.com/files/infineon/mc_data/dave/products/tc1130.dip!/tc1130/testcases/ethernet/common.h |
Infineon | 21/06/2004 | 13980.71 Kb | DIP | tc1130.dip |