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SN74LS90-W Texas Instruments Decade Counter 0-WAFERSALE visit Texas Instruments
CD4024BKMSR Intersil Corporation 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 7-BIT UP BINARY COUNTER, CDFP14, CERAMIC, DFP-14 visit Intersil
HCTS393KMSR Intersil Corporation HCT SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP14, METAL SEALED, CERAMIC, DFP-14 visit Intersil
HCS163KMSR Intersil Corporation HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, CDFP16, CERAMIC, DFP-16 visit Intersil
HCTS193KMSR Intersil Corporation HCT SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, CDFP16, CERAMIC, DFP-16 visit Intersil
HCS161HMSR Intersil Corporation HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, UUC16, DIE-16 visit Intersil

bcd counter using j-k flip flop diagram

Catalog Datasheet MFG & Type PDF Document Tags

74169 SYNCHRONOUS 4-BIT BINARY COUNTER

Abstract: 74139 demultiplexer Synchronous BCD Up/Down Counter with Down/Up Mode Control Synchronous 4-Bit Binary Up/Down Counter with Down/Up Mode Control Synchronous BCD Up/Down Dual Clock Counter with Clear Synchronous 4-Bit Binary Up , Flip Flop with Reset D-Type Flip Flop with Set/Reset J-K Flip Flop with Reset J-K Flip Flop with Set/R eset Toggle Flip Flop with Reset Dual Inverter Dual 2-Input NAND Dual 3-Input NAND Dual 4-Input NAND Dual 2-Input NOR Dual 3-Input NOR Dual 4-Input NOR Dual S-R Type Latch Dual D-Type Flip Flop with Reset
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74139 demultiplexer

Abstract: 74169 SYNCHRONOUS 4-BIT BINARY COUNTER /Up Mode Control (0191) 51 30 74192 Synchronous BCD Up/Down Dual Ciock Counter with Clear (0192) 48 , Reset 2 8 41 DFR D-Type Flip Flop with Reset 4 8 42 DF D-Type Flip Flop with Set/Reset 5 8 43 JKFR J-K Flip Flop with Reset 6 8 44 JKF J-K Rip Flop with Set/Reset 7 8 45 TFR Toggle Flip Flop with , -lnput NOR 2 3 53 LT2 Dual S-R Type Latch 3 8 54 DFR2 Dual D-Type Flip Flop with Reset 8 8 55 2AD2 Dual 2 , The OKI MSM60300. MSM60700. and MSM61000 gate arrays are fabricated using state-of-the-art 3/i
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74139 demultiplexer 74169 SYNCHRONOUS 4-BIT BINARY COUNTER pin diagram 41 multiplexer 74153 3-8 decoder 74138 pin diagram bcd counter using j-k flip flop diagram pin diagram priority decoder 74148 MSMC0300

IC 3-8 decoder 74138 pin diagram

Abstract: binary to gray code conversion using ic 74157 Invert Driver-3 70 2.7 Flip-flop 1-48 DLT D-Type Latch with Reset 8 3.6 1-49 DFF D-Type Flip Flop 8 4.6/5.1(2) 1-50 DFR D-Type Flip Flop with Reset 8 4.7/5.4(2) 1-51 DF D-Type Flip Flop with Set/Reset 8 4.8/5.6(2) I-52 JKFF J-K Flip Flop 8 4.6/5.5(2) 1-53 JKFR J-K Flip Flop with Reset 8 4.7/5.7(2) I-54 JKF J-K Flip Flop with Set/Reset 8 4.8/6.1(2) 224 is Material Copyrighted By Its , -1 â'" 1-66 LDFR D-type Flip Flop with Reset and LSSD 8 5.4/2.7(2) LSSD flip-flop (3) 1-67 LDFF
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IC 3-8 decoder 74138 pin diagram binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 7444 series Excess-3-gray code to Decimal decoder binary to gray code conversion using ic 74139 MSM91H000 72MS40

TD 6316 AP

Abstract: modulo 10 counter Am9310/9316 BCD Decade Counter/Four-Bit Binary Counter Distinctive Characteristics: » Fully , . FUNCTIONAL TERMS: toyachroftoti» (ripple) Counter All outputs (flip flops) change state on command from a , and In the LOW state it is equal to lF. M Ftp Flop Properties similar to an RS Flip Flop exoept that J*K>1ii allowed. Refer to Truth Table I. J, K Inputs The logic inputs for setting the JK flip flop , (flip flops) change state on ¡ommand from the clock. 'â'¢rmtnal Count The highest number a counter
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TD 6316 AP modulo 10 counter U7B931059X AM9316 RS flip flop IC bcd counter using t flip flop diagram 21850E/0-I

CD4069A

Abstract: Mic5009 Addressable Latch Hex Schmitt Trigger BCD Counter Binary Counter BCD Counter Binary Counter Hex D Flip Flop Decade Up/Down Counter Binary Up/Down Counter BCD Up/Down Counter 8 Channel Data Selector 4 Bit Transparent Latch 4 Bit Transparent Latch Binary Up/Down Counter Dual BCD Up Counter Dual Binary Up Counter , Flip Flop Hex D Flip Flop Quad D Flip Flop Synchronous Decade Up/Down Counter Synchronous Binary Up/Down Counter 256 Bit RAM Inverting Octal Buffer Octal Buffer Octal D Flip Flop Hex Inverting Buffer Hex
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54C244 CD4069A Mic5009 CD4584B design a BCD counter using j-k flipflop cd4528b CD4051A D00QS MIC54C14JBR MIC54C157JBR MIC54C85JBR MIC54C174FSR M1C54C244FSR

MK50395N

Abstract: 7490 Decade Counter be loaded digit-by-digit with BCD data. The counter has an asynchronous-clear function. Scanning is , BCD e E 33] Rc IN f E ni RD g. E MK 50395 MK 50396 E LOAD COUNTER A E MK 50397 ~3oj LOAD , COUNTER Cc E D | L.SD BCD IN cB E 5] EQUAL C4 E 22] vOD CLEAR [20 3 SCAN OPERATIONS: SIX , strobe outputs and the BCD inputs is one method to supply BCD data for loading the counter decades. The , inputs except Counter BCD, Register BCD, and SCAN inputs are high impedance CMOS compatible. Three basic
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MK50395N 7490 Decade Counter MK 50395 SN7490 MK5009 decode counter 7490 MK50396N MK50397N

74C926

Abstract: 74L04 increased noise would swamp out any improvemer by orders of magnitude. Zero-Crossing Flip Flop. The problem , as a combination LED readout, synchronous counter, and BCD latch. In this circuit, the clock runs , designer the freedom of using any output format his system requires. With reasonable care, the 0.001 , of instruments using only one basic p-c board with 2 or 3 jumper points. The family could include: Â , ±3.2768 Volts (16 bits in 0.1 mV increments) CONNECTION DIAGRAM 8053 Auto Zero Switch Network INe INl. 2. 3
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ICL8052CDD CD4073 CD4070 74L04 TIL306 74C926 pin out diagram of CD4027 74l74 CD4027 application note cd4027 ICL8052/8053 ICL8052A/8053A ICL8052CPD ICL8052ACPD ICL8052ACDD

74L04

Abstract: IC 74C926 function diagram for an A-D converter using the ICL8052/8053 pair. In this circuit, each measurement cycle , improvement by orders of magnitude. 3. Zero-Crossing Flip Flop. The problem that the zero-crossing flip-flop , as a combination LED readout, synchronous counter, and BCD latch. In this circuit, the clock runs , designed to "lock-in" the accuracy of a DVM and at the same time give the designer the freedom of using any , using only one basic p-c board with 2 or 3 jumper points. The family could include: ±200.0 mV, Full
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IC 74C926 circuit diagram of IC MM74C926 circuit diagram of IC 74C926 pin diagram of IC MM74C926 pin DIAGRAM OF IC 74c926 CD4027 ic ICL8053CPD ICL8053CDD ICL8053ACPD ICL8053ACDD 120KC CD4025

bcd counter using j-k flip flop diagram

Abstract: pn sequence generator using jk flip flop -16 binary counter and the F10137 is a BCD (8421) decade counter. All operations are synchronous and state , o utput is subject to decoding spikes and therefore should not be used as a clock. The flip -flop s , . Figure 5 illustrates an arrangement for a program m able down counter using F10136 circuits. When the , Inhibit Count) -2 .0 -4 .0 -1 .0 -2 .5 ns Fig. 4 Multi-Stage Counter Using Ripple Carry Fig , = Pin 1 (5) V CC2 = Pin 16 (4) V EE = Pin 8 (12) ( ) = Flatpak C O N NEC TIO N DIAGRAM DIP (TO P
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pn sequence generator using jk flip flop ECL Handbook F10536 F10537 F10136/F10536 F10137/FI

74C926

Abstract: IC 74C926 /8053A oiMnniraiL THEORY OF OPERATION Figure 4 shows a function diagram for an A-D converter using the , increased noise would swamp out any improvemer by orders of magnitude. 3. Zero-Crossing Flip Flop. The , as a combination LED readout, synchronous counter, and BCD latch. In this circuit, the clock runs , designer the freedom of using any output format his system requires. With reasonable care, the 0.001 , of instruments using only one basic p-c board with 2 or 3 jumper points. The family could include: Â
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CD4027 applications ic 8053 ic mm74c926 TIL306 Application Notes applications of 74C926 tc 306s ICL8052 ICL8068 L8068/1C L8052/1C ICL8068/ICL8052/

1LB553

Abstract: Rauland ETS-003 Section 3 the Type Number index is arranged in numeric sequence using the basic type numbers stripped o f
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1LB553 Rauland ETS-003 Silec Semiconductors 4057A transistor sr52 logos 4012B IEC179 TDA1510 TDA1510A

Fairchild dtl catalog

Abstract: Fairchild 9960 nixie driver MSI Up/Down BCD Counter CCSL 3-97a 9964 AND/OR Gate CT/iL 4-68 9312 MSI 8-lnput Multiplexer TT L , Two-Variable TTL 3-32e Function Generator 9306 MSI Up/Down BCD Counter CCSL 3-97a 9312 MSI 8 , Counters BCD Up/Down Counter Decade Counter Hexidecimal Counter Hexidecimal Up/Down Counter F, D F, D F , 15 MHz Binary Elements RS Flip Flop Buffered JK Flip Flop Dual Flip Flop AC Coupled Flip Flop Type D Flip Flop Dual Rank Flip Flop One Half Shift Register With Inverter One Half Shift Register
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Fairchild dtl catalog Fairchild 9960 nixie driver fairchild micrologic MARKING code WMM RF transistor UL903 gi 9644 diode BR-BR-0034-58

pin diagram for IC cd 1619 fm receiver

Abstract: ic 7490 pin diagram decade counter - fail d- (LSB) BCD OUTPUTS (MSB) STORE - (MSB) cD COUNTER Câ'ž BCD c INPUTS CB (LSB) cA CLEAR , REGISTER oj BCD INPUTS (MSB) LOAD COUNTER LOAD REGISTER (MSD) DIGIT STROBE OUTPUTS (LSD) â , digit-by-digit with BCD data. The counter has an asynchronous-clear function. latch which is then multiplexed , connections are shown in Figure 1. V-15 BLOCK DIAGRAM Figure 2 BCD SEGMENT OUTPUTS OUTPUTS A BCD abcdefg , LEADING ZERO BLANKING 6:1 MUX 6-DIGIT LATCH M M t 1 SCAN COUNTER SCAN OSC COMPARATOR 6-DIGIT BCD
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MK50395 pin diagram for IC cd 1619 fm receiver ic 7490 pin diagram decade counter counter meter mk50395 pin configuration IC 74151 ic sn7490 pin diagram Decade Counter 7490 BCD to 7-Segment MK50395/6/7 MK50396 MK50397 CD4043

circuit diagram of MOD 100 counter using ic 7490

Abstract: circuit diagram of MOD 8 counter using ic 7490 Logic Diagram of 8281 .2 4 2-7 BCD Decade Counter Logic Diagram of 8280 , .2-20 2-21 Logic Representation of 8282 BCD Decade Ripple Counter.2 21 2-22 Logic Diagram of 8283 , -O 0 I .CARRY OUT Figure 1-4. 8285 BCD Synchronous Up/Down Counter Logic Diagram ac^A so-1 V(N vpc , . Figure 2-7 is the logic diagram of a modified ripple configuration, the 8280 BCD Decade Counter. Both , 8281 .2-9 OPERATION OF THE 8290 BCD DECADE HIGH-SPEED RIPPLE COUNTER AND
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circuit diagram of MOD 100 counter using ic 7490 circuit diagram of MOD 8 counter using ic 7490 12 hour digital clock using 7490 mod 5 ring counter using JK flip flop mod 8 ring counter using JK flip flop circuit diagram of MOD 12 counter using ic 7490 MSI0041

philips ecg replacement guide

Abstract: alarm sonar 560 mm Logic Devices (PLDs) that can be quickly and easily integrated into system designs. In using this manual , also include a circuit or block diagram and an AMAZE design file listing to implement that application , transition functions using a single term. Virtually hidden in between the AND array and the OR array is the , significance being that the complement state of several product terms can be generated using one additional AND , drawing of the PLUS105 in full detail. Figure 3-4 shows a compressed rendition of the same diagram so that
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philips ecg replacement guide alarm sonar 560 mm alarm sonar 560 r interfacing stepper motors with 80386 microprocessor PHD48 plhs18p8

DM8570

Abstract: DM9093 . DM5472/DM7472 (SN5472/SN7472) JK Master/Slave Flip Flop , . OM5474/DM7474 (SN5474/SN7474) Dual O Flip Flop , ) . DM54174/DM74174 (SN54174/SN74174) Hex D Flip Flop , . 1-143 DM7512/DM8512 Dual Gated Master/Slave JK/D Flip Flop , .1-195 DM 7613 DM8613 Quad Gated D Flip Flop
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DM8570 DM9093 DM8520 CV 7599 diode lm5534 logic diagram of 74185 54L/74L AN-12 DM7200/DM8200 AN-17 AN-22 AN-35

5962R11212

Abstract: IS1825 ELDRS free 75 Flip-Flops - Dual CMOS Dual D Type Flip Flop with Set and Reset, Advanced Logic CMOS Dual D Type Flip Flop with Set and Reset, Advanced Logic CMOS Dual J-K Master-Slave Flip-Flop CMOS Dual JK Flip Flop ACTS74MS 5962F96713 CD4027BMS HCS109MS 5962R96629 , MIL-STD-883 Method 1019 using an in- â'¢ Headquartered in Milpitas, CA house Gammacell 220â"¢ 60Co , . VIRTEX5MEZPWREV1Z Block Diagram 8 Intersil Space Solutions 2015 www.intersil.com 6A Switching Regulator
Intersil
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5962R11212 IS1825 ISL-706 ISL706 HS-26CLV32RH MIL-PRF-38535/ D-85737 1-888-INTERSIL BR-558

SN72710L

Abstract: MC1013P L L L H 4 L I, H L 9 H L 1. H PIN 14 = t- 5V PIN 7 = GND. Decade ripple counter. This counter uses set & clear flip flops with AC coupling between stages. 34 Q8 AMPEX REV 111 MC 839 P MC 839 L AMPEX 580-416 587-190 DIVIDE BY 1G COUNTER ACTIVE P U LL UP 6 1 Q8 4 11 J_ _ 1 1 Q1 , 0 1i . Ql T 1 10 6 SD2 | 9 7 Q3 T CD 12 5 BINARY COUNTER T â'"0 CD Q4 T CD CD , MC 838 P AMPEX 586-551 4 19-17 DECADE COUNTER ACTIVE PU LL UP 11 6 1 1 1 Ql Q2 Q4 Q8 SDo
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SN72710L MC1013P 796HC MC680P MC838P MC814G LH0002C LH0002CN NH0005C DAC08CZ NH0014C DH0034

74C926

Abstract: IC 74C926 Offim Fig. 1 shows the functional block diagram of the operating system. For a detailed explanation , Converter Functional Block Diagram DETAILED DESCRIPTION Analog Section Figure 2 shows the equivalent , digital section includes the clock oscillator circuit, a 16, 14 or 12 bit binary counter with output , handshake logic, as shown in the Block Diagram Figure 5 (16 bit version shown). Throughout this description , detected at Run/Rold. See Figure 6 for details. Using the Run/Hold input in this manner allows an easy
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TTL 74L04 pin configuration for ic 74c926 ic CD4027 250fiV CD4027 be flip-flop recommended circuit ICL8052/ICL7104 ICL8068/ ICL7104 ICL7104-16 ICL7014-14 ICL7104-12

diode lt 8220

Abstract: lt 8242 four-bit BCD coded words that determine what each IMixie tube will display. A four-bit binary counter , information of all,counter outputs can be bussed onto common BCD lines. Thus, the design of a multiplexed , BCD information from 8T10 buffers and corresponding digit drivers is indexed by an 8293 counter in , FLIP FLOP â  8T09/10 "1 ". This fact is beneficial when considering fail-safe operation since , F lip Flop Line Driver Line Receiver S c h m itt Trigger Line Driver Line Receiver B i-D
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diode lt 8220 lt 8242 Monsanto segment display 6e2 tube Signetics NE561B 82S07
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