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Abstract: sOo:I H 0.9mA b&e b&c m :I L 30mA VoL o~0.7V &8out :I L=1smA sOW :I Ho-3mA V H 5 .IJC b&e b&c:IoR=-ImA `2 out Ior :I H (VDD -0.5mA , +IO 9so -10.7 -10 -IO b9s -10 1589 Z 6,7X` 1 4.AM r~A 1 L L H , ( ) z h ( ) b&q(b& ) ($) : ",Ur :( ) E" ; ( ) Km6 (bz) 30 , (0.7~0 9VDD)%~p 5+~0 9VDD)Vp|0 (1.0~0.9VDD)Vp p 72;,%-1 MIIz o~30mA b&e b&c ... Original
datasheet

20 pages,
678.02 Kb

IC LB3500 DIP42S LB3500 IC LC7265 bc 107 common base h parameters LC7265 LCT265 LCT265 abstract
datasheet frame
Abstract: summary of the effects of using the PTF product at the more common combinations of power rating and case , applicable PACKAGING Note (4) Historical tolerance codes were BB for 0.01 % and BC for 0.02 % * Pb , 55 to + 150 - 55 to + 150 - 55 to + 150 10-9/h , MIL-PRF-55182 MIL-PRF-55182 Paragraph 4.8.18 1000 h rated power at + 85 °C Dielectric Withstanding Voltage ± 0.08 % , MIL-STD-202 MIL-STD-202, Method 107 - 55 °C to + 85 °C Life (at Standard Power Ratings) TEST RESULTS (TYPICAL TEST ... Original
datasheet

4 pages,
164.54 Kb

T-13 MIL-PRF-55182 mil-prf-5518 PTF651 PTF56 bc 107 common base h parameters PTF65 datasheet abstract
datasheet frame
Abstract: using the PTF product at the more common combinations of power rating and case size, as well as , PACKAGING Note (4) Historical tolerance codes were BB for 0.01 % and BC for 0.02 % * Pb containing , Category Temperature Range Failure Rate Weight (Max.) UNIT W V Veff K/W N °C 10-9/h g PTF51 PTF51 0.05 200 > 500 , Voltage CONDITIONS OF TEST MIL-PRF-55182 MIL-PRF-55182 Paragraph 4.8.18 1000 h rated power at + 85 °C MIL-STD-202 MIL-STD-202, Method 107 - 55 °C to + 85 °C MIL-R-10509 MIL-R-10509, Paragraph 4.7.6 MIL-PRF-55182 MIL-PRF-55182, Methods 4.8.10 MIL-PRF-55182 MIL-PRF-55182 ... Original
datasheet

4 pages,
164.87 Kb

datasheet abstract
datasheet frame
Abstract: Decoder Block Diagram BCCK BC DATA INTERFACE LOCK BCSYNC AGC RXI RNXI BCDIN TDM_CLK A , SCCK BC M_CLK BCDO SCK SOURCE DECODER INTERFACE SC MANGEMENT PLL/CLOCK , DE-INTERLEAVER BC/TSCC MICROPROCESSOR INTERFACE RESET INTR SCL SDA D96AU541C D96AU541C MINTR , parameters of each function can be programmed through the I2C interface. TDM Demultiplexer The TDM frame is , and BC recovery This block, after the Broadcast Channel (BC) selection, performs the extraction and ... Original
datasheet

43 pages,
358.87 Kb

Viterbi Decoder TQFP44 STA002 BC 545 CIRCUIT DIAGRAM OF Bc 547 eb 102H STA002 abstract
datasheet frame
Abstract: ) Offset and gain error parameters of this ADC can be improved by calibration. Calibrating offset and gain , Terminology Code Description Related to Numeric Base 0b Binary Notation 0x Hexadecimal , sample value. Figure 3-1. 12-bit ADC Detailed Block Diagram S/H-1 Vi + Vi+1 Gi ­ , Di clk Vin clk S/H - 2 clk CYCLIC STAGE clk FLASH ADC Di j Dout Bit , clock cycles are necessary to sample and hold (S/H-2) the input voltage before conversion. During that ... Original
datasheet

18 pages,
508.54 Kb

AT91SAM atmel 938 AT91SAM abstract
datasheet frame
Abstract: Decoder Block Diagram BCCK BC DATA INTERFACE LOCK BCSYNC AGC BCDIN SCEN TDM_CLK RXI , SCCK BC M_CLK BCDO SCK SOURCE DECODER INTERFACE SC MANGEMENT PLL/CLOCK DISTRIBUTION SDO SEN FRAME SYNC. VITERBI PRC MANAGEMENT REED SOLOMON BC_CLK BC/TSCC , working conditions most of the parameters of each function can be programmed through the I2C interface. , microcontroller via the I2C interface. - PRC extraction and BC recovery This block, after the Broadcast Channel ... Original
datasheet

43 pages,
273.62 Kb

TQFP44 STA002 sccf 117H eb 102H STA002 abstract
datasheet frame
Abstract: Coding Format reg X, A, B, C, D, E, H, L reg1 X, B, C, D, E, H, L rp XA, BC, DE, HL , device. The parameters for the device may change before final production or NEC Corporation, at its own , , 1.33, 2.67, 10.7 ms (System clock, @ 6.0 MHz) Internal memory PROM 16384 ¥ 8 bits RAM , for CMOS input/output) · No. of common output pins: 4 · Drives up to 12 ¥ 4 segments · Display mode , 3 PCL : Programmable Clock COM0-COM3 : Common Output 0 to 3 INT0, INT4 : External ... Original
datasheet

38 pages,
424.38 Kb

RBS 3206 datasheet abstract
datasheet frame
Abstract: Common Dimensions in millimeters b DIN f h*(1) H A TYPE IEC AB DL1106 DL1106 THRU 233 112 190 DL1110 DL1110 , 1 1.01 Features Common to all 8720MC 8720MC High Performance Digital , 1.1 Common Bus Architecture 4 1.1.1 , 11 2.1 Specifications Common to all Drive Amplifiers _ 11 , a 750vdc common bus interface. These high performance digital drives are complimented by another 6 ... Original
datasheet

70 pages,
1242.95 Kb

37KW motor wiring diagram SNS-60 8720SM 9.3kw 6 pole motor stator winding data .37 KW motor rotary encoder sincos DL131 varistor 472 SRS LA 7376 regenerative braking 1336WB 110 KW motor INPUT 24VDC CHOPPER 12VDC OUTPUT 8720MC 8720MC abstract
datasheet frame
Abstract: VldrWrtePort. · WDTCR $65 = $0B Unlock System Control Registers. · CBR = $F0 Base address for Common Area 1 · BBR = $00 Bank Base Register initialised to zero · CBAR = $84 Common Area 0 = 16K, Bank Area = , System Control Registers. · CBR = $F0 Base address for Common Area 1 · BBR = $00 Bank Base Register , OPMODE2 OPMODE1 Action L L Normal Operation (execute code from external memory) L H Processor enables and executes code from the internal BOOT ROM after reset H L Reserved H H ... Original
datasheet

64 pages,
137.08 Kb

Z80S183 transistor pcr 406 diode jr 702 transistor BC 945 Z80182 BC 677 Z80S183 abstract
datasheet frame
Abstract: POINTER BASE ADDRESS 13 10 BC TRAP OP CODE 12 QUEUE POINTER BASE ADDRESS 12 9 RT COMMAND , ADDRESS 9 6 MONITOR DATA STACK 50% ROLLOVER 8 QUEUE POINTER BASE ADDRESS 8 5 ENHANCED BC IRQ3 7 QUEUE POINTER BASE ADDRESS 7 4 ENHANCED BC IRQ2 6 QUEUE POINTER BASE ADDRESS 6 3 ENHANCED BC IRQ1 5 QUEUE POINTER BASE ADDRESS 5 2 ENHANCED BC IRQ0 4 QUEUE , (BU-62743 BU-62743) · BC/RT/MT with 4K RAM (BU-62843 BU-62843) · BC/RT/MT with 64K RAM, with RAM Parity (BU-62864 BU-62864 ... Original
datasheet

56 pages,
361.86 Kb

STANAG 3838 BU-62843 MT 6605 BU-62864 BU-62743/62843/62864 BU-62743/62843/62864 abstract
datasheet frame

Extended Electronics Archive (Experimental)

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Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 420h 6A 04 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 400h 10A 04 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/10052920-82312ZC/utility.zip (DUAL400.500)
Digital Logic 05/04/1997 490.4 Kb ZIP utility.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 8020h 6A 80 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 8000h 10A 80 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/10052920-82312ZC/utility.zip (DUAL8000.500)
Digital Logic 05/04/1997 490.4 Kb ZIP utility.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 420h 6A 04 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 400h 10A 04 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/91897827-82311ZC/smc9000s.zip (DUAL400.500)
Digital Logic 27/01/1998 1057.09 Kb ZIP smc9000s.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 8020h 6A 80 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 8000h 10A 80 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/91897827-82311ZC/smc9000s.zip (DUAL8000.500)
Digital Logic 27/01/1998 1057.09 Kb ZIP smc9000s.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 420h 6A 04 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 400h 10A 04 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/82781654-75687ZC/utility.zip (DUAL400.500)
Digital Logic 03/10/2000 577.77 Kb ZIP utility.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 8020h 6A 80 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 8000h 10A 80 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/download/82781654-75687ZC/utility.zip (DUAL8000.500)
Digital Logic 03/10/2000 577.77 Kb ZIP utility.zip
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 420h 6A 04 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 400h 10A 04 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/files/digital-logic/drivers/network/smc9000_family/utility/cis/dual400.500
Digital Logic 17/03/1997 16.94 Kb 500 dual400.500
TPCC_LAST Last card index 69 20 TPCC_RADR Config reg base address (LSB) 8020h 6A 80 TPCC_RADR Config reg base address (MSB) 6B 77 address (LSB) 8000h 10A 80 TPCC_RADR Config reg base address (MSB) 10B 63 No common memory 03 FF end of device info field 30 "0" 29 20 " " 2A 45 "E" 2B 74 "t" 2C 68 "h" 2D 65 "e" 2E 72 "r" 2F 6E "n" 30 65 "e" 31 74
www.datasheetarchive.com/files/digital-logic/drivers/network/smc9000_family/utility/cis/dual8000.500
Digital Logic 17/03/1997 16.94 Kb 500 dual8000.500
$20000 BCC EPROM size (bytes) 107 107 0004 0000 |IRAM_BASE EQU $40000 108 abs. 0x20000 138 @106 IRAM_BASE abs. 0x40000 166 @107 * 28 28 |* selects using the corresponding values from the parameter area : * 32 32 |* 1. Source equivalent copy of CPU32Bug parameter area for Motorola . * 38 38 |* 3. Parameters which reference linker symbols (XREF/XDEF) will
www.datasheetarchive.com/download/22469157-313889ZC/cpu32bugfw.zip (CHIPSEL.LST)
KyteLabs 11/06/2002 221.3 Kb ZIP cpu32bugfw.zip
Start Length Name Class 0001:00000000 0001bdbeH .text CODE 0002:00000000 00003c55H .rdata DATA 0002:00003c55 00000000H .edata DATA 0003:00000000 00000004H .CRT$XCA DATA 0003:00000004 00000004H .CRT$XCZ DATA 0003:00000008 00000004H .CRT$XIA DATA 0003:0000000c 00000004H .CRT$XIC DATA 0003:00000010 00000004H .CRT$XIZ DATA 0003:00000014 00000004H .CRT
www.datasheetarchive.com/download/5159206-7905ZC/ck002800.zip (remon.map)
AMD 01/09/1999 1020.63 Kb ZIP ck002800.zip