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AND-1510SAL AND Displays DISPLAY, SEVEN SEGMENT, 38.1MM, RED; LED Color:Red; Forward Current If:10mA; Forward Voltage:4.2V; Luminous Intensity:4.6mcd; No. of Digits / Alpha:1; Character Size:38.12mm; Common Connection:Common Anode; Packaging:Each ;RoHS Compliant: Yes (Aug 2016) Newark element14 Buy
AND-1510SAL AND Displays - 1 from $5.8170 (Sep 2016) Quest Components Buy
AND-1510SCL AND Displays DISPLAY, SEVEN SEGMENT, 38.1MM, RED; LED Color:Red; Forward Current If:10mA; Forward Voltage:4.2V; Luminous Intensity:4.6mcd; No. of Digits / Alpha:1; Character Size:38.12mm; Common Connection:Common Cathode; Packaging:Each ;RoHS Compliant: Yes (Aug 2016) Newark element14 Buy
AND-2307SAL AND Displays SEVEN-SEGMENT NUMERIC LED DISPLAY,1-CHARACTER,RED,DIP 11 from $6.75 (Sep 2016) Quest Components Buy
AND-4310GCL INTERSWITCH (Purdy Elec) SWITCH 6,476 from $2.23 (Aug 2016) Powell Electronics Buy
AND-4310GCL Purdy Electronics SWITCH 6,476 from $2.23 (Sep 2016) Powell Electronics Buy
AND-5610SAL AND Displays LED, Seven Segment; 3.3 mcd (Typ.) @ 10mA; 635 nm (Typ.) @ 10 mA; -25 degC from $1.39 (Sep 2016) Allied Electronics Buy
AND-5610SAL AND Displays DISPLAY, SEVEN SEGMENT, 14.2MM, RED; LED Color:Red; Forward Current If:10mA; Forward Voltage:2.1V; Luminous Intensity:3.3mcd; No. of Digits / Alpha:1; Character Size:14.22mm; Common Connection:Common Anode; Packaging:Each ;RoHS Compliant: Yes (Sep 2016) Newark element14 Buy
AND-8010SALB AND Displays DISPLAY, SEVEN SEGMENT, 20.3MM, RED; LED Color:Red; Forward Current If:10mA; Forward Voltage:2.1V; Luminous Intensity:3.8mcd; No. of Digits / Alpha:1; Character Size:20.32mm; Common Connection:Common Anode; Packaging:Each ;RoHS Compliant: Yes (Aug 2016) Newark element14 Buy
AND-TFT-25XS-LED AND Displays Display, Color, LCD, 2.5" Diag., 160 # 234, 12 V, NTSC/PAL from $45.33 (Aug 2016) Allied Electronics Buy
AND-TFT-25XS-LED-KIT AND Displays Display, Color, LCD, 2.5" Diag., 160 # 234, 12 V, NTSC/PAL, Prototyping Kit from $95.20 (Aug 2016) Allied Electronics Buy
AND-TFT-35PA AND Displays Display, Color, LCD, 3.5" Diag., 160 # 234, 12 V, NTSC/PAL from $93.05 (Sep 2016) Allied Electronics Buy
AND-TFT-35PA-4HB AND Displays Display, Color, LCD, 3.5" Diag., 160 # 234, 12 V, NTSC/PAL from $208.79 (Aug 2016) Allied Electronics Buy
AND-TFT-35PA-4HB-KIT AND Displays Display, Color, LCD, 3.5" Diag., 160 # 234, 12 V, NTSC/PAL, Prototyping Kit from $269.47 (Sep 2016) Allied Electronics Buy
AND-TFT-35PA-4HB-KIT INTERFAN LCD MODULE KIT; Supply Voltage Min:3VDC; Supply Voltage Max:5.5VDC; Backlighting Colour:-; No. of Digits / Alpha:-; Display Size:50.54mm x 72mm; Screen Size:3.5"; Panel Cutout Height:-; Panel Cutout Width:-; Panel Cutout Diameter:- ;RoHS Compliant: Yes (Aug 2016) Newark element14 Buy
AND-TFT-35PA-KIT AND Displays Display, Color, LCD, 3.5" Diag., 160 # 234, 12 V, NTSC/PAL, Prototyping Kit from $157.41 (Sep 2016) Allied Electronics Buy
AND-TFT-35PA-KIT AND Displays LCD DISPLAY PANEL; Supply Voltage Min:3VDC; Supply Voltage Max:5.5VDC; Backlighting Colour:White; No. of Digits / Alpha:-; Display Size:50.54mm x 72mm; Screen Size:3.5"; Panel Cutout Height:-; Panel Cutout Width:-; Product Range:- ;RoHS Compliant: No (Aug 2016) Newark element14 Buy
AND-TFT-35VX AND Displays Display, Color, LCD, 3.5" Diag., 640 # 480, 5 V, NTSC/PAL/VGA from $185.43 (Aug 2016) Allied Electronics Buy
AND-TFT-35VX-KIT AND Displays Display, Color, LCD, 3.5" Diag., 640 # 480, 5 V, Analog VGA/NTSC/PAL, Proto Kit 2 from $220.86 (Sep 2016) Allied Electronics Buy
AND-TFT-35VX-KIT AND Displays COLOR TFT LCD MONITOR; Signal Input Type:NTSC, PAL, TFT Analog VGA ;RoHS Compliant: Yes from $298.8200 (Sep 2016) Newark element14 Buy

and/GMII*

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: communications interfaces, such as MII, RMII, GMII, TBI, RTBI, NMSI, UTOPIA, POS and TDM. The dual 32-bit DDR , memory 740 TBGA 668 PBGA 740 TBGA controllers and the integrated security engine. The MPC8360E MPC8360E , /POS Ports 128 MPHY, 2 GMII/RGMII, 2 TBI/RTBI communications processor's advanced features make it suitable for today's and tomorrow's wired and wireless access equipment, as well as small and , system-on-a-chip (SoC) digital subscriber line access multiplexers platform. This makes it easy and fast to ... Freescale Semiconductor
Original
datasheet

4 pages,
312.6 Kb

RFC2684 mcc ss7 MPC8358 MPC8358E MPC8360 MPC8360E Multi-Channel hdlc Controller pabx systems powerful 32-bit microcontrollers private automatic branch exchange "Base Station Controller" TEXT
datasheet frame
Abstract: interfaces through FPGA logic • GMII and SGMII • Supports IEEE 1588-2002 and IEEE 1588-2008 standards , ® FPGAs and SoCs deliver optimal performance and power efficiency in the midrange. By using TSMC's 20-nm process technology on a high-performance architecture, Arria 10 FPGAs and SoCs deliver higher performance , to the SoC product line and extends Altera’s leadership in programmable devices that feature the , 28.05 Gbps and backplane capability up to 17.4 Gbps • Hard PCI Express Gen3 intellectual property (IP ... Altera
Original
datasheet

40 pages,
1411.86 Kb

AIB-01023 TEXT
datasheet frame
Abstract: supporting 10 and 100 Mbps, and 1 Gbps Ethernet/IEEE 802.3 networks with MII, RMII, GMII, SGMII, RGMII , supporting 10 Mbps, 100 Mbps and 1 Gbps Ethernet/IEEE® 802.3 networks with MII, RMII, GMII, RGMII, RTBI and , /POS-PHY interfaces ·· Three 1 Gbps Ethernet interfaces using GMII. Two 1 Gbps Ethernet interfaces using , T Ethernet (IEEE® 802.3, 802.3u, 802.3x, 802.3z and 802.3 ac-compliant) with two MII/GMII/TBI , embedded scalar and vector floating-point APUs IEEE® 802.3 networks with MII, RMII, GMII, RGMII, RTBI ... Freescale Semiconductor
Original
datasheet

61 pages,
5147.95 Kb

MPC8323e mds processor board MPC832x 88e1111 mii 88E1111 PHY registers map IPTV schematic MPC8349E MAC E300 Interrupt Vector Table MPC8548E circuit diagram of wifi wireless router ADSL2 Modem circuit diagram mpc dhrystone VSC7385 ADSL2 DSLAM chipset block diagram of wifi enabled robo TEXT
datasheet frame
Abstract: specified in IEEE 802.1D and 802.1Q; • One 10/100 base-T and 10/100/1000 base-T with MII/GMII , portfolio includes a comprehensive suite of semiconductor solutions for broadband communications and the , connections. The processor supports the IEEE 802.3ah-2004 MAC and extensions to RS, PCS, & PMA functions to , (SoC) that includes an integrated clock and data recovery/serializer deserializer (CDR/SerDes) block , , advanced 802.1P quality of service (QoS) management, 802.1D VLAN tagging and bridging, and Layer 2, 3 and ... Conexant Systems
Original
datasheet

2 pages,
131.33 Kb

TEXT
datasheet frame
Abstract: Configurable MII/RMII/GMII MAC Interface ♦ GFP/LAPS/HDLC/cHDLC Encapsulation ♦ IEEE 802.1Q VLAN and , GMII/MII mapped to a protected interface, with higher order EoS and EoPoS. • DS33M33 DS33M33: One GMII , /GMII) 10Mbps/100Mbps/1000Mbps data rates Support for DTE or DCE operation Half- and full-duplex flow , -3c/VC-4, EoS Over Up to Three Concatenated STS-1/VC-3s, and EoPoS Over Up to Three Concatenated DS , SDRAM Buffer ♦ SPI and Parallel Microprocessor Interfaces ♦ 1.8V, 2.5V, 3.3V Supplies Features ... Maxim Integrated Products
Original
datasheet

21 pages,
330.89 Kb

DS33M30/DS33M31/DS33M33 TEXT
datasheet frame
Abstract: interface. · Supports GMII and TBI (Ten-bit Interface) standards. · Receive channel output , Transceiver with Gigabit Ethernet PCS and Trunking for 1.0 TO 1.25 Gbit/s Interfaces Product Overview Preliminary Issue No. 1: July 2002 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers , this document is proprietary and confidential to PMC-Sierra, Inc., and for its customers' internal use , , referred to in this document. PMC-Sierra, Inc. expressly disclaims all representations and warranties of ... PMC-Sierra
Original
datasheet

24 pages,
254.77 Kb

serdes transceiver 1999 PM8352 MDIO controller TEXT
datasheet frame
Abstract: schemes employing diversity in time and frequency ·MAC methods: CSMA/CA, TDMA, and CSMA ·GMII, RGMII , diversity in time and frequency ·MAC methods: CSMA/CA, TDMA, and CSMA ·GMII, RGMII and MII host , Cable or Phoneline Power Hybrid and Line Driver or Coaxial Hybrid or Phone Hybrid SALES , (Optional) Flash Coaxial Cable or Phoneline Power Hybrid and Line Driver CG5111 CG5111 MAC/PHY , · Home AV networks · 3D, High definition (HD) and Standard definition (SD) in-home video ... Sigma Designs
Original
datasheet

4 pages,
794.4 Kb

CG5110SDK CG5111 CopperGate G995 homeplug av IPTV set top box zwave KDX381 voice encryption aes ic 8 qam CG5110HDK CG5110HEP IPTV STB CG5111A-IBE3 vdsl2 phy TR-069 CG5110HEPC SIGMA CG5110 CG5113 CG5110 TEXT
datasheet frame
Abstract: integrated NPU architecture provides programming efficiencies for advanced services in access and edge applications. OVERVIEW As more and more intelligent services are being deployed at the access and edge areas of the network, network equipment vendors are seeking more programmable, easy-to-develop, and , ) family is comprised of integrated, flexible, and functionally rich data-plane processors for developing and deploying advanced services for next-generation networks. The C-Port family consists of the C ... Motorola
Original
datasheet

6 pages,
154.71 Kb

MCC5E0RX266WB0B MCC3E0RX180WB0B Gigabit Ethernet PHY 133M rc-6 protocol C-5e STM-16 physical Architecture TEXT
datasheet frame
Abstract: DS33M31 DS33M31 and DS33M33 DS33M33 GMII Interface available on the DS33M30 DS33M30 (MII and RMII not available) Support for DTE , 802.3 Ethernet MAC ♦ MII/RMII/GMII MAC Interface (M31/M33 M31/M33) ♦ GMII MAC Interface (M30) ♦ GFP/LAPS/HDLC/cHDLC Encapsulation ♦ IEEE 802.1Q VLAN and Q-in-Q Support ♦ Add , and Parallel Microprocessor Interfaces ♦ Ethernet Service Delivery over SONET/SDH , in 1 VC-3/VC-4, EoS Over Up to 3 concatenated VC-3s, and EoPoS Over Up to 3 Concatenated DS-3s â ... Maxim Integrated Products
Original
datasheet

21 pages,
179.51 Kb

DS33M30/DS33M31/DS33M33 TEXT
datasheet frame
Abstract: Management and Layer2 Interworking Processor > K E Y F E AT U R E S > Optimized for access and , applications The M27481 M27481 is built on the third generation traffic stream processor architecture (TSP3) and is targeted for access and enterprise applications requiring programmable traffic management and Layer 2 , bridging, IP-to-ATM, cell and packet switching, and AAL2. Device highlights include integrated “universal-link” and Ethernet interfaces, internal SRAM for low latency context storage, hierarchical traffic ... Mindspeed Technologies
Original
datasheet

4 pages,
119.04 Kb

TEXT
datasheet frame

Archived Files

Abstract Saved from Date Saved File Size Type Download
Solutions Division, Xilinx, Inc. krista.marks@xilinx.com and Hamish Fallside, Sr. Manager, Advanced both voice and data over long distances. Standard protocols have targeted the underlying transport layer, including ATM for voice and data and HDLC or PPP for data transfer. However, each of these diversifying the types of client traffic transported across their networks and optimizing their bandwidth Channel) and emerging video on demand (utilizing DVB-ASI). In this case, Fibre Channel and DVB represent
/datasheets/files/xilinx/files/xcell journal articles/xcell_50/xc_gfp50.htm
Xilinx 19/07/2004 22.48 Kb HTM xc_gfp50.htm
SecureOn, ARP packets, pattern match packets, and Phy status change GMII/MII provides IEEE 802.3 National Semiconductor, The Sight And Sound Of Information, Welcomes high-performance adapter cards and mother boards. The DP83820 DP83820 fully implements the V2.2 66 MHz, 64-bit PCI bus interface for host communications with power management support. Packet descriptors and data are transferred /1000 Mb/s transmission and reception. Features IEEE 802.3 Compliant, 66/33 Mhz
/datasheets/files/national/dp83820.html
National 25/09/2003 10.53 Kb HTML dp83820.html
, and Phy status change GMII/MII provides IEEE 802.3 standard interface to support 10/100/1000 Mb/s Controller for the PCI bus. It is targeted at high-performance adapter cards and mother boards. The DP83820 DP83820 support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83820 DP83820 can support full duplex 10/100/1000 Mb/s transmission and reception. dwords (1024 bytes) BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design
/datasheets/files/national/htm/nsc02769-v5.htm
National 16/08/2002 15.13 Kb HTM nsc02769-v5.htm
National Semiconductor, The Sight And Sound Of Information, Welcomes transceiver with integrated PMD sublayers to support 10BASE-T 10BASE-T, 100BASE-TX 100BASE-TX and 1000BASE-T 1000BASE-T Ethernet protocols. The DP83865 DP83865 is an ultra low power version of the DP83861 DP83861 and DP83891 DP83891. It uses advanced 0.18 um, 1.8 V Independent Interface (GMII). The DP83865 DP83865 is a fourth generation Gigabit PHY with field proven architecture and performance. Its robust performance ensures drop-in replacement of existing 10/100 Mb/s equipment
/datasheets/files/national/dp83865.html
National 25/09/2003 10.74 Kb HTML dp83865.html
programmable GMII pin ordering. IEEE 802.3u Auto-Negotiation and Parallel Detection Fully Auto-Negotiates Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T 10BASE-T, 100BASE-TX 100BASE-TX and 1000BASE-T 1000BASE-T Ethernet protocols. The DP83865 DP83865 is an ultra low power version of the DP83861 DP83861 and DP83891 DP83891. It uses Gigabit Media Independent Interface (GMII). The DP83865 DP83865 is a fourth generation Gigabit PHY with field proven architecture and performance. Its robust performance ensures drop-in replacement of existing 10
/datasheets/files/national/dp83865.htm
National 27/02/2004 11.05 Kb HTM dp83865.htm
SecureOn, ARP packets, pattern match packets, and Phy status change GMII/MII provides IEEE 802.3 high-performance adapter cards and mother boards. The DP83821 DP83821 fully implements the V2.2 33 MHz, 32-bit PCI bus interface for host communications with power management support. Packet descriptors and data are transferred /1000 Mb/s transmission and reception. Features IEEE 802.3 Compliant, 33 Mhz , programmable Bus master - burst sizes of up to 256 dwords (1024 bytes) BIU compliant with PC 97 and PC 98
/datasheets/files/national/pf/dp83821.html
National 17/02/2005 6.15 Kb HTML dp83821.html
, and Phy status change GMII/MII provides IEEE 802.3 standard interface to support 10/100/1000 Mb/s Controller for the PCI bus. It is targeted at high-performance adapter cards and mother boards. The DP83820 DP83820 support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83820 DP83820 can support full duplex 10/100/1000 Mb/s transmission and reception. dwords (1024 bytes) BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design
/datasheets/files/national/htm/nsc01656-v2.htm
National 01/11/2002 16.82 Kb HTM nsc01656-v2.htm
Gigabit Media Independent Interface (GMII) and Physical Coding Sublayer (PCS) logic Support for Cascade >>   Semiconductor Home   >   News and Publications   > news releases    Semiconductor News and Publications     Related Documentation: >   Performance     and Cost Advantages to     Small Offices and Gigabit     Networks >   ThunderSWITCH publications >   Details on Signal Processing >   Integration Magazine >   Analog and
/datasheets/files/texas-instruments/data/wwwti~1.com/sc/docs/news/1998/98091c.htm
Texas Instruments 17/01/2000 10.07 Kb HTM 98091c.htm
Gigabit Media Independent Interface (GMII). Features 100BASE-TX 100BASE-TX and 1000BASE-T 1000BASE-T compliant Fully compliant to IEEE 802.3u 100BASE-TX 100BASE-TX and IEEE 802.3z/ab 1000BASE-T 1000BASE-T specifications. Fully integrated and fully compliant ANSI X3.T12 PMD physical sublayer that includes adaptive equalization and 802.3u MII û IEEE 802.3z GMII LED support: Link, Speed, Activity, Collision, TX and RX Supports support 10BASE-T 10BASE-T, 100BASE-TX 100BASE-TX and 1000BASE-T 1000BASE-T Ethernet protocols. The DP83861 DP83861 uses state of the art 0.18
/datasheets/files/national/htm/nsc01663-v5.htm
National 01/11/2002 14.3 Kb HTM nsc01663-v5.htm
(PHY). The IEEE P802.3z GMII interface provides independent 8-bit wide transmit and receive data paths for full-duplex operation. The TLK2500 TLK2500 extends the standard GMII transmit and receive data paths to 16 (SERDES), clock synthesis and clock recovery Parallel I/O: 16-bit-wide, 3.3-V tolerant, GMII (per Issue 4 >>   Semiconductor Home   >   News and Publications   >   Analog and Mixed-Signal Showcase   >   Issue 4   > Showcase (Issue
/datasheets/files/texas-instruments/data/wwwti~1.com/sc/docs/msp/showcase/issue4/page16.htm
Texas Instruments 28/01/2000 10.62 Kb HTM page16.htm