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Abstract: · The IC06 74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT08 74HC/HCT08 Quad 2-input AND gate Product , -input AND gate DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Family , datasheet with package and family information, also download the following PDF files. The "Logic Package , 2Input AND Gate Quad 2Input AND Gate Quad 2Input AND Gate 15 5 Volts 14 + 5 Volts 14 + 5 Volts 14 + 5 , specification Quad 2-input AND gate FEATURES · Output capability: standard · ICC category: SSI GENERAL ... Philips Semiconductors
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datasheet

9 pages,
106.39 Kb

HCT08 74HC08P 74hc family catalog CMOS TTL Logic Family Specifications 74HC/HCT/HCU/HCMOS TEXT
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Abstract: with package and family information, also download the following PDF files. The "Logic Package , · The IC06 74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4002 74HC/HCT4002 Dual 4-input NOR gate Product , delay nA, nB, nC, nD to nY input capacitance power dissipation capacitance per gate notes 1 and 2 , .5 Logic diagram 74HC4002 74HC4002 (one gate). Fig.6 Logic diagram 74HCT4002 74HCT4002 (one gate). December 1990 4 , HCT_PACKAGE_OUTLINES PDF File Description HC/T Family Specifications, The IC06 74HC/HCT/HCMOS 74HC/HCT/HCMOS Logic Family ... Philips Semiconductors
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datasheet

9 pages,
102.33 Kb

philips ic06 cmos 74HC/HCT/HCU/HCMOS TEXT
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Abstract: package and family information, also download the following PDF files. The "Logic Package Information , · The IC06 74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT20 74HC/HCT20 Dual 4-input NAND gate Product , Fig.4 Functional diagram. Fig.5 HC logic diagram (one gate). FUNCTION TABLE INPUTS nA L X X X H Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care Fig.6 HCT logic diagram (one gate). , Dual 4-Input 15 NAND Gate Dual 4-Input 15 NAND Gate 5 Volts 14 + 5 Volts 14 + 5 Volts 14 + 5 Volts 14 + ... Philips Semiconductors
Original
datasheet

9 pages,
104.36 Kb

Package Information philips IC06 IC06 74HC CMOS TTL Logic Family Specifications 74HCT20D 74hc20n 74hc family catalog smd marking 2D philips ic06 cmos selector guide 74HC 74HCT FAMILY 74HC/HCT/HCU/HCMOS TEXT
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Abstract: device datasheet with package and family information, also download the following PDF files. The "Logic , · The IC06 74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT27 74HC/HCT27 Triple 3-input NOR gate Product , input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 , level L = LOW voltage level X = don't care Fig.4 Functional diagram. Fig.5 Logic diagram (one gate). nB , ) propagation delays and the output transition times. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package ... Philips Semiconductors
Original
datasheet

9 pages,
105.36 Kb

smd marking 1C 6 PIN CMOS TTL Logic Family Specifications 74HCT27P 3Y SMD smd marking code 1b 74HC/HCT/HCU/HCMOS TEXT
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Abstract: is used to power internal logic and to operate a gate bias generator. 1 of 4 111999 DS1640 DS1640 , gate (see Figure 1). A set of four internal latches is controlled by the latch input. The logic levels passed to the FET gates are controlled by the gate inputs and latch pin status. When the latch pin is logic 0, the gate input levels are inverted and passed directly to the control gates, enabling the , -pin SOIC surface mount package Positive logic signal turns each FET on and ground or low level signal turns ... Dallas Semiconductor
Original
datasheet

6 pages,
129.89 Kb

DS1640/DS1640C TEXT
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Abstract: North America Fig.1 Functional diagram. Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS , package and family information, also download the following PDF files . Document Description 1 Download HEF_FAMILY_SPECIFICATIONS HEF Family Specifications, The IC04 LOCMOS HE4000B HE4000B Logic Family Specifications HEF, HEC PDF 2 , ) Gate 15 CMOS Low top Products, packages, availability and ordering North American type , , The IC04 LOCMOS HE4000B HE4000B Logic Family Specifications HEF, HEC(date Download 01-May-95) PDF File top ... Philips Semiconductors
Original
datasheet

6 pages,
78.2 Kb

gates catalog HE4000B HEF4001B HEF4001BT HEF4001BTD Philips date CODE MARKING HEF4001BP The IC04 LOCMOS HE4000B Logic of HEF4001BP TEXT
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Abstract: · The IC06 74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT03 74HC/HCT03 Quad 2-input NAND gate Product , and RL = ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS 74HC/HCT/HCU/HCMOS Logic Package Information". PARAMETER propagation delay input capacitance power dissipation capacitance per gate notes 1, 2 and 3 CONDITIONS HC CL = , .4 Functional diagram. Fig.5 Logic diagram (one gate). December 1990 3 Philips Semiconductors , following PDF files. The "Logic Package Information" document is required to determine in which package(s ... Philips Semiconductors
Original
datasheet

12 pages,
126.71 Kb

74HC03D 74HC/HCT/HCU/HCMOS TEXT
datasheet frame
Abstract: Min. VB + 0.3 VHO High side floating output voltage HO VCC Low side and logic fixed supply voltage -0.3 25 VLO Low side output voltage LO -0.3 VCC + 0.3 VIN Logic , voltage COM Logic ground and low side driver return HIN Logic input for high side gate driver , for both channels 3.3 V, 5 V, and 15 V input logic input compatible Cross-conduction prevention logic Matched propagation delay for both channels Lower di/dt gate driver for better noise immunity ... International Rectifier
Original
datasheet

20 pages,
454.59 Kb

PD60277 IRS2304 TEXT
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Abstract: voltage COM Logic ground and low-side driver return HIN Logic input for high-side gate driver , for both channels 3.3 V, 5 V, and 15 V input logic input compatible Cross-conduction prevention logic Matched propagation delay for both channels Lower di/dt gate driver for better noise immunity , . Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic , Notes and DesignTips for proper circuit board layout. www.irf.com PDF created with pdfFactory ... International Rectifier
Original
datasheet

20 pages,
491.38 Kb

PD60277 IRS2304 TEXT
datasheet frame
Abstract: Min. VB + 0.3 VHO High- side floating output voltage HO VCC Low- side and logic fixed supply voltage -0.3 25 VLO Low- side output voltage LO -0.3 VCC + 0.3 VIN Logic , Logic ground and low-side driver return HIN Logic input for high-side gate driver output LIN Logic input for low-side gate driver output VB High-side floating supply HO High-side driver , 3.3 V, 5 V, and 15 V input logic input compatible Cross-conduction prevention logic Matched ... International Rectifier
Original
datasheet

20 pages,
497.27 Kb

IRS2304 MS-012AA IRFBC20 IRS2304STRPBF IRFBC30 IRFBC40 IRFPE50 PD60277 IRS2304PbF mosfet te 2304 IR2304 TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
Total gain min/max dB -17/40 NOISE FIGURE MAX dB 10 Local oscillator buffer and prescaler Supply current Considerations None Logic Switching Levels TTL Package Material Plastic Bit Width Other 14 1 0 /catalog/parametrics/24.html Parametrics 74HCT4059N 74HCT4059N Speed Low Series HC/T Logic Switching Levels CMOS Desired Maximum I D max 100 Cel and 25Cel A 68 R DS on m Ohm 0.014 Technology N-channel V DS max. 16 1 0 /catalog and development tool support 4 kBytes on-chip 21 1 0 /catalog/parametrics/31.html Parametrics PCF8548U PCF8548U
/datasheets/files/philips/search/docindex-v2.txt
Philips 14/02/2002 998.47 Kb TXT docindex-v2.txt
/27063.html Applicationnotes for Logic Title Date AN202 AN202 1: Testing and specifying FAST logic 1987-06-01 AN2021 AN2021 /27227.html Applicationnotes for Full adders Title Date AN202 AN202 1: Testing and specifying FAST logic 1987-06-01 And Capacitance Without An A/D 1993-12-01 AN202 AN202 1: Testing and specifying FAST logic 1987-06-01 AN2021 AN2021 AN202 AN202 1: Testing and specifying FAST logic 1987-06-01 AN2021 AN2021 1: Thermal considerations for FAST logic Encoders Title Date AN202 AN202 1: Testing and specifying FAST logic 1987-06-01 AN2021 AN2021 1: Thermal considerations
/datasheets/files/philips/search/docindex.txt
Philips 25/04/2003 954.24 Kb TXT docindex.txt
+ B + C +D and . The 74ACT11802 74ACT11802 is characterized for operation from -40°C to85°C.     Data Sheet Abstract: 74ACT11802 74ACT11802:TRIPLE 4-INPUT OR/NOR GATE 74ACT11802 74ACT11802 TRIPLE 4-INPUT OR/NOR GATE SCAS153A SCAS153A - D3594 D3594, JULY 1990 - REVISED APRIL 1993 features Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise EPIC TM Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs EPIC is
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scas153a.htm
Texas Instruments 01/06/1998 5.27 Kb HTM scas153a.htm
Data Sheet Abstract: SN74LVC10A SN74LVC10A:TRIPLE 3-INPUT POSITIVE-NAND GATE SN74LVC10A SN74LVC10A TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284E SCAS284E - JANUARY 1993 - REVISED JANUARY 1998 ), and Thin Shrink Small-Outline (PW) Packages EPIC is a trademark of Texas Instruments Incorporated. description This triple 3-input positive-NAND gate is designed for 2.7-V to 3.6-V V CC operation. The SN74LVC10A SN74LVC10A performs the Boolean function Y = A \•\ B \•\ C\ or Y = A\ + B\ + C\ in positive
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scas284e.htm
Texas Instruments 01/06/1998 5.49 Kb HTM scas284e.htm
Exclusive-NOR gates. Theyperform the Boolean functions Y = A\no map\B\ = (A + B\) • (A\ + B)in positive logic Data Sheet Abstract: 74ACT11810 74ACT11810:QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATE 74ACT11810 74ACT11810 QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATE SCAS211 SCAS211 - MARCH 1990 - REVISED APRIL 1993   features Center-Pin V CC and GND Configurations to Minimize High-Speed Switching Noise EPIC TM Options Include Plastic Small- Outline Packages and Standard Plastic 300-mil DIPs EPIC is a
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scas211.htm
Texas Instruments 01/06/1998 5.38 Kb HTM scas211.htm
Data Sheet Abstract: SN74LVC10 SN74LVC10:TRIPLE 3-INPUT POSITIVE-NAND GATE SN74LVC10 SN74LVC10 TRIPLE 3-INPUT POSITIVE-NAND GATE SCAS284B SCAS284B - JANUARY 1993 - REVISED JULY 1995 Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages EPIC is a trademark of Texas Instruments Incorporated. description This triple 3-input positive-NAND gate is designed for 2.7-V to 3.6-V V CC operation. The SN74LVC10 SN74LVC10 performs the Boolean functions Y = A \•\ B \•\ C\ or Y = A\ + B\ + C\ in positive
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scas284b.htm
Texas Instruments 01/06/1998 5.49 Kb HTM scas284b.htm
B or Y = A\B + AB\ in positive logic. The SN74AHCT1G86 SN74AHCT1G86 is characterized for operation from -40°C Data Sheet Abstract: SN74AHCT1G86 SN74AHCT1G86:SINGLE 2-INPUT EXCLUSIVE-OR GATE SN74AHCT1G86 SN74AHCT1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE SCLS324D SCLS324D - MARCH 1996 - REVISED JUNE 1997 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scls324d.htm
Texas Instruments 01/06/1998 5.21 Kb HTM scls324d.htm
Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs   EPIC is a trademark of Texas Instruments description These devices contain a single 8-input NAND gate and perform thefollowing Boolean functions in positive logic: or Y = A\ + B\ + C\ + D\ + E\ + F\ + G\ + H\ The 54AC11030 54AC11030 is characterized for operation over the fullmilitary temperature range of Flow-Through Architecture Optimizes PCB Layout Center-Pin V CC and GND Configurations Minimize
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scas001a.htm
Texas Instruments 01/06/1998 5.33 Kb HTM scas001a.htm
, and Standard Plastic and Ceramic 300-mil DIPs   EPIC is a trademark of Texas Instruments description These devices contain a single 8-input NAND gate and perform thefollowing Boolean functions in positive logic: or + D\ + E\ + F\ + G\ + H\ The 54ACT11030 54ACT11030 is PCB Layout Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise , 74ACT11030DR 74ACT11030DR, 74ACT11030N 74ACT11030N View the complete PDF datasheet: scls050.pdf (59 K Bytes) (Requires Acrobat
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/scls050.htm
Texas Instruments 01/06/1998 5.77 Kb HTM scls050.htm
Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs   description These devices contain an 8-input positive-NAND gate and performthe following Boolean functions in positive logic: Y = A\ + B\ + C\ + D\ + E\ + F\ + G\ + H\ The SN54ALS30A SN54ALS30A and SN54AS30 SN54AS30 are characterized for operation overthe full military temperature range of -55°C to 125°C. TheSN74ALS30A and SN74AS30 SN74AS30 are , SN74ALS30ADR SN74ALS30ADR, SN74ALS30AN SN74ALS30AN, SN74ALS30AN3 SN74ALS30AN3, SN74AS30D SN74AS30D, SN74AS30DR SN74AS30DR, SN74AS30N SN74AS30N View the complete PDF datasheet
/datasheets/files/texas-instruments/sc/psheets/abstract/datasht/sdas010b.htm
Texas Instruments 01/06/1998 5.58 Kb HTM sdas010b.htm