NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: connects +IN to GND. Agere Systems Inc. 3 LSP2916 LSP2916 16-Channel, High-Voltage Amplifier Evaluation , Agere Systems Inc. Application Note July 2001 LSP2916 LSP2916 16-Channel, High-Voltage Amplifier , Application Note July 2001 LSP2916 LSP2916 16-Channel, High-Voltage Amplifier Evaluation Board , replacement. Note: Please read the LSP2916 LSP2916 (DS01-023ANET DS01-023ANET) data sheet before using the evaluation board. , configuration. The inverting input for each channel is labeled as INx (x = 1, 2, . . . , 16, corresponding to ... | Original |
6 pages, |
LSP2916B LSP2916A LSP2916 agere read channel LSP2916 abstract |
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| Abstract: gain setting by inserting feedback and input resistors. Note: Please read the LSP2908 LSP2908 data sheet , grounded. The inverting input for each channel is labeled as INx (x = 1, 2, . . . , 8, corresponding to each channel), where the input signal can be applied. Corresponding to each channel are the outputs, OUTPUTx (x = 1, 2, . . . , 8) as labeled. For each channel, there is an input resistor Rx (x = 1, 2, . . , IN5 R7A R2B OUTPUT1 IN6 R8B 11 12 GND AGERE SYSTEMS 2543(F) Figure 1. ... | Original |
4 pages, |
RF8B RF6A RF3A LSP2908 K24A RF4A RF5A rf7a LSP2908 abstract |
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| Abstract: will count 8 bits per time slot and insert or read the data for each channel as programmed. Lower , s Six bidirectional control leads per channel, for SLIC and line card function control s , to the classic A-to-D and D-to-A conversion, each channel provides termination impedance synthesis , Mbits/s. The choice of a PCM bus is also programmable, with any channel capable of being assigned to , T8538B T8538B 64-pin TQFP features five data latches per channel and the 100-pin TQFP features six data ... | Original |
4 pages, |
T8538B T8536B L9215G L7591 T8538B abstract |
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| Abstract: scan mode s Six bidirectional control leads per channel, for SLIC and line card function control , processing functions on one chip. In addition to the classic A-to-D and D-to-A conversion, each channel , any channel capable of being assigned to any time slot. The PCM bus can be operated at speeds up to , available in four packages: The T8536B T8536B 64-pin TQFP features five data latches per channel and the 100-pin TQFP features six-data latches per channel. Both devices have two PCM ports and are pin-compatible ... | Original |
4 pages, |
T8538B T8536B T8535B T8534 T8533 L9215G L7591 T8535B/T8536B T8535B/T8536B abstract |
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| Abstract: overhead bytes via a serial transport overhead access channel. Configurable as dedicated DCC channels. , /Multiplexing Modes (x28/x21) s Maps DS3 clear channel or framed signal into STS-1 or TUG-3. s Maps , additional dedicated protection channel for DS1/E1. System Test and Maintenance s A variety of , generator and monitor configurable for simultaneously testing E1, DS1, and DS3 (one channel each). s , interface with 16 MHz to 66 MHz read and write access. s Configurable VT/TU slot selection for DS1 ... | Original |
6 pages, |
TMXB28155 data sheet ic 7495 digital cross connect GR-253-CORE JT-G707 7495 ic data sheet stm 16 mapper T7296 T7698 pin diagram of ic 7495 TMXB28155 abstract |
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| Abstract: STS-3/STM-1, and one data channel in STS-12/STM-4 STS-12/STM-4. s Compliant with 1998: ATM Forum, ITU , Microprocessor Interface s 16-bit address and 16-bit data interface with up to 66 MHz read and write access. , applications. Constructed using Agere Systems' state-of-the-art CMOS technology, this device incorporates , Block Diagram For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@agere.com N. AMERICA: Agere Systems Inc., 555 Union ... | Original |
2 pages, |
TDAT04622 GR-253 6522 VIA TDAT04622 abstract |
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| Abstract: access channel. Configurable as dedicated DCC channels. s Software controlled linear 1 + 1 , DS3 clear channel or framed signal into STS-1 or TUG-3. s s s s Product Brief October , routed to/from a test-pattern generator or monitor. s Any DS1 or E1 channel may be routed through , s s One additional dedicated protection channel for DS2/DS1/E1. M13 Features T1/E1/J1 , only). Agere Systems Inc. Product Brief October 2000 TMXF28155 TMXF28155 155/51 Mbits/s SONET/SDH x28 ... | Original |
6 pages, |
TS16 TMXF28155 GR-253-CORE Agere Ambassador TMXF28155 abstract |
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| Abstract: processing is enabled for that channel · RX register address 0x3004 TX register address 0xA004 Agere , discussed illustrated. Agere Proprietary 2 Tandem Connection Maintenance ERROR(S) Source , B Sink TCM source Source TCM section VC-n connection Agere Proprietary 3 , terminator TCM generator Receive Data Path TCM Configuration Options Agere Proprietary 4 , supported in both data path directions Agere Proprietary 5 TSOT1610G TSOT1610G features supported on an ... | Original |
35 pages, |
MARS10G A004 A003 TSOT1610G AU-AIS TSOT1610G abstract |
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| Abstract: Microprocessor with CS, AS, and DS Aligned 2 Agere Systems Inc. Interfacing the TTSI4K32T TTSI4K32T, TTSI2K32T TTSI2K32T , to be a minimum of 4 ns (timing parameter t3 in Figure 16, Asynchronous Read Cycle Timing Using DT , (TTSI2K32T TTSI2K32T 2048-Channel, 32-Highway Time-Slot Interchanger (DS99-045T1E1 DS99-045T1E1), TTSI1K16T TTSI1K16T 1024-Channel, 16-Highway Time-Slot Interchanger (DS99-177PDH DS99-177PDH), and TTSI4K32T TTSI4K32T 4096-Channel, 32-Highway Time-Slot , TSI Access by a Microprocessor with a Delayed CS Agere Systems Inc. 3 Interfacing the ... | Original |
4 pages, |
TTSI4K32T TTSI2K32T TTSI1K16T MPC860 motorola 6522 MC68360 MC68302 TTSI4K32T abstract |
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| Abstract: receive directions. Low power: 375 mW per channel maximum. s HDLC or transparent modes. Single , Customer Premises Equipment-CSU/DSU, routers, digital PBX, channel banks (CB), base transceiver stations , interface. Memory-mapped read and write registers. Maskable interrupt events. Hardware and software , ), GR-820CORE GR-820CORE(11/94), GR-1244-CORE GR-1244-CORE(6/95). Agere Systems Inc. Product Brief May 1998 Feature , 2-state, 4-state, 9-state, and 16-state per-channel robbed bit. - DS1: channel-24 message-oriented ... | Original |
4 pages, |
t7633 SLC96 GR-820-CORE T7633 T7633 abstract |
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