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a14 Transistor Pair

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Abstract: path is the Darlington pair consisting of transistors Q1 and Q2. The effect of transistor Q1 is to , transistor Q3 and transistor Q4. With M1 connecting to the input of the Darlington pair, Transistor Q4 then , A13 GND 21 28 GND B14 22 27 A14 B15 23 26 A15 NC 24 25 , 27 A14 Data Input 4 GND Signal Ground 28 GND Signal Ground 5 B2 Data , A7 B7 A8 B8 A9 B9 A10 B10 A11 B11 A12 B12 A13 B13 A14 ... Original
datasheet

13 pages,
165.88 Kb

50MHZ ML65F16444CT ML65F16444CR DARLINGTON ARRAYS 3.3v darlington pair transistor 1A a14 Transistor Pair transistors ai 757 transistor ai 757 darlington pair transistor ML65F16444 ML65F16444 abstract
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Abstract: High Current Transistor See page 338. 1 Amp Low VCE(SAT) PNP High Current Transistor See page 340. , High Voltage Transistor in an SOT-23 PNP Extremely High Voltage Transistor in an SOT-23 NPN Extremely High Voltage Transistor in an SOT-223 PNP Extremely High Voltage Transistor in an SOT-223 See page , Transistor neral Purpose Transistor neral Purpose Transistor neral Purpose Transistor |h Gain/Low Noise Transistor h Gain/Low Noise Transistor Transistor See See See See See See See page page page page page ... OCR Scan
datasheet

10 pages,
369.11 Kb

sot523 3904 to 63 case 5 amp npn transistor transistor TEI 516 transistor A92 SOT-89 transistor 5 Amp 700 volt transistor 2222a sot 2222a NPN sot26 sot363 transistor transistor 3904 npn 2907a TRANSISTOR PNP CMPSH-3SE transistor A92 SOT 89 datasheet abstract
datasheet frame
Abstract: 9 Transistor I/O Link Modules Reduce Wiring Back to PLC Rack for 32 I/O Points 1 Transmit 16 , connections follows in Operation section. 2. A shielded transmission cable or plain twisted pair cable with a thickness of 0.75 mm2 minimum must be used for signal transmission. If twisted pair cable is used, however , be used. In this case, however, when the output transistor of the sensor is ON, the B7A will be OFF. , connected to the Input or Output Link Terminal via a twisted pair cable with a thickness of 0.75 mm2 minimum ... Original
datasheet

19 pages,
670.25 Kb

b7a- B7A-R6G31 B7A-T6A1 B7AT6B1 OMRON CQM1 WIRING K 192 A transistor a14 Transistor Pair C200H-B7A21 B7AS-T6B1 B7AS-R6B36 B7A-R6B11 B7A-R6F11 B7A-R6F36 B7A-R6F31 datasheet abstract
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Abstract: assertion path is the Darlington pair consisting of transistors Q1 and 0 2 . The effect of transistor 01 is , Darlington pair consisting of transistor 0 3 and transistor 0 4 . With M1 connecting to the input of the Darlington pair, Transistor 0 4 then sinks a large amount of current during the input transition from , 43 44 45 46 47 48 NC A15 A14 GND A13 A12 No Connect Data Input Data Input Signal Ground Data , A13 A14 A15 Figure 5. Logic Symbol 6 M icro Linear ML65F16444 ML65F16444 ARCHITECTURAL ... OCR Scan
datasheet

12 pages,
471.98 Kb

darlington pair transistor transistor ai 757 ML65F16444 ML65F16444 abstract
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Abstract: f422 , i INPUTS (LOADING IN TRANSISTOR PAIR) : S3(2) , S2(2), Sl(2), SO(2), A15(2.5) , A14(2.5), ¿13(2.5 ... OCR Scan
datasheet

2 pages,
42.64 Kb

alu 74181 ABB b9 8 BIT ALU by 74181 CFT1811A CFT1811A abstract
datasheet frame
Abstract: 3.6ns. The negation path is also the Darlington pair consisting of transistor Q3 and transistor Q4. With M1 connecting to the input of the Darlington pair, Transistor Q4 then sinks a large amount of , 14 28 GND B14 8 22 13 27 A14 B15 9 23 12 26 A15 NC 10 24 11 , A15 Data Input 3 B1 Data Output 27 A14 Data Input 4 GND Signal Ground , A14 B14 A15 B15 Figure 9. Logic Diagram A0 A1 A2 A3 A4 A5 A6 A7 ... Original
datasheet

13 pages,
186.13 Kb

ML6516444CT ML6516444CR ML6516444 ML6516444 abstract
datasheet frame
Abstract: -7 6 -7 s Operating conditions (MPP mode, Ta=25 °C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Output transistor ground voltage Substrate voltage Vertical , 0.1 0 0 1 2 3 4 5 6 7 8 9 10 SPACIAL FREQUENCY (Line pair/mm , ISV A14 IGV A15 P1BV A16 S7199-01 S7199-01 B12 RD B11 SSA B10 OS B9 OD B8 A8 P2AH A9 P1AH , 0.4 FOP 3.0 75.0 ± 0.4 30.48 ± 0.5 30.48 ± 0.5 1.6 B20 B14 A20 A14 25.4 ... Original
datasheet

7 pages,
138.66 Kb

VERTICAL ccd KE ccd tdi binning kvp 39 S1531 S1533 S1534 S7199 scintillator 1BW TRANSISTOR dental x-ray sensor S7199-01 S7199-01 abstract
datasheet frame
Abstract: -7 6 -7 6 -7 s Operating conditions (MPP mode, Ta=25 °C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Output transistor ground voltage Substrate voltage , (Line pair/mm) 0 0 1 2 3 4 X-RAY EXPOSURE (mR) KMPDB0248EA KMPDB0248EA KMPDB0249EA KMPDB0249EA 3 , , B16 S1 S2 S3 S4 S5 S6 ISV A14, B14 IGV A15, B15 C8 A8, B8 P2AH A9, B9 P1AH A10 , 0.2 223.0 ± 0.5 15.24 60.96 A20 A14 B20 60.96 *2 25.4 28.0 ± 0.3 C20 C14 ... Original
datasheet

7 pages,
146.49 Kb

sensor x-ray ccd KE image sensor x-ray S1531 S1533 S1534 S8658 S8658-01 1BW TRANSISTOR kvp c6 dental x-ray sensor S8658-01 abstract
datasheet frame
Abstract: transistor drain voltage Reset drain voltage Output gate voltage Output transistor ground voltage Substrate , 3 4 SPACIAL FREQUENCY (Line pair/mm) KMPDB0248EA KMPDB0248EA X-RAY EXPOSURE (mR) KMPDB0249EA KMPDB0249EA 3 CCD area image sensor s Device structure LEFT CHIP (CHIP A), CENTER CHIP (CHIP B) ISV A14, B14 IGV , S8658-01 S8658-01 5.6 FOP 3.0 60.96 1.6 C20 C14 *2 25.4 60.96 A20 A14 *1 LEFT CHIP A1 A13 45.72 B20 , A3, B3 A4, B4 A5, B5 A6, B6 A7, B7 A8, B8 A9, B9 A10, B10 A11, B11 A12, B12 A13, B13 A14, B14 A15 ... Original
datasheet

7 pages,
146.35 Kb

sensor x-ray S8658-01 S8658-01 abstract
datasheet frame
Abstract: Operating conditions (MPP mode, Ta=25 °C) Parameter Output transistor drain voltage Reset drain voltage Output gate voltage Output transistor ground voltage Substrate voltage Vertical input source Test point , CTF 500 0 0 1 2 3 4 SPACIAL FREQUENCY (Line pair/mm) KMPDB0248EA KMPDB0248EA X-RAY EXPOSURE (mR) KMPDB0249EA KMPDB0249EA 3 CCD area image sensor Device structure ISV A14 IGV A15 1 2 3 4 , 28.0 ± 0.3 A20 A14 FOP 7.2 B20 B14 A1 A13 B1 B13 3.4 22.86 ± 0.5 22.86 ... Original
datasheet

7 pages,
130.96 Kb

S7199-01 S7199-01 abstract
datasheet frame

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P6.3 P6.2 P6.1 P6.0 P1.7/A15 7/A15 7/A15 7/A15 P1.6/A14 P1.5/A13 5/A13 5/A13 5/A13 P1.4/A12 4/A12 4/A12 4/A12 P1.3/A11 3/A11 3/A11 3/A11 P1.2/A10 2/A10 2/A10 2/A10 P1.1/A9 AD6/P0.6 P6.2 P6.1 P6.0 P1.7/A15 7/A15 7/A15 7/A15 P1.6/A14 P1.5/A13 5/A13 5/A13 5/A13 P1.4/A12 4/A12 4/A12 4/A12 P1.3/A11 3/A11 3/A11 3/A11 P1.2/A10 2/A10 2/A10 2/A10 P1.1/A9 P1.0/A8 RESET open-drain option corresponds only to a disabling of P-channel MOS transistor of the buffer itself 66 68 A14 I/O Address bit 14 P1.7 67 69 A15 I/O Address bit 15 P2.0 16 18 I/O P2.1 17 19 I/O P2.2
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5464-v2.htm
STMicroelectronics 04/07/2000 186.69 Kb HTM 5464-v2.htm
P1.5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 P1.6/A14/WKUP14 P1.7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 N.C. N.C. V SS V DD P4.0/BREQ P4.1/WAIT P4.2 V DD V SS WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1.7 WKUP14/A14/P1.6 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1.5 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1.4 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1.3 of P-channel MOS transistor of the buffer itself: it is still present and physically con- (*) P1.6 17 61 A14 I/O Ext. Mem. Address bit 14 WKUP14 WKUP14 WKUP14 WKUP14 I Wakeup Line 14 (*) P1.7 16 60 A15 I/O Ext.
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5521-v6.htm
STMicroelectronics 10/02/2000 489.4 Kb HTM 5521-v6.htm
USBSOF/AIN2/P6.4 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6.3 P1.3/A11/WKUP14 3/A11/WKUP14 3/A11/WKUP14 3/A11/WKUP14 P1.4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 P1.5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 P1.6/A14 /P1.7 WKUP14/A14/P1.6 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1.5 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1.4 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1.3 WKUP14/A10/P1 WKUP14/A10/P1 WKUP14/A10/P1 WKUP14/A10/P1.2 WKUP14/A9 WKUP14/A9 WKUP14/A9 WKUP14/A9 MOS transistor of the buffer itself: it is still present and physically con- nected to the pin. A14 I/O Ext. Mem. Address bit 14 WKUP14 WKUP14 WKUP14 WKUP14 I Wakeup Line 14 (*) P1.7 16 60 A15 I/O Ext. Mem. Address
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STMicroelectronics 20/10/2000 490.91 Kb HTM 5521-v3.htm
P1.5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 P1.6/A14/WKUP14 P1.7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 N.C. N.C. V SS V DD P4.0/BREQ P4.1/WAIT P4.2 V DD V SS WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1.7 WKUP14/A14/P1.6 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1.5 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1.4 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1.3 of P-channel MOS transistor of the buffer itself: it is still present and physically con- (*) P1.6 17 61 A14 I/O Ext. Mem. Address bit 14 WKUP14 WKUP14 WKUP14 WKUP14 I Wakeup Line 14 (*) P1.7 16 60 A15 I/O Ext.
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5521-v5.htm
STMicroelectronics 10/02/2000 489.4 Kb HTM 5521-v5.htm
USBSOF/AIN2/P6.4 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6 XTOUT/WKUP13/AIN1/P6.3 P1.3/A11/WKUP14 3/A11/WKUP14 3/A11/WKUP14 3/A11/WKUP14 P1.4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 P1.5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 P1.6/A14 /P1.7 WKUP14/A14/P1.6 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1.5 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1 WKUP14/A12/P1.4 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1 WKUP14/A11/P1.3 WKUP14/A10/P1 WKUP14/A10/P1 WKUP14/A10/P1 WKUP14/A10/P1.2 WKUP14/A9 WKUP14/A9 WKUP14/A9 WKUP14/A9 MOS transistor of the buffer itself: it is still present and physically con- nected to the pin. A14 I/O Ext. Mem. Address bit 14 WKUP14 WKUP14 WKUP14 WKUP14 I Wakeup Line 14 (*) P1.7 16 60 A15 I/O Ext. Mem. Address
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STMicroelectronics 09/02/2001 490.79 Kb HTM 5521-v1.htm
/WKUP14 /WKUP14 /WKUP14 /WKUP14 P1.4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 4/A12/WKUP14 P1.5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 5/A13/WKUP14 P1.6/A14/WKUP14 P1.7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 7/A15/WKUP14 N.C. N.C. V SS V P4.2 WAIT/P4.1 BREQ/P4.0 V DD V SS WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1 WKUP14/A15/P1.7 WKUP14/A14/P1.6 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1 WKUP14/A13/P1.5 P-channel MOS transistor of the buffer itself: it is still present and physically con- nected to the Ext. Mem. Address bit 13 WKUP14 WKUP14 WKUP14 WKUP14 I Wakeup Line 14 (*) P1.6 17 61 A14 I/O Ext. Mem. Address bit
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STMicroelectronics 17/10/2000 474.79 Kb HTM 5521-v4.htm
Internal decoupling capacitance is located be- tween V DD and V SS . Note: Each pair of kept at logic zero, the N-channel transistor is off, while the P-channel is on and can conduct. , the configuration after RE- SET enables an internal weak pull-up transistor in order to avoid conditions. In fact, the P-channel transistor of the output buffer implements a direct diode to V DD disabled: it is important to highlight that physically the P-channel transistor is still present
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6993-v2.htm
STMicroelectronics 26/01/2001 725.04 Kb HTM 6993-v2.htm
be- tween V DD and V SS . Note: Each pair of digital V DD /V SS pins should be externally Basic Inverter When an input is kept at logic zero, the N-channel transistor is off, while the most pins, the configuration after RE- SET enables an internal weak pull-up transistor in order to illegal conditions. In fact, the P-channel transistor of the output buffer implements a direct diode to disabled: it is important to highlight that physically the P-channel transistor is still present, so
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6993.htm
STMicroelectronics 09/02/2001 749.42 Kb HTM 6993.htm
Programming Manual STPC INDUSTRIAL DATABOOK / PC COMPATIBLE EMBEDED MICROPROCESSOR STPCI01 STPCI01 STPCI01 STPCI01 Document Format Size Document Number Date Update Pages Portable Document Format 6754 27/07/2000 531 Raw Text Format 1/ 531 STPC Industrial Programming Manual Issue 2.4 July 26, 2000 STMicroelectronics 2/ 531 Issue 2.4 - July 26, 2000 Infor
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STMicroelectronics 30/08/2000 671.56 Kb HTM 6754-v1.htm
Programming Manual STPC INDUSTRIAL DATABOOK / PC COMPATIBLE EMBEDED MICROPROCESSOR STPCI01 STPCI01 STPCI01 STPCI01 Document Format Size Document Number Date Update Pages Portable Document Format 6754 27/07/2000 531 Raw Text Format 1/ 531 STPC Industrial Programming Manual Issue 2.4 July 26, 2000 STMicroelectronics 2/ 531 Issue 2.4 - July 26, 2000 Information provided is believed to be accurate and re
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STMicroelectronics 20/10/2000 687.01 Kb HTM 6754.htm