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Part Manufacturer Description Datasheet BUY
CS82C37A Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, PQCC44 visit Intersil
5962-9054302MQA Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, CDIP40, CERDIP-40 visit Intersil
CP82C37A-5 Intersil Corporation 4 CHANNEL(S), 5MHz, DMA CONTROLLER, PDIP40, PLASTIC, DIP-40 visit Intersil
CS82C37A-1296 Intersil Corporation 4 CHANNEL(S), 12.5MHz, DMA CONTROLLER, PQCC44, PLASTIC, MO-047AC, LCC-44 visit Intersil
MD82C37A/B Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, CDIP40, CERAMIC, DIP-40 visit Intersil
CS82C37AZ Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, PQCC44, ROHS COMPLIANT, MO-047AC, PLASTIC, LCC-44 visit Intersil

Z80 PIO CTC SIO DMA

Catalog Datasheet MFG & Type PDF Document Tags

Z80 FIO

Abstract: z80 cio Z80 DMA Direct Memoiy Access Technical Manual Z80 PIO Parallel Input/Output Technical Manual Z80 CTC , /CGC Product Specification Z84C10 NMOS/CMOS Z80 DMA Product Specification Z84C20 NMOS/CMOS Z80 PIO Product Specification Z84C30 NMOS/CMOS Z80 CTC Product Specification Z8440/1/2/4 NMOS Z80 SIO Product , Using the Z80 SIO Serial Communication with the Z80A DART Timing in Interrupt-Based System with Z80 CTC , Specification Z84C30 CMOS Z80 CTC Counter/Timer Circuit Military Product Specification Z84C4Q/1/2/4 CMOS Z80 SIO
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Z8671 DC-2342-03 DC-2481-01 Z80 FIO z80 cio Z80 RAM 251801 Z80 application note Z280 Z8600 Z8601/03/11/13 Z8681/82 Z8691 Z86C08

UM0081

Abstract: Z80 Peripherals Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128 Z80 DMA and CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128 Z80 DMA and Z80 SIO Example . . . . . . . . . . . . . . . . . . . . . . . .138 Using The Z80 DMA With Other Processors . . . , simplified by connecting the CTC directly to both the Z80 CPU and the Z80 SIO with no additional logic. In , -0601 Disclaimer Z80 CPU Peripherals User Manual iii Table of Contents Counter/Timer Channels CTC
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UM0081 Z80 Peripherals Z80 CPU Z80 INTERFACING TECHNIQUES Z80-DMA Z80SIO UM008101-0601

Z80 CPU

Abstract: z80 qfp 80 pin SuperintegrationTM Pr oducts Guide CGC OSC S10 1 MByte MMU Z80 CPU Z84C90 Device CTC PIA , Serial I/O Timers 2 Ch DMA Enhanced Z80+ Clock CPU Two16-Bit Serial I/O Timers WDT CTS , ) Parallel Input/Output (PIO) Counter/Timer Circuit (CTC) 8 I/O Lines Features Package Support Products Call Zilog for Additional ThirdParty Support Z80 CPU Serial Input/Output (SIO) Parallel Input/Output (PIO) Counter/Timer Circuit (CTC) Watch-Dog Timer (WDT) Clock Generator Circuit (CGC) 4
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Z80180 Z8L180 Z84015 Z84C15 Z8S180 Z84C9000ZCO z80 qfp 80 pin Z80 PIO CTC SIO DMA Z80-CPU z80 qfp Z80/Z180 Z84015/Z84C15 Z8S180/Z8L180

Z80 dart

Abstract: Z8400AB1 * E * * DEVICE TYPE CPU DMA PIO CTC SIO DART SGS-THOMSON ZILOG Z8400 , Z80 CPU Control Process Unit 119 Z8410 Z80 DMA Direct Memory Access Central. 153 Z8420 Z80 PIO Parallel Input/Output Controller 175 Z8430 Z80 CTC Counter Timer Circuit . 191 , Z80C CPU CMOS Version 13 Z84C10 Z80C DMA CMOS Version . 45 Z84C20 Z80C PIO CMOS Version . 65 Z84C30 Z80C CTC CMOS Version. 79 Z84C40 Z80C SIO CMOS Version 93
STMicroelectronics
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Z84COO Z80 dart Z8400AB1 HALL EFFECT 21l Z8400 4mhz Z80A dart Z8470AB1 Z84C41 Z84C42

Z80A dart

Abstract: Z8400 4mhz . Z80 CTC Counter Timer C irc u it. Z80 SIO , na E * * S na na na M na na DEVICE TYPE CPU SGS-THOMSON Z8400 DMA Z8410 PIO Z8420 CTC , . Z80C DMA CMOS Version . Z80C PIO , SIO CMOS V e rs io n . Z80 CPU Control Process U n it. Z80 DMA Direct Memory
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Z8470 Z84C00HB6 Z8430BD2 DSAFRZWS00 z84c00ab6 Z8420AD1 RTL 2830 Z84C00 Z8440 Z8441 Z8442

ansley 171-26 ribbon

Abstract: USART 8251 interfacing with RS-232 S INT_/I fj i_!s r ~~v. i_r D0-D,' 1_f 16 Zilog ® Z-80 SIO Z-80A SIO components PIO Programming , IORQ tDL 'RY) 19 ® Z-80 SIO Z-80A SIO components Zilo9 Z-80A PIO A.C. Characteristics TA = 0° C to , .3 Z-80/Z-80A PIO .13 Z-80/Z-80A Z-80/Z-80A DMA
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ansley 171-26 ribbon USART 8251 interfacing with RS-232 Z80A PIO zilog z80 ctc technical manual Z80A z80a-PIO Z-80PPB/16

Z80SIO

Abstract: z80 microprocessor applications includes SIO, CTC, CGC, WDT, and PIO functions, plus 4 KB of ROM with ROM protect, and 1 KB of RAM with , Enhanced Intelligent Peripheral Controller Functional Description Functionally, the on-chip SIO, PIO, CTC and the Z80 CPU are compatible with discrete Z80 devices and the Z84C15. The following , -Bit CRC on SIO channels · ZiLOG Debug Interface (ZDI) · DC to 33-MHz operating frequency @ ,
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Z80-CTC z80 microprocessor applications Z80 instruction set Z80 RAM 2 kb z80-sio Zilog Z80 instruction set Z80S188 33-MH 20-MH 160-P Z80-PIO

Zilog Z80 KIO

Abstract: . Any one of the three devices (PIO, CTC and SIO) can be the highest priority while another can be , . P o rtC Signals DO P in # Daisy Chain Configuration 000 None 001 SIO, CTC, PIO 010 SIO, PIO, CTC 011 CTC, SIO, PIO 100 CTC, PIO, SIO 101 PIO, SK), CTC 110 PIO, CTC, SIO 111 NONE Daisy , TdM1(IEO) (PIO at #1) (CTC at #1) (SIO at #1) 19 TslEI(IO) 20 21 24 Parameter Min TdlEI(IEOf) TdlEl(IEOr) (PIO at #3) (CTC at #3) (SIO at #3) © Max 160nSb 180nSb 230nSb
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Zilog Z80 KIO Z84C4X T-52-33-05 Z84C9008GME Z84C9008GMB 84C90

Zilog Z80 KIO

Abstract: Z84C90 KIO a preferred sequence of peripherals to interrupt. Any one of the three devices (SIO, CTC, PIO) can , D0 Daisy Chain Configuration 000 None 001 SIO, CTC, PIO 010 SIO, PIO, CTC 011 CTC, SIO, PIO 100 CTC, PIO, SIO 101 PIO, SIO, CTC 110 PIO, SIO, CTC 111 None Daisy chain write enable Reset PIO Reset CTC , peripherals requirements. The Z84C90 KIO Peripheral combines the features of one Z84C30 CTC, one Z84C20 PIO , Channel 1 Register 6: CTC Channel 2 Register 7: CTC Channel 3 Register 8: SIO Port A Data Register 9: SIO
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Z84C90 KIO zilog z280 Z84C9010VSC Z84C9008 pdz32 PS011804-0612
Abstract: timing, it can be treated as if there are Z80 PIO, CTC and SIO with I/O buffers on the chain. And , CTC, one Z84C4X SIO, one Z84C20 PIO, a byte-wide bit-programmable I/O Port, and a crystal oscillator , three devices (PIO, CTC and SIO) can be the highest priority while another can be second and the , S IO , C TC , PIO 010 S IO , PIO , CTC 011 CTC, SIO , PIO 100 C TC , P IO , SIO 101 PIO , SIO , CTC 110 PIO , C TC , SIO 111 N O NE Daisy C h ain W rite Enable -
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DC-2502-00

Z80 KIO

Abstract: z80 pio technical manual daisy-chain timing, use the Z80 PIO, CTC and SIO with I/O buffers on the chain. The following are calculation , ) (PIO at #3) 170 ns 140 ns 115 ns (CTC at #3) 170 ns 160 ns 135 ns (SIO at #3) 180 ns 160 ns , PIO part Min Max CTC part Min Max SIO part Min Max TdM1(IEO) TslEI(IO) TdlEI(IEOf) TdlEI(IEOr) 60 ns , ns 70 ns 50 ns. 50 ns 90 ns 50 ns 30 ns 30 ns 12.5 MHz PIO part Min Max CTC part Min Max SIO , order in which he would lik peripherals to interrupt. Any one of the three devices CTC, PIO) can be the
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Z80 KIO z80 pio technical manual z80 family V3f marking code Z80 CTC z80kio Z84C4

z84c9008gme

Abstract: Z84C9008 peripheral needs. The Z84C90 com bines the features of one Z84C30 CTC, one Z84C4X SIO, one Z84C20 PIO, a , of the three devices (PIO, CTC and SIO) can be the highest priority while another can be second and , Configuration 000 None 001 SIO, CTC, PIO 010 SIO, PIO, CTC 011 CTC, SIO, PIO 100 CTC, PIO, SIO 101 PIO, SIO, CTC 110 PIO, CTC, SIO 111 NONE Daisy Chain Write Enable Write "V Reset PIO D7=0 PIA PIA PIA PIA PIA PIA , pin directly, and PIO, CTC, SIO M egacell's IEI inputs are tied to "H" internally. When interrupt is u
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80A-SIO 80a ctc Z84C9008G

Z0847006

Abstract: Z80 dart three devices {SIO, CTC, PIO) can be the highest priority while another can be second and the remaining , Figure 2,40-Pln Dual-ln-Llne Package (DIP), Pin Assignments 2-33 Zilog also offers the Z80 SIO, a more , the Receiver and Transmitter Clocks may be driven by the Z80 CTC Counter Time Circuit for programmable , Receive Clock signals, a feature that allows it to be used with a Z80 CTC or any other clock source. The , /DMA Block Transfer. The Z80 DART provides a Block Transfer mode to accommodate CPU block transfer
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Z0847006 VOG06 fag 35 gdg Z280 MPU T02V 49/Z0847004 Z84013/015 Z84C13/C15 Z8470Z80D

tny 177

Abstract: BRX110 fashion, whenever any of the on-chip PIO ports, CTC channels, or SIO channels request an interrupt. The , .225 Figure 45. PIO Mode 3 (Bit Control) Timing.225 Figure 46. CTC Timing , General-Purpose I/O. These four 8-bit ports, designated A through D, are functionally identical to two Z80 PIO , Description Two Multiprotocol Serial Channels. These channels are functionally identical to a Z80 SIO, and , Circuits. These CTCs are functionally identical to a Z80 CTC device. Each channel provides counter or timer
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tny 177 BRX110 Hitachi 64180 manual tny 177 pn tny 275 pn PS-001 PS001 5Q0-ZMP093S PS001500-ZMP0999 500-ZMP0999 Z80S1 Z80S18833ASCR

z84c9

Abstract: z80 pio technical manual ) (SIO at #1 ) TslEI(IO) (PIO at #3) (CTC at #3) (SIO at #3) 19 20 21 TdlEI(IEOf) TdiEI(IEOr) To calculate Z80 KIO daisy-chain timing, use the Z80 PIO, CTC and SIO with I/O buffers on the chain , of the three devices (SIO, CTC, PIO) can be the highest priority while another can be second and the , W rite R e s e t PIO R e s e t CTC R e s e t SIO S IO /P IA M u * 0 * PIA KIO Command Register , to IEO falling delay- TdlEI(IEOf) - TdlEI(IEOf)PIO + TdlEI(IEOf)CTC + TdlEI(IEOf)SIO + (Input Buffer
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z84c9 Z84C9010

bisyn

Abstract: (IEOr) To calculate Z80 KIO daisy-chain tim ing, use the Z80 PIO, CTC and SIO with I/O buffers on , order in which he would like the peripherals to interrupt. Any one of the three devices (SIO, CTC, PIO , Parameter 18 TdM 1(IEO) (PIO at #1) (CTC at #1) (SIO at #11 19 TslEI(IO) 20 21 (PIO at , (After ED decode)- TdlEI(IEOr) = TdlEI(IEOr)PIO+ TdlEI(IEOr)CTC + TdlEI(IEOr)SIO + (Input Butfer delay , 8 MHz PIO part Min Max CTC part Min Max SIO part Min TdM1(IEO) TslEI(IO) TdlEI
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bisyn Z80KIC

Z80 KIO

Abstract: cpu 222 DC/DC/DC (IEOr) 160 ns 150 ns 125 ns To calculale 280 KIO daisy-chain timing, use the Z80 PIO, CTC and SIO with , three devices (SIO, CTC, PIO) can be the highest priority while another can be second and the remaining , Max 12.5 MHz Min Max 18 TdM1(IEO) (PIO at #1) (CTC at #1) (SIO at #11 160 ns 180 ns 230 ns 150 ns 150 ns 200 ns 125 ns 125 ns 160 ns 19 TslEI(IO) (PIO at #3) (CTC at #3) (SIO at #3) 170 ns 170 ns , (After ED decode)- TdlEI(IEOr) = TdlEI(IEOr)PIO+ TdlEI(IEOr)CTC + TdlEI(IEOr)SIO + (Input Buffer delay) +
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cpu 222 DC/DC/DC z80pio Z80 parts drawing zilog ctc 10FCT Z180

zilog 3943

Abstract: TA32032F , watchdog timer, and the interface controllers (PIO, SIO) required for interfacing with the upper layers , transfers with the built-in SIO CHA (LAPD), Then these pins are output pin. RDY2 and RDY3 are used for DMA transfer with the built-in SIO CHA, CHB, the built-in PIO PortA, or External Peripheral I/O. When RDY2 and , (hereafter called PIO), direct memory access section (hereafter called DMA), layer 2 LAPD serial input/output , Series CTCs (TMPZ84C30A) and is used to control interrupts from layer 1, the SIO section and DMA section
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TA32032F zilog 3943 decade counter timimg diagram zilog 3818 5430 TI 05H TMPZ84C710 TMPZ84C711A TMPZ84C710AG-6/711AF-6 SW80901-R0J BMZ84C710AG0A MPUZ80ASSP-571
Abstract: peripherals to interrupt. Any one of the three devices (SIO, CTC, PIO) can be the highest priority while , : CTC Interrupt Vector Word SIO Registers: For more detailed information, please con­ sult the PIO , ) 160 ns 160 ns To calculate Z80 KIO daisy-chain timing, use the Z80 PIO, CTC and SlO with I/O , TdlEI(IEOr) = TdlEI(IEOr)PIO+ TdlEI(IEOr)CTC + TdlEI(IEOr)SIO + (Input Buffer delay) + (output Butter , Z84C30 CTC, one Z84C4xSIO, one Z84C20 PIO, a byte-wide bit-programmable I/O port, and a crystal -
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J0MQ43

BU18400A

Abstract: T-75-37-05 (DJ:o fri^JS^LSIt b T DMA (BU18410), PIO (BU 18420), CTC (BU18430), SIO (BU18440, 1, 2) DART (BU18470 , , communications, counter-timer, etc. Such peripheral LSIs include DMA (BU18410), PIO (BU18420), CTC (BU18430), SIO , . OJC[7 ÏÏJd, ss [7 HJO, gssaQö BU18410 Z80 DMA 3i]d. +5vqî Mñ£o[lZ SÃ"SQJ 29] d. ïà , .[jÃ" BU18420 Z80 PIO 3i]pa. CÌ.OQT jÃjpS, PA, Qi M]PB. pa,qj pa, [m 27] Pa. SSTBQS is , ± «jcë teoQ h] s/â snJT 33] cyo +5v[t h] bd w/roya [70 BU18441 77]gno sykcaQT Z80 SIO-1 »] vÃ
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BU18400 BU18400A BU18400B T-75-37-05 yf7a 7S--37-C5 BU18400- BU18400H
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