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LTC4000IGN#TRPBF Linear Technology LTC4000 - High Voltage High Current Controller for Battery Charging and Power Management; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4000IUFD-1#TRPBF Linear Technology LTC4000-1 - High Voltage High Current Controller for Battery Charging with Maximum Power Point Control; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4000EGN-1#TRPBF Linear Technology LTC4000-1 - High Voltage High Current Controller for Battery Charging with Maximum Power Point Control; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4000IUFD#TRPBF Linear Technology LTC4000 - High Voltage High Current Controller for Battery Charging and Power Management; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4000EGN-1#PBF Linear Technology LTC4000-1 - High Voltage High Current Controller for Battery Charging with Maximum Power Point Control; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC4000EUFD#PBF Linear Technology LTC4000 - High Voltage High Current Controller for Battery Charging and Power Management; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy

Xc 4000 FPGA family

Catalog Datasheet MFG & Type PDF Document Tags

Xc 4000 FPGA family

Abstract: XC5000 Fall 1996 Seminar FPGA Solutions Fall Seminar - FPGA - 1 E 00 40 0EX XC 400 XC 00 95 XC XACT Xilinx FPGA Solutions XC5000 Family Description Max. Logic Gates XC4000 , applications Fall Seminar - FPGA - 14 E 00 40 0EX XC 400 XC XC4000EX Family XACT 4028EX , Seminar - FPGA - 3 E 00 40 0EX XC 400 XC High Density FPGA Leadership XACT XC4000 Series , functions Fall Seminar - FPGA - 6 E 00 40 0EX XC 400 XC XACT XC4000 Series CLB Architecture
Xilinx
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XC4000E XC5200 Xc 4000 FPGA family HQ240 4006-E Logic Gates XC4005E PHYSICAL 4006E 3K125K 3K23K 3K-33K 33K-148K

FIR FILTER implementation xilinx

Abstract: fir filter design using vhdl FPGA - 1 E 00 40 0EX XC 400 XC 00 95 XC XACT Xilinx FPGA Solutions XC5000 Family , Depth X Width Fall Seminar - FPGA - 10 32X32 E 00 40 0EX XC 400 XC XC4000E Family , XC5200 25K 125K Max. Logic Gates Fall Seminar - FPGA - 3 E 00 40 0EX XC 400 XC High , I/O Fall Seminar - FPGA - 4 E 00 40 0EX XC 400 XC XC4000 Series: High Density , Specific E 00 40 0EX XC 400 XC XACT XC4000 Series FPGA Architecture System Integration
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XC9500 FIR FILTER implementation xilinx fir filter design using vhdl fpga frame buffer vhdl examples USB Prog ISP 172 XC9572 LIC AGENTS DATA 125KG XC4000E/EX

xilinx xc95108 jtag cable Schematic

Abstract: XC95144 Seminar - CPLD - 17 Fall 1996 Seminar FPGA Solutions Fall Seminar - FPGA - 1 E 00 40 0EX XC 400 XC 00 95 XC XACT Xilinx FPGA Solutions XC5000 Family Description Max. Logic , Seminar - FPGA - 10 Fall Seminar - FPGA - 5 32X32 E 00 40 0EX XC 400 XC XC4000E Family , FPGAs XC5200 25K 125K Max. Logic Gates Fall Seminar - FPGA - 3 E 00 40 0EX XC 400 XC , 256 256 - 544 Fall Seminar - FPGA - 4 Fall Seminar - FPGA - 2 E 00 40 0EX XC 400 XC
Xilinx
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xilinx xc95108 jtag cable Schematic XC95144 xilinx FPGA IIR Filter XC95144 PQ100 Altera CPLD PCMCIA XC4000series

XC17S20XLV08C

Abstract: XC17S20V08C (Version 1.1) Product Specification Introduction Spartan SPROM Features The Spartanâ"¢ family , interconnected. All devices are compatible and can be cascaded with other members of the family. Serial , Spartan FPGA devices Simple interface to the Spartan device requires only one user I/O pin Cascadable , ­ grammers. Spartan FPGA Compatible Spartan SPROM Configuration Bits XCS05 XC17S05 65,536 , . FPGA Master Serial Mode Summary The I/O and logic functions of the Configurable Logic Block (CLB) and
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XC17S20XLV08C XC17S20V08C XC17S05V08C XC17S30V08C 5M-1982 MS-013-AC

1765DPC

Abstract: XC17128D Series JIXILINX June 1, 1996 (Version 1.0) XC1700D Family of Serial Configuration PROMs Product Specification Features Extended family of one-time programmable (OTP) bit-serial read-only memories used for , edge on the clock input Simple interface to the FPGA requires only one user I/O pin Cascadable for , compatibility with different FPGA solutions XC17128D or XC17256D supports XC4000 fast configuration mode (12.5 , manufacturers. Description The XC1700 family of serial configuration PROMs (SCPs) provides an easy-to-use
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XC17256DPD8C XC17256DV08C XC17256DDD8M XC1736DPD8I 1765DPC20C XC1765DDD8B 1765DPC XC17128D Series XC17128DPC XC1765D Series 3164A PC20C XC1718DPD8I XC1718DS08I XC1718DV08I XC1718DPC20I

xapp058

Abstract: XBRF006 Coun 2 Efficient Shift Re · XAPP05 4000 Series RAM ting FIFOs in XC PP053 Implemen e XC4000E · , /mentor/b1_521h.tar.Z (HP-UX) Q A schematic originally targeted for the XC4000 family is now , . (Other family combinations may also cause this error.) Certain symbols are primitives in the schematic , contains EDIF descriptions for XC4000E primitives. Since OFD is not a primitive in the XC4000E family , design to a new device family is to use the Convert Design utility in PLD_DA before running the
Xilinx
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xapp058 XBRF006 PP062 20C50 XC6200 XAPP059 XC4000/XC4000E

1736DPC

Abstract: xc17128dpd8c XC1700D Family of Serial Configuration PROMs ® June 1, 1996 (Version 1.0) Product Specification Features Description · The XC1700 family of serial configuration PROMs (SCPs) provides an easy-to-use, cost-effective method for storing Xilinx FPGA configuration bitstreams. · · · · · · · · · · Extended family of one-time programmable (OTP) bit-serial read-only , , incremented by each rising edge on the clock input Simple interface to the FPGA requires only one user I/O
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XC17256DVO8I XC17256DDD8B XC1736DPD8C XC1736DDD8M 1736D 1736DPC xc17128dpd8c xilinx MARKING CODE XC4000 XC17256DPC20C Marking 8DF XC17256DPC20I XC17128LPD8C XC17128LVO8C XC17128LPC20C

XC17256DPD8C

Abstract: XC17256DPD8I family. For device programming, the XACT development system compiles the FPGA design file into a , £ XILINX XC1700D Family of Serial Configuration PROMs June 1, 1996 (Version 1.0) Product Specification Features Description Extended family of one-time programmable (OTP) bit-serial read-only , , incremented by each rising edge on the clock input Simple interface to the FPGA requires only one user I/O , active Low) for compatibility with different FPGA solutions XC17128D or XC17256D supports XC4000 fast
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XC17256DPD8I 8DPC20I XC1736DS08I XC1765DS08I XC17128DDD8M XC1736DV08I XC1765DV08I

1736DPC

Abstract: XC1765DS08C family. For device programming, the XACT development system compiles the FPGA design file into a standard , fi XILINX XC1700D Family of Serial Configuration PROMs June 1,1996 (Version 1.0) Features â'¢ Extended family of one-time programmable (OTP) bit-serial read-only memories used for storing the , clock input â'¢ Simple interface to the FPGA requires only one user I/O pin â'¢ Cascadable for storing , compatibility with different FPGA solutions â'¢ XC17128D or XC17256D supports XC4000 fast configuration mode
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XC17256LV08I XC1718D XC1765DS08C XC1736DS08C XC17256D-V08I XC17256D-PD8I XC3042 part marking XC1736DV08C XC1765DV08C XC17128DPD8I XC1718DPC20C XC1736DPC20C XC1765DPC20C

crystal KDS 4m

Abstract: Xilinx XC3090A architecture and features to the X C 3000A family, but operates at a nominal supply voltage of 3.3 V. The XC , FPGA architecture - Com patible arrays ranging from 1,000 to 7,500 gate com plexity - Extensive , , and others Additional XC3100A Features · Ultra-high-speed FPGA fam ily with six members - 50-85 , function at 3.0 - 3.6 V XC 3000L - Low-voltage versions of XC3000A devices XC 3100L - Low-voltage versions , FPGA is shown in Figure 2. The developm ent system provides schem atic capture and auto place-and-route
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crystal KDS 4m Xilinx XC3090A his 3020a XC3000 XC3000A/L XC31OOA/L XC3000L XC3100L XC3020A

xilinx 1736a

Abstract: LEAPER-10 driver , they chose the world's leading control logic, they chose the FPGA family - the world's leading FPGA family XC4000 Series. Based on the "alpha7," - the XC4000 Series.d a prototype system , ISP Products in Production . 13 XC4000 Family Update: 5 Million Units Sold . 13 XC4000EX Family Begins Production . 13 Xilinx Discontinuance Policy . 14 XC4000A/H FPGA Devices Discontinued . 14 DEVELOPMENT SYSTEMS New CPLD Software Updates
Xilinx
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HW-130 xilinx 1736a LEAPER-10 driver LEAPER-10 free vHDL code of median filter univision Micromaster HP3070

XC17128D

Abstract: XC1765D Series £ XILINX January 1996 (Version 4.0) XC1700 Family of Serial Configuration PROMs Product Specification Features · Extended family of one-time programmable (OTP) bit-serial read-only memories used , each rising edge on the clock input · Simple interface to the FPGA requires only one user I/O pin · , ) for compatibility with different FPGA solutions · XC17128D or XC17256D supports XC4000 fast config , leading programmer manufacturers. Description The XC1700 family of serial configuration PROMs (SCPs
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XC17256 XC1718L XC1736D XC1765D XC1765L XC17128L XC17256L

ne 5555 timer

Abstract: "Single-Port RAM" Memory Block ALTERA Flex 10K Embedded Array XILINX XC 4000 Distributed Memory Compared to , XC 4000 Segmented UNIQUE FUNCTIONALITY PREDICTABLE TIMING To get maximum in-system , programmable technology. COMBINES BEST FEATURES OF CPLD, FPGA & ASIC! Lattice Semiconductor's new , /Counter operation and 20ns Memory access time, these devices substantially outperform competitive FPGA , 3ns delay across the entire chip. By comparison, competitive FPGA approaches have signal skews
Lattice Semiconductor
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ne 5555 timer I0071

sprom 8 pins dip

Abstract: Xc 4000 FPGA family SpartanTM family of Serial Configuration PROMs (SPROM) provides and easy-to-use, cost-effective method for , are compatible and can be cascaded with other members of the family. Serial Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams of Spartan FPGA devices , . Spartan FPGA Compatible Spartan SPROM Configuration Bits XCS05 XC17S05 65,536 XCS05XL , , because it can be driven by the FPGA's INIT pin. The polarity of this pin is controlled in the
Xilinx
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XC17S40 sprom 8 pins dip XCS10 XCS10XL XCS20 XCS20XL XC17S05PD8C XC17S10PD8C XC17S20PD8C XC17S30PD8C XC17S40PDC XC17S05VO8C
Abstract: XC1700 Family of Serial Configuration PROMs £ Preliminary Product Specifications Features Description â'¢ Extended family of one-time programmable (OTP) bitserial read-only memories used for storing the configu­ ration bitstreams of Xilinx FPGAs The XC1700 family of serial configuration PROMs (SCPs) provides an easy-to-use, cost-effective method for storing Xilinx FPGA configuration , FPGA is in master serial mode, it generates a configuration clock that drives the SCP. A short access -
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XC17XXX MIL-STD-883 17XXXPC

ATIC 164 D2 44 pin

Abstract: ATIC 164 D2 48 pin third-party CAE tools Description The XC5200 Field-Program m able Gate Array Family is engineered to deliver the lowest cost of any FPGA family. By optim izing the new XC5200 architecture for three-layer , 4000 family: decoders. XC5200 devices have no wide edge XC4000 family: XC5200 dedicated carry , Product Specification Features â'¢ â'¢ High-density family of Field-Program m able Gate Arrays , alternative to gate arrays. Building on experiences gained with three previous suc­ cessful SRAM FPGA
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ATIC 164 D2 44 pin ATIC 164 D2 48 pin ATIC 164 D3 XC5210 XC5206 XC5215 PQ100 VQ100 XC5202
Abstract: family, while nearly doubling the available I/O. â'¢ Flexible Array Architecture - Programmable logic , into the FPGA (slave and peripheral modes). â'¢ Systems-Oriented Features - IEEE 1149.1 , resistors - 12-mA sink current per output (XC4000 family) - 24-mA sink current per output (XC4000A and , family of Xilinx Field Programmable Gate Arrays, here is a concise list of the major new features in the XC4000 family. Increased number of interconnect resources. All CLB inputs and outputs have access to -
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XC4000H XC4000- XC4005H-5 PG223C XC4003H PG156

1718l

Abstract: LEAP-U1 1997. Our XC5000 family is an excellent solution for the low-end FPGA market. that the The XC8100 , XC3000A, XC3000L, XC3100A, XC3100L, XC4000L, XC4000XL and XC5200 FPGA families, and the XC1700 family , . 40-41 Visit FPGA Newsgroup . 41 Advanced Carry-Logic Techniques . , FPGA device design that include the HDL Wizard, a set of tools that help users quickly learn and , development system adds XC4000E FPGA and XC9500 CPLD support. See Page 25 DESIGN TIPS & HINTS
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1718l LEAP-U1 17-18L 74160 pin description advantages of proteus software 1765d

Power output ic la 4451 datasheet

Abstract: output ic la 4451 datasheet . 6 Low Cost XC5200 Family . 7 XC9500 Price Reductions , 100MHz XC4000XL-1 Using the world's highest-density and fastest FPGA means designers must consider the , , FPGA Foundry, and NeoCAD are registered trademarks; all XC-designated products, HardWire, XACTstep , XC9500 family. This new line of machine vision and pattern recognition products greatly accelerates , rework is ever required." The XC9500 family is a proven winner, especially in those applications that
Xilinx
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Power output ic la 4451 datasheet output ic la 4451 datasheet XC9536-VQ44 la 4451 xc9536vq44 Cognex XC9536 100MH Z1800

AEC-Q100

Abstract: DSP48A 54 R XA Spartan-3A DSP Automotive FPGA Family Data Sheet DS705 (v1.1) January 20, 2009 , Family Data Sheet Refer to DS610, Spartan-3A DSP FPGA Family Data Sheet for a full product , this XA Spartan-3A DSP Automotive FPGA Family data sheet override those shown in DS610. For , Automotive FPGA Family Data Sheet X-Ref Target - Figure 1 IOBs DCM DSP48A Slice Block RAM , configuration bitstream. Later versions are also supported. Table 3: XA Spartan-3A DSP FPGA Family
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AEC-Q100 UG331 din 4766 RSDS25
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